clk: vc5: Add bindings for IDT VersaClock 5P49V6901
IDT VersaClock 6 5P49V6901 has 4 clock outputs, 4 fractional dividers. Input clock source can be taken from either external crystal or from external reference clock. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Alexey Firago <alexey_firago@mentor.com> Cc: Rob Herring <robh@kernel.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Michael Turquette <mturquette@baylibre.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: linux-renesas-soc@vger.kernel.org Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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Binding for IDT VersaClock5 programmable i2c clock generator.
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Binding for IDT VersaClock 5,6 programmable i2c clock generators.
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The IDT VersaClock5 are programmable i2c clock generators providing
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The IDT VersaClock 5 and VersaClock 6 are programmable i2c clock
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from 3 to 12 output clocks.
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generators providing from 3 to 12 output clocks.
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==I2C device node==
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==I2C device node==
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Required properties:
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Required properties:
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- compatible: shall be one of "idt,5p49v5923" , "idt,5p49v5933" ,
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- compatible: shall be one of
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"idt,5p49v5935".
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"idt,5p49v5923"
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"idt,5p49v5933"
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"idt,5p49v5935"
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"idt,5p49v6901"
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- reg: i2c device address, shall be 0x68 or 0x6a.
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- reg: i2c device address, shall be 0x68 or 0x6a.
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- #clock-cells: from common clock binding; shall be set to 1.
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- #clock-cells: from common clock binding; shall be set to 1.
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- clocks: from common clock binding; list of parent clock handles,
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- clocks: from common clock binding; list of parent clock handles,
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- 5p49v5923: (required) either or both of XTAL or CLKIN
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- 5p49v5923 and
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5p49v6901: (required) either or both of XTAL or CLKIN
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reference clock.
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reference clock.
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- 5p49v5933 and
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- 5p49v5933 and
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- 5p49v5935: (optional) property not present (internal
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- 5p49v5935: (optional) property not present (internal
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Xtal used) or CLKIN reference
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Xtal used) or CLKIN reference
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clock.
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clock.
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- clock-names: from common clock binding; clock input names, can be
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- clock-names: from common clock binding; clock input names, can be
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- 5p49v5923: (required) either or both of "xin", "clkin".
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- 5p49v5923 and
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5p49v6901: (required) either or both of "xin", "clkin".
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- 5p49v5933 and
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- 5p49v5933 and
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- 5p49v5935: (optional) property not present or "clkin".
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- 5p49v5935: (optional) property not present or "clkin".
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@ -44,6 +49,13 @@ clock specifier, the following mapping applies:
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3 -- OUT3
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3 -- OUT3
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4 -- OUT4
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4 -- OUT4
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5P49V6901:
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0 -- OUT0_SEL_I2CB
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1 -- OUT1
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2 -- OUT2
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3 -- OUT3
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4 -- OUT4
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==Example==
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==Example==
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/* 25MHz reference crystal */
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/* 25MHz reference crystal */
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