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[PATCH] PCI: clean up pci documentation to be more specific

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On Thu, Jun 01, 2006 at 02:46:11AM -0700, Rajesh Shah wrote:
> This patch assumes that pci_request_region() will always be called
> after pci_enable_device() and pci_release_region() will always
> be called before pci_disable_device(). We cannot make this
> assumption,since it's perfectly legal to disable a device
> first and then release it's regions. So, I think that patch
> needs to change.

Patch below clarifies comments in Documentation/pci.txt.

Signed-off-by: Grant Grundler <grundler@parisc-linux.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Grant Grundler 2006-06-01 11:15:59 -06:00 committed by Greg Kroah-Hartman
parent f7e6600d76
commit 733a7fe122
1 changed files with 11 additions and 3 deletions
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14
Documentation/pci.txt
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@ -213,9 +213,17 @@ have been remapped by the kernel.
See Documentation/IO-mapping.txt for how to access device memory. See Documentation/IO-mapping.txt for how to access device memory.
You still need to call request_region() for I/O regions and The device driver needs to call pci_request_region() to make sure
request_mem_region() for memory regions to make sure nobody else is using the no other device is already using the same resource. The driver is expected
same device. to determine MMIO and IO Port resource availability _before_ calling
pci_enable_device(). Conversely, drivers should call pci_release_region()
_after_ calling pci_disable_device(). The idea is to prevent two devices
colliding on the same address range.
Generic flavors of pci_request_region() are request_mem_region()
(for MMIO ranges) and request_region() (for IO Port ranges).
Use these for address resources that are not described by "normal" PCI
interfaces (e.g. BAR).
All interrupt handlers should be registered with SA_SHIRQ and use the devid All interrupt handlers should be registered with SA_SHIRQ and use the devid
to map IRQs to devices (remember that all PCI interrupts are shared). to map IRQs to devices (remember that all PCI interrupts are shared).