MIPS: Loongson: Set Loongson-3's ISA level to MIPS64R1
In CPU manual Loongson-3 is MIPS64R2 compatible, but during tests we found that its EI/DI instructions have problems. So we just set the ISA level to MIPS64R1. Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: John Crispin <john@phrozen.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/8320/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -41,10 +41,8 @@
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#define cpu_has_mcheck 0
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#define cpu_has_mdmx 0
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#define cpu_has_mips16 0
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#define cpu_has_mips32r1 0
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#define cpu_has_mips32r2 0
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#define cpu_has_mips3d 0
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#define cpu_has_mips64r1 0
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#define cpu_has_mips64r2 0
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#define cpu_has_mipsmt 0
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#define cpu_has_prefetch 0
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@ -757,26 +757,29 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c, unsigned int cpu)
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c->cputype = CPU_LOONGSON2;
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__cpu_name[cpu] = "ICT Loongson-2";
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set_elf_platform(cpu, "loongson2e");
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set_isa(c, MIPS_CPU_ISA_III);
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break;
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case PRID_REV_LOONGSON2F:
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c->cputype = CPU_LOONGSON2;
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__cpu_name[cpu] = "ICT Loongson-2";
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set_elf_platform(cpu, "loongson2f");
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set_isa(c, MIPS_CPU_ISA_III);
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break;
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case PRID_REV_LOONGSON3A:
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c->cputype = CPU_LOONGSON3;
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__cpu_name[cpu] = "ICT Loongson-3";
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set_elf_platform(cpu, "loongson3a");
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set_isa(c, MIPS_CPU_ISA_M64R1);
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break;
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case PRID_REV_LOONGSON3B_R1:
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case PRID_REV_LOONGSON3B_R2:
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c->cputype = CPU_LOONGSON3;
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__cpu_name[cpu] = "ICT Loongson-3";
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set_elf_platform(cpu, "loongson3b");
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set_isa(c, MIPS_CPU_ISA_M64R1);
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break;
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}
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set_isa(c, MIPS_CPU_ISA_III);
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c->options = R4K_OPTS |
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MIPS_CPU_FPU | MIPS_CPU_LLSC |
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MIPS_CPU_32FPR;
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