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@ -66,6 +66,8 @@ unsigned int do_slm_cstates;
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unsigned int use_c1_residency_msr;
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unsigned int use_c1_residency_msr;
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unsigned int has_aperf;
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unsigned int has_aperf;
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unsigned int has_epb;
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unsigned int has_epb;
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unsigned int do_irtl_snb;
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unsigned int do_irtl_hsw;
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unsigned int units = 1000000; /* MHz etc */
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unsigned int units = 1000000; /* MHz etc */
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unsigned int genuine_intel;
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unsigned int genuine_intel;
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unsigned int has_invariant_tsc;
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unsigned int has_invariant_tsc;
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@ -187,7 +189,7 @@ struct pkg_data {
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unsigned long long pkg_any_core_c0;
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unsigned long long pkg_any_core_c0;
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unsigned long long pkg_any_gfxe_c0;
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unsigned long long pkg_any_gfxe_c0;
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unsigned long long pkg_both_core_gfxe_c0;
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unsigned long long pkg_both_core_gfxe_c0;
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unsigned long long gfx_rc6_ms;
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long long gfx_rc6_ms;
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unsigned int gfx_mhz;
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unsigned int gfx_mhz;
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unsigned int package_id;
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unsigned int package_id;
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unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
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unsigned int energy_pkg; /* MSR_PKG_ENERGY_STATUS */
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@ -621,8 +623,14 @@ int format_counters(struct thread_data *t, struct core_data *c,
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outp += sprintf(outp, "%8d", p->pkg_temp_c);
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outp += sprintf(outp, "%8d", p->pkg_temp_c);
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/* GFXrc6 */
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/* GFXrc6 */
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if (do_gfx_rc6_ms)
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if (do_gfx_rc6_ms) {
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outp += sprintf(outp, "%8.2f", 100.0 * p->gfx_rc6_ms / 1000.0 / interval_float);
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if (p->gfx_rc6_ms == -1) { /* detect counter reset */
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outp += sprintf(outp, " ***.**");
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} else {
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outp += sprintf(outp, "%8.2f",
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p->gfx_rc6_ms / 10.0 / interval_float);
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}
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}
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/* GFXMHz */
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/* GFXMHz */
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if (do_gfx_mhz)
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if (do_gfx_mhz)
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@ -766,7 +774,12 @@ delta_package(struct pkg_data *new, struct pkg_data *old)
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old->pc10 = new->pc10 - old->pc10;
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old->pc10 = new->pc10 - old->pc10;
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old->pkg_temp_c = new->pkg_temp_c;
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old->pkg_temp_c = new->pkg_temp_c;
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old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
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/* flag an error when rc6 counter resets/wraps */
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if (old->gfx_rc6_ms > new->gfx_rc6_ms)
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old->gfx_rc6_ms = -1;
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else
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old->gfx_rc6_ms = new->gfx_rc6_ms - old->gfx_rc6_ms;
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old->gfx_mhz = new->gfx_mhz;
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old->gfx_mhz = new->gfx_mhz;
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DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
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DELTA_WRAP32(new->energy_pkg, old->energy_pkg);
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@ -1296,6 +1309,7 @@ int hsw_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL__3, PCL__6, PCL__7, PCL_7S,
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int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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int slv_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCLRSV, PCLRSV, PCL__4, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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int amt_pkg_cstate_limits[16] = {PCL__0, PCL__1, PCL__2, PCLRSV, PCLRSV, PCLRSV, PCL__6, PCL__7, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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int phi_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCL_6N, PCL_6R, PCLRSV, PCLRSV, PCLRSV, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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int bxt_pkg_cstate_limits[16] = {PCL__0, PCL__2, PCLUNL, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV, PCLRSV};
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static void
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static void
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@ -1579,6 +1593,47 @@ dump_config_tdp(void)
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fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
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fprintf(outf, " lock=%d", (unsigned int)(msr >> 31) & 1);
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fprintf(outf, ")\n");
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fprintf(outf, ")\n");
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}
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}
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unsigned int irtl_time_units[] = {1, 32, 1024, 32768, 1048576, 33554432, 0, 0 };
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void print_irtl(void)
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{
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unsigned long long msr;
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get_msr(base_cpu, MSR_PKGC3_IRTL, &msr);
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fprintf(outf, "cpu%d: MSR_PKGC3_IRTL: 0x%08llx (", base_cpu, msr);
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fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
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(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
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get_msr(base_cpu, MSR_PKGC6_IRTL, &msr);
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fprintf(outf, "cpu%d: MSR_PKGC6_IRTL: 0x%08llx (", base_cpu, msr);
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fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
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(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
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get_msr(base_cpu, MSR_PKGC7_IRTL, &msr);
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fprintf(outf, "cpu%d: MSR_PKGC7_IRTL: 0x%08llx (", base_cpu, msr);
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fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
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(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
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if (!do_irtl_hsw)
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return;
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get_msr(base_cpu, MSR_PKGC8_IRTL, &msr);
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fprintf(outf, "cpu%d: MSR_PKGC8_IRTL: 0x%08llx (", base_cpu, msr);
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fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
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(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
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get_msr(base_cpu, MSR_PKGC9_IRTL, &msr);
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fprintf(outf, "cpu%d: MSR_PKGC9_IRTL: 0x%08llx (", base_cpu, msr);
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fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
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(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
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get_msr(base_cpu, MSR_PKGC10_IRTL, &msr);
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fprintf(outf, "cpu%d: MSR_PKGC10_IRTL: 0x%08llx (", base_cpu, msr);
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fprintf(outf, "%svalid, %lld ns)\n", msr & (1 << 15) ? "" : "NOT",
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(msr & 0x3FF) * irtl_time_units[(msr >> 10) & 0x3]);
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}
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void free_fd_percpu(void)
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void free_fd_percpu(void)
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{
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{
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int i;
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int i;
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@ -2144,6 +2199,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
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case 0x56: /* BDX-DE */
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case 0x56: /* BDX-DE */
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case 0x4E: /* SKL */
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case 0x4E: /* SKL */
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case 0x5E: /* SKL */
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case 0x5E: /* SKL */
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case 0x8E: /* KBL */
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case 0x9E: /* KBL */
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case 0x55: /* SKX */
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pkg_cstate_limits = hsw_pkg_cstate_limits;
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pkg_cstate_limits = hsw_pkg_cstate_limits;
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break;
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break;
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case 0x37: /* BYT */
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case 0x37: /* BYT */
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@ -2156,6 +2214,9 @@ int probe_nhm_msrs(unsigned int family, unsigned int model)
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case 0x57: /* PHI */
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case 0x57: /* PHI */
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pkg_cstate_limits = phi_pkg_cstate_limits;
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pkg_cstate_limits = phi_pkg_cstate_limits;
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break;
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break;
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case 0x5C: /* BXT */
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pkg_cstate_limits = bxt_pkg_cstate_limits;
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break;
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default:
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default:
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return 0;
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return 0;
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}
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}
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@ -2248,6 +2309,9 @@ int has_config_tdp(unsigned int family, unsigned int model)
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case 0x56: /* BDX-DE */
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case 0x56: /* BDX-DE */
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case 0x4E: /* SKL */
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case 0x4E: /* SKL */
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case 0x5E: /* SKL */
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case 0x5E: /* SKL */
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case 0x8E: /* KBL */
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case 0x9E: /* KBL */
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case 0x55: /* SKX */
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case 0x57: /* Knights Landing */
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case 0x57: /* Knights Landing */
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return 1;
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return 1;
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@ -2585,13 +2649,19 @@ void rapl_probe(unsigned int family, unsigned int model)
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case 0x47: /* BDW */
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case 0x47: /* BDW */
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do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
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do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
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break;
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break;
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case 0x5C: /* BXT */
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do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
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break;
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case 0x4E: /* SKL */
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case 0x4E: /* SKL */
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case 0x5E: /* SKL */
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case 0x5E: /* SKL */
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case 0x8E: /* KBL */
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case 0x9E: /* KBL */
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do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
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do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
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break;
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break;
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case 0x3F: /* HSX */
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case 0x3F: /* HSX */
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case 0x4F: /* BDX */
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case 0x4F: /* BDX */
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case 0x56: /* BDX-DE */
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case 0x56: /* BDX-DE */
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case 0x55: /* SKX */
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case 0x57: /* KNL */
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case 0x57: /* KNL */
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do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
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do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
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break;
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break;
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@ -2871,6 +2941,10 @@ int has_snb_msrs(unsigned int family, unsigned int model)
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case 0x56: /* BDX-DE */
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case 0x56: /* BDX-DE */
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case 0x4E: /* SKL */
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case 0x4E: /* SKL */
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case 0x5E: /* SKL */
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case 0x5E: /* SKL */
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case 0x8E: /* KBL */
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case 0x9E: /* KBL */
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case 0x55: /* SKX */
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case 0x5C: /* BXT */
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return 1;
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return 1;
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}
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}
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return 0;
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return 0;
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@ -2879,9 +2953,14 @@ int has_snb_msrs(unsigned int family, unsigned int model)
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/*
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/*
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* HSW adds support for additional MSRs:
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* HSW adds support for additional MSRs:
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*
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*
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* MSR_PKG_C8_RESIDENCY 0x00000630
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* MSR_PKG_C8_RESIDENCY 0x00000630
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* MSR_PKG_C9_RESIDENCY 0x00000631
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* MSR_PKG_C9_RESIDENCY 0x00000631
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* MSR_PKG_C10_RESIDENCY 0x00000632
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* MSR_PKG_C10_RESIDENCY 0x00000632
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*
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* MSR_PKGC8_IRTL 0x00000633
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* MSR_PKGC9_IRTL 0x00000634
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* MSR_PKGC10_IRTL 0x00000635
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*
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*/
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*/
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int has_hsw_msrs(unsigned int family, unsigned int model)
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int has_hsw_msrs(unsigned int family, unsigned int model)
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{
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{
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@ -2893,6 +2972,9 @@ int has_hsw_msrs(unsigned int family, unsigned int model)
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case 0x3D: /* BDW */
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case 0x3D: /* BDW */
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case 0x4E: /* SKL */
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case 0x4E: /* SKL */
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case 0x5E: /* SKL */
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case 0x5E: /* SKL */
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case 0x8E: /* KBL */
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case 0x9E: /* KBL */
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case 0x5C: /* BXT */
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return 1;
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return 1;
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}
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}
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return 0;
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return 0;
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@ -2914,6 +2996,8 @@ int has_skl_msrs(unsigned int family, unsigned int model)
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switch (model) {
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switch (model) {
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case 0x4E: /* SKL */
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case 0x4E: /* SKL */
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case 0x5E: /* SKL */
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case 0x5E: /* SKL */
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case 0x8E: /* KBL */
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case 0x9E: /* KBL */
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return 1;
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return 1;
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}
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}
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return 0;
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return 0;
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@ -3187,7 +3271,7 @@ void process_cpuid()
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if (debug)
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if (debug)
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decode_misc_enable_msr();
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decode_misc_enable_msr();
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if (max_level >= 0x7) {
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if (max_level >= 0x7 && debug) {
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int has_sgx;
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int has_sgx;
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ecx = 0;
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ecx = 0;
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@ -3221,7 +3305,15 @@ void process_cpuid()
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switch(model) {
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switch(model) {
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case 0x4E: /* SKL */
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case 0x4E: /* SKL */
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case 0x5E: /* SKL */
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case 0x5E: /* SKL */
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crystal_hz = 24000000; /* 24 MHz */
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case 0x8E: /* KBL */
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case 0x9E: /* KBL */
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crystal_hz = 24000000; /* 24.0 MHz */
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break;
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case 0x55: /* SKX */
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crystal_hz = 25000000; /* 25.0 MHz */
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break;
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case 0x5C: /* BXT */
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crystal_hz = 19200000; /* 19.2 MHz */
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break;
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break;
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default:
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default:
|
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|
crystal_hz = 0;
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crystal_hz = 0;
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@ -3254,11 +3346,13 @@ void process_cpuid()
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do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
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|
do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
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|
do_snb_cstates = has_snb_msrs(family, model);
|
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|
|
do_snb_cstates = has_snb_msrs(family, model);
|
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|
|
|
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|
|
do_irtl_snb = has_snb_msrs(family, model);
|
|
|
|
do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
|
|
|
|
do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
|
|
|
|
do_pc3 = (pkg_cstate_limit >= PCL__3);
|
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|
|
do_pc3 = (pkg_cstate_limit >= PCL__3);
|
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|
|
do_pc6 = (pkg_cstate_limit >= PCL__6);
|
|
|
|
do_pc6 = (pkg_cstate_limit >= PCL__6);
|
|
|
|
do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
|
|
|
|
do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
|
|
|
|
do_c8_c9_c10 = has_hsw_msrs(family, model);
|
|
|
|
do_c8_c9_c10 = has_hsw_msrs(family, model);
|
|
|
|
|
|
|
|
do_irtl_hsw = has_hsw_msrs(family, model);
|
|
|
|
do_skl_residency = has_skl_msrs(family, model);
|
|
|
|
do_skl_residency = has_skl_msrs(family, model);
|
|
|
|
do_slm_cstates = is_slm(family, model);
|
|
|
|
do_slm_cstates = is_slm(family, model);
|
|
|
|
do_knl_cstates = is_knl(family, model);
|
|
|
|
do_knl_cstates = is_knl(family, model);
|
|
|
@ -3564,6 +3658,9 @@ void turbostat_init()
|
|
|
|
|
|
|
|
|
|
|
|
if (debug)
|
|
|
|
if (debug)
|
|
|
|
for_all_cpus(print_thermal, ODD_COUNTERS);
|
|
|
|
for_all_cpus(print_thermal, ODD_COUNTERS);
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
if (debug && do_irtl_snb)
|
|
|
|
|
|
|
|
print_irtl();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int fork_it(char **argv)
|
|
|
|
int fork_it(char **argv)
|
|
|
@ -3629,7 +3726,7 @@ int get_and_dump_counters(void)
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void print_version() {
|
|
|
|
void print_version() {
|
|
|
|
fprintf(outf, "turbostat version 4.11 27 Feb 2016"
|
|
|
|
fprintf(outf, "turbostat version 4.12 5 Apr 2016"
|
|
|
|
" - Len Brown <lenb@kernel.org>\n");
|
|
|
|
" - Len Brown <lenb@kernel.org>\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|