mfd: omap-usb-host: Remove TLL specific code from USB HS core driver
The TLL specific code such as channels clocks enable/disable, initialization functions are removed from the USBHS core driver. The hwmod of the usb tll is retrieved and omap device build is performed to created the platform device for the usb tll component. Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com> Reviewed-by: Partha Basak <parthab@india.ti.com> Acked-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
This commit is contained in:
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4dc2cceb5a
commit
760189b362
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@ -35,10 +35,12 @@
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#ifdef CONFIG_MFD_OMAP_USB_HOST
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#define OMAP_USBHS_DEVICE "usbhs_omap"
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#define OMAP_USBTLL_DEVICE "usbhs_tll"
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#define USBHS_UHH_HWMODNAME "usb_host_hs"
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#define USBHS_TLL_HWMODNAME "usb_tll_hs"
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static struct usbhs_omap_platform_data usbhs_data;
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static struct usbtll_omap_platform_data usbtll_data;
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static struct ehci_hcd_omap_platform_data ehci_data;
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static struct ohci_hcd_omap_platform_data ohci_data;
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@ -487,13 +489,14 @@ void __init setup_4430ohci_io_mux(const enum usbhs_omap_port_mode *port_mode)
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void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
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{
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struct omap_hwmod *oh[2];
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struct omap_hwmod *uhh_hwm, *tll_hwm;
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struct platform_device *pdev;
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int bus_id = -1;
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int i;
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for (i = 0; i < OMAP3_HS_USB_PORTS; i++) {
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usbhs_data.port_mode[i] = pdata->port_mode[i];
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usbtll_data.port_mode[i] = pdata->port_mode[i];
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ohci_data.port_mode[i] = pdata->port_mode[i];
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ehci_data.port_mode[i] = pdata->port_mode[i];
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ehci_data.reset_gpio_port[i] = pdata->reset_gpio_port[i];
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@ -512,25 +515,35 @@ void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
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setup_4430ohci_io_mux(pdata->port_mode);
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}
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oh[0] = omap_hwmod_lookup(USBHS_UHH_HWMODNAME);
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if (!oh[0]) {
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uhh_hwm = omap_hwmod_lookup(USBHS_UHH_HWMODNAME);
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if (!uhh_hwm) {
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pr_err("Could not look up %s\n", USBHS_UHH_HWMODNAME);
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return;
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}
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oh[1] = omap_hwmod_lookup(USBHS_TLL_HWMODNAME);
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if (!oh[1]) {
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tll_hwm = omap_hwmod_lookup(USBHS_TLL_HWMODNAME);
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if (!tll_hwm) {
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pr_err("Could not look up %s\n", USBHS_TLL_HWMODNAME);
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return;
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}
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pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
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(void *)&usbhs_data, sizeof(usbhs_data),
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pdev = omap_device_build(OMAP_USBTLL_DEVICE, bus_id, tll_hwm,
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&usbtll_data, sizeof(usbtll_data),
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omap_uhhtll_latency,
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ARRAY_SIZE(omap_uhhtll_latency), false);
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if (IS_ERR(pdev)) {
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pr_err("Could not build hwmod devices %s,%s\n",
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USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
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pr_err("Could not build hwmod device %s\n",
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USBHS_TLL_HWMODNAME);
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return;
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}
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pdev = omap_device_build(OMAP_USBHS_DEVICE, bus_id, uhh_hwm,
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&usbhs_data, sizeof(usbhs_data),
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omap_uhhtll_latency,
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ARRAY_SIZE(omap_uhhtll_latency), false);
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if (IS_ERR(pdev)) {
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pr_err("Could not build hwmod devices %s\n",
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USBHS_UHH_HWMODNAME);
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return;
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}
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}
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@ -35,63 +35,6 @@
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/* OMAP USBHOST Register addresses */
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/* TLL Register Set */
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#define OMAP_USBTLL_REVISION (0x00)
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#define OMAP_USBTLL_SYSCONFIG (0x10)
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#define OMAP_USBTLL_SYSCONFIG_CACTIVITY (1 << 8)
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#define OMAP_USBTLL_SYSCONFIG_SIDLEMODE (1 << 3)
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#define OMAP_USBTLL_SYSCONFIG_ENAWAKEUP (1 << 2)
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#define OMAP_USBTLL_SYSCONFIG_SOFTRESET (1 << 1)
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#define OMAP_USBTLL_SYSCONFIG_AUTOIDLE (1 << 0)
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#define OMAP_USBTLL_SYSSTATUS (0x14)
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#define OMAP_USBTLL_SYSSTATUS_RESETDONE (1 << 0)
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#define OMAP_USBTLL_IRQSTATUS (0x18)
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#define OMAP_USBTLL_IRQENABLE (0x1C)
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#define OMAP_TLL_SHARED_CONF (0x30)
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#define OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN (1 << 6)
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#define OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN (1 << 5)
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#define OMAP_TLL_SHARED_CONF_USB_DIVRATION (1 << 2)
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#define OMAP_TLL_SHARED_CONF_FCLK_REQ (1 << 1)
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#define OMAP_TLL_SHARED_CONF_FCLK_IS_ON (1 << 0)
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#define OMAP_TLL_CHANNEL_CONF(num) (0x040 + 0x004 * num)
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#define OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT 24
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#define OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF (1 << 11)
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#define OMAP_TLL_CHANNEL_CONF_ULPI_ULPIAUTOIDLE (1 << 10)
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#define OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE (1 << 9)
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#define OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE (1 << 8)
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#define OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS (1 << 1)
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#define OMAP_TLL_CHANNEL_CONF_CHANEN (1 << 0)
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#define OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0 0x0
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#define OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM 0x1
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#define OMAP_TLL_FSLSMODE_3PIN_PHY 0x2
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#define OMAP_TLL_FSLSMODE_4PIN_PHY 0x3
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#define OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0 0x4
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#define OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM 0x5
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#define OMAP_TLL_FSLSMODE_3PIN_TLL 0x6
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#define OMAP_TLL_FSLSMODE_4PIN_TLL 0x7
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#define OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0 0xA
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#define OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM 0xB
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#define OMAP_TLL_ULPI_FUNCTION_CTRL(num) (0x804 + 0x100 * num)
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#define OMAP_TLL_ULPI_INTERFACE_CTRL(num) (0x807 + 0x100 * num)
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#define OMAP_TLL_ULPI_OTG_CTRL(num) (0x80A + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_EN_RISE(num) (0x80D + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_EN_FALL(num) (0x810 + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_STATUS(num) (0x813 + 0x100 * num)
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#define OMAP_TLL_ULPI_INT_LATCH(num) (0x814 + 0x100 * num)
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#define OMAP_TLL_ULPI_DEBUG(num) (0x815 + 0x100 * num)
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#define OMAP_TLL_ULPI_SCRATCH_REGISTER(num) (0x816 + 0x100 * num)
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#define OMAP_TLL_CHANNEL_COUNT 3
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#define OMAP_TLL_CHANNEL_1_EN_MASK (1 << 0)
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#define OMAP_TLL_CHANNEL_2_EN_MASK (1 << 1)
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#define OMAP_TLL_CHANNEL_3_EN_MASK (1 << 2)
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/* UHH Register Set */
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#define OMAP_UHH_REVISION (0x00)
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#define OMAP_UHH_SYSCONFIG (0x10)
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@ -131,8 +74,6 @@
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#define OMAP4_P2_MODE_TLL (1 << 18)
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#define OMAP4_P2_MODE_HSIC (3 << 18)
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#define OMAP_REV2_TLL_CHANNEL_COUNT 2
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#define OMAP_UHH_DEBUG_CSR (0x44)
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/* Values of UHH_REVISION - Note: these are not given in the TRM */
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@ -152,15 +93,12 @@ struct usbhs_hcd_omap {
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struct clk *xclk60mhsp2_ck;
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struct clk *utmi_p1_fck;
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struct clk *usbhost_p1_fck;
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struct clk *usbtll_p1_fck;
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struct clk *utmi_p2_fck;
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struct clk *usbhost_p2_fck;
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struct clk *usbtll_p2_fck;
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struct clk *init_60m_fclk;
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struct clk *ehci_logic_fck;
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void __iomem *uhh_base;
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void __iomem *tll_base;
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struct usbhs_omap_platform_data platdata;
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@ -335,93 +273,6 @@ static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
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}
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}
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/*
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* convert the port-mode enum to a value we can use in the FSLSMODE
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* field of USBTLL_CHANNEL_CONF
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*/
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static unsigned ohci_omap3_fslsmode(enum usbhs_omap_port_mode mode)
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{
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switch (mode) {
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case OMAP_USBHS_PORT_MODE_UNUSED:
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
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case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DP_DM;
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case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_3PIN_PHY;
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case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
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return OMAP_TLL_FSLSMODE_4PIN_PHY;
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_6PIN_TLL_DAT_SE0;
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case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
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return OMAP_TLL_FSLSMODE_6PIN_TLL_DP_DM;
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case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_3PIN_TLL;
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case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
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return OMAP_TLL_FSLSMODE_4PIN_TLL;
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
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return OMAP_TLL_FSLSMODE_2PIN_TLL_DAT_SE0;
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case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
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return OMAP_TLL_FSLSMODE_2PIN_DAT_DP_DM;
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default:
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pr_warning("Invalid port mode, using default\n");
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return OMAP_TLL_FSLSMODE_6PIN_PHY_DAT_SE0;
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}
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}
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static void usbhs_omap_tll_init(struct device *dev, u8 tll_channel_count)
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{
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struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
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struct usbhs_omap_platform_data *pdata = dev->platform_data;
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unsigned reg;
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int i;
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/* Program Common TLL register */
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reg = usbhs_read(omap->tll_base, OMAP_TLL_SHARED_CONF);
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reg |= (OMAP_TLL_SHARED_CONF_FCLK_IS_ON
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| OMAP_TLL_SHARED_CONF_USB_DIVRATION);
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reg &= ~OMAP_TLL_SHARED_CONF_USB_90D_DDR_EN;
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reg &= ~OMAP_TLL_SHARED_CONF_USB_180D_SDR_EN;
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usbhs_write(omap->tll_base, OMAP_TLL_SHARED_CONF, reg);
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/* Enable channels now */
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for (i = 0; i < tll_channel_count; i++) {
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reg = usbhs_read(omap->tll_base,
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OMAP_TLL_CHANNEL_CONF(i));
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if (is_ohci_port(pdata->port_mode[i])) {
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reg |= ohci_omap3_fslsmode(pdata->port_mode[i])
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<< OMAP_TLL_CHANNEL_CONF_FSLSMODE_SHIFT;
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reg |= OMAP_TLL_CHANNEL_CONF_CHANMODE_FSLS;
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} else if (pdata->port_mode[i] == OMAP_EHCI_PORT_MODE_TLL) {
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/* Disable AutoIdle, BitStuffing and use SDR Mode */
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reg &= ~(OMAP_TLL_CHANNEL_CONF_UTMIAUTOIDLE
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| OMAP_TLL_CHANNEL_CONF_ULPINOBITSTUFF
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| OMAP_TLL_CHANNEL_CONF_ULPIDDRMODE);
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} else
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continue;
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reg |= OMAP_TLL_CHANNEL_CONF_CHANEN;
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usbhs_write(omap->tll_base,
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OMAP_TLL_CHANNEL_CONF(i), reg);
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usbhs_writeb(omap->tll_base,
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OMAP_TLL_ULPI_SCRATCH_REGISTER(i), 0xbe);
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}
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}
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static int usbhs_runtime_resume(struct device *dev)
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{
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struct usbhs_hcd_omap *omap = dev_get_drvdata(dev);
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@ -441,14 +292,11 @@ static int usbhs_runtime_resume(struct device *dev)
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if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
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clk_enable(omap->ehci_logic_fck);
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if (is_ehci_tll_mode(pdata->port_mode[0])) {
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if (is_ehci_tll_mode(pdata->port_mode[0]))
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clk_enable(omap->usbhost_p1_fck);
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clk_enable(omap->usbtll_p1_fck);
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}
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if (is_ehci_tll_mode(pdata->port_mode[1])) {
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if (is_ehci_tll_mode(pdata->port_mode[1]))
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clk_enable(omap->usbhost_p2_fck);
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clk_enable(omap->usbtll_p2_fck);
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}
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clk_enable(omap->utmi_p1_fck);
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clk_enable(omap->utmi_p2_fck);
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@ -472,14 +320,11 @@ static int usbhs_runtime_suspend(struct device *dev)
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spin_lock_irqsave(&omap->lock, flags);
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if (is_ehci_tll_mode(pdata->port_mode[0])) {
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if (is_ehci_tll_mode(pdata->port_mode[0]))
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clk_disable(omap->usbhost_p1_fck);
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clk_disable(omap->usbtll_p1_fck);
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}
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if (is_ehci_tll_mode(pdata->port_mode[1])) {
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if (is_ehci_tll_mode(pdata->port_mode[1]))
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clk_disable(omap->usbhost_p2_fck);
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clk_disable(omap->usbtll_p2_fck);
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}
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clk_disable(omap->utmi_p2_fck);
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clk_disable(omap->utmi_p1_fck);
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@ -501,8 +346,6 @@ static void omap_usbhs_init(struct device *dev)
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dev_dbg(dev, "starting TI HSUSB Controller\n");
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pm_runtime_get_sync(dev);
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if (pdata->ehci_data->phy_reset) {
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if (gpio_is_valid(pdata->ehci_data->reset_gpio_port[0]))
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gpio_request_one(pdata->ehci_data->reset_gpio_port[0],
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@ -516,6 +359,7 @@ static void omap_usbhs_init(struct device *dev)
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udelay(10);
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}
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pm_runtime_get_sync(dev);
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spin_lock_irqsave(&omap->lock, flags);
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omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION);
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dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev);
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@ -581,22 +425,9 @@ static void omap_usbhs_init(struct device *dev)
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usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
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dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
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if (is_ehci_tll_mode(pdata->port_mode[0]) ||
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is_ehci_tll_mode(pdata->port_mode[1]) ||
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is_ehci_tll_mode(pdata->port_mode[2]) ||
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(is_ohci_port(pdata->port_mode[0])) ||
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(is_ohci_port(pdata->port_mode[1])) ||
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(is_ohci_port(pdata->port_mode[2]))) {
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/* Enable UTMI mode for required TLL channels */
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if (is_omap_usbhs_rev2(omap))
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usbhs_omap_tll_init(dev, OMAP_REV2_TLL_CHANNEL_COUNT);
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else
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usbhs_omap_tll_init(dev, OMAP_TLL_CHANNEL_COUNT);
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}
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spin_unlock_irqrestore(&omap->lock, flags);
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pm_runtime_put_sync(dev);
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if (pdata->ehci_data->phy_reset) {
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/* Hold the PHY in RESET for enough time till
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* PHY is settled and ready
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@ -611,8 +442,6 @@ static void omap_usbhs_init(struct device *dev)
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gpio_set_value_cansleep
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(pdata->ehci_data->reset_gpio_port[1], 1);
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}
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pm_runtime_put_sync(dev);
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}
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static void omap_usbhs_deinit(struct device *dev)
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@ -715,32 +544,18 @@ static int __devinit usbhs_omap_probe(struct platform_device *pdev)
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goto err_xclk60mhsp2_ck;
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}
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omap->usbtll_p1_fck = clk_get(dev, "usb_tll_hs_usb_ch0_clk");
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if (IS_ERR(omap->usbtll_p1_fck)) {
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ret = PTR_ERR(omap->usbtll_p1_fck);
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dev_err(dev, "usbtll_p1_fck failed error:%d\n", ret);
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goto err_usbhost_p1_fck;
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}
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omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk");
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if (IS_ERR(omap->usbhost_p2_fck)) {
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ret = PTR_ERR(omap->usbhost_p2_fck);
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dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret);
|
||||
goto err_usbtll_p1_fck;
|
||||
}
|
||||
|
||||
omap->usbtll_p2_fck = clk_get(dev, "usb_tll_hs_usb_ch1_clk");
|
||||
if (IS_ERR(omap->usbtll_p2_fck)) {
|
||||
ret = PTR_ERR(omap->usbtll_p2_fck);
|
||||
dev_err(dev, "usbtll_p2_fck failed error:%d\n", ret);
|
||||
goto err_usbhost_p2_fck;
|
||||
goto err_usbhost_p1_fck;
|
||||
}
|
||||
|
||||
omap->init_60m_fclk = clk_get(dev, "init_60m_fclk");
|
||||
if (IS_ERR(omap->init_60m_fclk)) {
|
||||
ret = PTR_ERR(omap->init_60m_fclk);
|
||||
dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
|
||||
goto err_usbtll_p2_fck;
|
||||
goto err_usbhost_p2_fck;
|
||||
}
|
||||
|
||||
if (is_ehci_phy_mode(pdata->port_mode[0])) {
|
||||
|
@ -786,20 +601,6 @@ static int __devinit usbhs_omap_probe(struct platform_device *pdev)
|
|||
goto err_init_60m_fclk;
|
||||
}
|
||||
|
||||
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "tll");
|
||||
if (!res) {
|
||||
dev_err(dev, "UHH EHCI get resource failed\n");
|
||||
ret = -ENODEV;
|
||||
goto err_tll;
|
||||
}
|
||||
|
||||
omap->tll_base = ioremap(res->start, resource_size(res));
|
||||
if (!omap->tll_base) {
|
||||
dev_err(dev, "TLL ioremap failed\n");
|
||||
ret = -ENOMEM;
|
||||
goto err_tll;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, omap);
|
||||
|
||||
omap_usbhs_init(dev);
|
||||
|
@ -813,23 +614,14 @@ static int __devinit usbhs_omap_probe(struct platform_device *pdev)
|
|||
|
||||
err_alloc:
|
||||
omap_usbhs_deinit(&pdev->dev);
|
||||
iounmap(omap->tll_base);
|
||||
|
||||
err_tll:
|
||||
iounmap(omap->uhh_base);
|
||||
|
||||
err_init_60m_fclk:
|
||||
clk_put(omap->init_60m_fclk);
|
||||
|
||||
err_usbtll_p2_fck:
|
||||
clk_put(omap->usbtll_p2_fck);
|
||||
|
||||
err_usbhost_p2_fck:
|
||||
clk_put(omap->usbhost_p2_fck);
|
||||
|
||||
err_usbtll_p1_fck:
|
||||
clk_put(omap->usbtll_p1_fck);
|
||||
|
||||
err_usbhost_p1_fck:
|
||||
clk_put(omap->usbhost_p1_fck);
|
||||
|
||||
|
@ -865,12 +657,9 @@ static int __devexit usbhs_omap_remove(struct platform_device *pdev)
|
|||
struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
|
||||
|
||||
omap_usbhs_deinit(&pdev->dev);
|
||||
iounmap(omap->tll_base);
|
||||
iounmap(omap->uhh_base);
|
||||
clk_put(omap->init_60m_fclk);
|
||||
clk_put(omap->usbtll_p2_fck);
|
||||
clk_put(omap->usbhost_p2_fck);
|
||||
clk_put(omap->usbtll_p1_fck);
|
||||
clk_put(omap->usbhost_p1_fck);
|
||||
clk_put(omap->xclk60mhsp2_ck);
|
||||
clk_put(omap->utmi_p2_fck);
|
||||
|
|
Loading…
Reference in a new issue