MLK-19595 arm: dts: imx: add emmc, nand and btwifi support on imx6ulz
note for the rework: eMMC on EVK board has pad conflict with NAND and Micro-SD. NAND on EVK board has pin conflict with QSPI and SD2(eMMC). Signed-off-by: Robby Cai <robby.cai@nxp.com> Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>pull/10/head
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80aa74175d
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765b3e574d
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@ -592,7 +592,11 @@ dtb-$(CONFIG_SOC_IMX6ULL) += \
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imx6ull-9x9-evk-btwifi.dtb \
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imx6ull-9x9-evk-btwifi-oob.dtb \
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imx6ull-9x9-evk-ldo.dtb \
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imx6ulz-14x14-evk.dtb
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imx6ulz-14x14-evk.dtb \
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imx6ulz-14x14-evk-btwifi.dtb \
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imx6ulz-14x14-evk-btwifi-oob.dtb \
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imx6ulz-14x14-evk-emmc.dtb \
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imx6ulz-14x14-evk-gpmi-weim.dtb
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dtb-$(CONFIG_SOC_IMX6SLL) += \
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imx6sll-lpddr2-arm2.dtb \
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imx6sll-lpddr3-arm2.dtb \
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@ -0,0 +1,16 @@
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/*
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* Copyright 2018 NXP
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "imx6ulz-14x14-evk-btwifi.dts"
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#include "imx6ul-evk-btwifi-oob.dtsi"
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@ -0,0 +1,16 @@
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/*
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* Copyright 2018 NXP
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "imx6ulz-14x14-evk.dts"
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#include "imx6ul-evk-btwifi.dtsi"
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@ -0,0 +1,25 @@
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/*
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* Copyright 2018 NXP
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "imx6ulz-14x14-evk.dts"
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&usdhc2 {
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pinctrl-names = "default", "state_100mhz", "state_200mhz";
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pinctrl-0 = <&pinctrl_usdhc2_8bit>;
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pinctrl-1 = <&pinctrl_usdhc2_8bit_100mhz>;
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pinctrl-2 = <&pinctrl_usdhc2_8bit_200mhz>;
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bus-width = <8>;
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non-removable;
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status = "okay";
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};
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@ -0,0 +1,55 @@
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/*
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* Copyright 2018 NXP
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "imx6ulz-14x14-evk.dts"
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&gpmi {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpmi_nand_1>;
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status = "okay";
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nand-on-flash-bbt;
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};
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&iomuxc {
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imx6ulz-evk-gpmi-rework {
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pinctrl_gpmi_nand_1: gpmi-nand-1 {
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fsl,pins = <
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MX6UL_PAD_NAND_CLE__RAWNAND_CLE 0xb0b1
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MX6UL_PAD_NAND_ALE__RAWNAND_ALE 0xb0b1
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MX6UL_PAD_NAND_WP_B__RAWNAND_WP_B 0xb0b1
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MX6UL_PAD_NAND_READY_B__RAWNAND_READY_B 0xb000
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MX6UL_PAD_NAND_CE0_B__RAWNAND_CE0_B 0xb0b1
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MX6UL_PAD_NAND_CE1_B__RAWNAND_CE1_B 0xb0b1
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MX6UL_PAD_NAND_RE_B__RAWNAND_RE_B 0xb0b1
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MX6UL_PAD_NAND_WE_B__RAWNAND_WE_B 0xb0b1
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MX6UL_PAD_NAND_DATA00__RAWNAND_DATA00 0xb0b1
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MX6UL_PAD_NAND_DATA01__RAWNAND_DATA01 0xb0b1
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MX6UL_PAD_NAND_DATA02__RAWNAND_DATA02 0xb0b1
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MX6UL_PAD_NAND_DATA03__RAWNAND_DATA03 0xb0b1
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MX6UL_PAD_NAND_DATA04__RAWNAND_DATA04 0xb0b1
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MX6UL_PAD_NAND_DATA05__RAWNAND_DATA05 0xb0b1
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MX6UL_PAD_NAND_DATA06__RAWNAND_DATA06 0xb0b1
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MX6UL_PAD_NAND_DATA07__RAWNAND_DATA07 0xb0b1
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>;
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};
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};
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};
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&qspi {
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status = "disabled";
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};
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&usdhc2 {
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status = "disabled";
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};
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