[PATCH] powerpc: Save device BARs much earlier in the boot sequence
241-eeh-save-bars-earlier.patch Save the PCI device bars *before* any PCI probing is done. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org> (cherry picked from 76c902b919098860f3d4e125f847abcc4cb1782a commit)
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@ -72,7 +72,7 @@ static int of_device_available(struct device_node * dn)
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return 0;
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}
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static int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
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int rtas_read_config(struct pci_dn *pdn, int where, int size, u32 *val)
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{
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int returnval = -1;
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unsigned long buid, addr;
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@ -106,6 +106,8 @@ static DEFINE_PER_CPU(unsigned long, false_positives);
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static DEFINE_PER_CPU(unsigned long, ignored_failures);
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static DEFINE_PER_CPU(unsigned long, slot_resets);
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#define IS_BRIDGE(class_code) (((class_code)<<16) == PCI_BASE_CLASS_BRIDGE)
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/* --------------------------------------------------------------- */
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/* Below lies the EEH event infrastructure */
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@ -620,7 +622,7 @@ void eeh_restore_bars(struct pci_dn *pdn)
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if (!pdn)
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return;
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if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && (!pdn->eeh_is_bridge))
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if ((pdn->eeh_mode & EEH_MODE_SUPPORTED) && !IS_BRIDGE(pdn->class_code))
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__restore_bars (pdn);
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dn = pdn->node->child;
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@ -638,18 +640,15 @@ void eeh_restore_bars(struct pci_dn *pdn)
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* PCI devices are added individuallly; but, for the restore,
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* an entire slot is reset at a time.
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*/
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void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn)
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static void eeh_save_bars(struct pci_dn *pdn)
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{
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int i;
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if (!pdev || !pdn )
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if (!pdn )
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return;
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for (i = 0; i < 16; i++)
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pci_read_config_dword(pdev, i * 4, &pdn->config_space[i]);
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if (pdev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
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pdn->eeh_is_bridge = 1;
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rtas_read_config(pdn, i * 4, 4, &pdn->config_space[i]);
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}
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void
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@ -699,6 +698,7 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
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int enable;
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struct pci_dn *pdn = PCI_DN(dn);
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pdn->class_code = *class_code;
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pdn->eeh_mode = 0;
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pdn->eeh_check_count = 0;
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pdn->eeh_freeze_count = 0;
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@ -781,6 +781,7 @@ static void *early_enable_eeh(struct device_node *dn, void *data)
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dn->full_name);
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}
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eeh_save_bars(pdn);
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return NULL;
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}
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@ -915,7 +916,6 @@ void eeh_add_device_late(struct pci_dev *dev)
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pdn->pcidev = dev;
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pci_addr_cache_insert_device (dev);
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eeh_save_bars(dev, pdn);
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}
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EXPORT_SYMBOL_GPL(eeh_add_device_late);
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@ -304,10 +304,7 @@ void __init pci_addr_cache_build(void)
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pci_addr_cache_insert_device(dev);
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/* Save the BAR's; firmware doesn't restore these after EEH reset */
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dn = pci_device_to_OF_node(dev);
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eeh_save_bars(dev, PCI_DN(dn));
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pci_dev_get (dev); /* matching put is in eeh_remove_device() */
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PCI_DN(dn)->pcidev = dev;
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}
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@ -61,9 +61,10 @@ struct pci_controller;
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struct iommu_table;
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struct pci_dn {
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int busno; /* for pci devices */
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int bussubno; /* for pci devices */
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int devfn; /* for pci devices */
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int busno; /* pci bus number */
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int bussubno; /* pci subordinate bus number */
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int devfn; /* pci device and function number */
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int class_code; /* pci device class */
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#ifdef CONFIG_PPC_PSERIES
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int eeh_mode; /* See eeh.h for possible EEH_MODEs */
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@ -71,7 +72,6 @@ struct pci_dn {
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int eeh_pe_config_addr; /* new-style partition endpoint address */
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int eeh_check_count; /* # times driver ignored error */
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int eeh_freeze_count; /* # times this device froze up. */
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int eeh_is_bridge; /* device is pci-to-pci bridge */
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#endif
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int pci_ext_config_space; /* for pci devices */
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struct pci_controller *phb; /* for pci devices */
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@ -58,8 +58,6 @@ void pci_addr_cache_remove_device(struct pci_dev *dev);
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void pci_addr_cache_build(void);
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struct pci_dev *pci_get_device_by_addr(unsigned long addr);
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void eeh_save_bars(struct pci_dev * pdev, struct pci_dn *pdn);
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/**
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* eeh_slot_error_detail -- record and EEH error condition to the log
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* @severity: 1 if temporary, 2 if permanent failure.
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@ -103,6 +101,7 @@ void eeh_restore_bars(struct pci_dn *);
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void rtas_configure_bridge(struct pci_dn *);
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int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
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int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
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/**
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* mark and clear slots: find "partition endpoint" PE and set or
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