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arm64: dts: rockchip: add reset saradc node for rk3368 SoCs

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SARADC controller needs to be reset before programming it, otherwise
it will not function properly.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Cc: <Stable@vger.kernel.org>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Caesar Wang 2016-07-27 22:24:06 +08:00 committed by Jonathan Cameron
parent 543852af8e
commit 78ec79bfd5
1 changed files with 2 additions and 0 deletions
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2
arch/arm64/boot/dts/rockchip/rk3368.dtsi
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@ -270,6 +270,8 @@
#io-channel-cells = <1>;
clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
clock-names = "saradc", "apb_pclk";
resets = <&cru SRST_SARADC>;
reset-names = "saradc-apb";
status = "disabled";
};