clk: divider: add CLK_DIVIDER_READ_ONLY flag
From: Heiko Stuebner <heiko@sntech.de> Similar to muxes which already have a read-only flag there sometimes exist dividers which should not be changed by the clock framework but whose value still should be readable. Therefore add a READ_ONLY flag similar to the mux-one to clk-divider Signed-off-by: Heiko Stuebner <heiko@sntech.de> [changed flag bit to BIT(5) as suggested by Tomasz Figa] Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Acked-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Max Schwarz <max.schwarz@online.de> Tested-by: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -361,6 +361,11 @@ const struct clk_ops clk_divider_ops = {
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};
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EXPORT_SYMBOL_GPL(clk_divider_ops);
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const struct clk_ops clk_divider_ro_ops = {
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.recalc_rate = clk_divider_recalc_rate,
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};
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EXPORT_SYMBOL_GPL(clk_divider_ro_ops);
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static struct clk *_register_divider(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 shift, u8 width,
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@ -386,7 +391,10 @@ static struct clk *_register_divider(struct device *dev, const char *name,
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}
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init.name = name;
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init.ops = &clk_divider_ops;
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if (clk_divider_flags & CLK_DIVIDER_READ_ONLY)
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init.ops = &clk_divider_ro_ops;
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else
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init.ops = &clk_divider_ops;
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init.flags = flags | CLK_IS_BASIC;
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init.parent_names = (parent_name ? &parent_name: NULL);
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init.num_parents = (parent_name ? 1 : 0);
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@ -320,6 +320,8 @@ struct clk_div_table {
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* updated to indicate changing divider bits.
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* CLK_DIVIDER_ROUND_CLOSEST - Makes the best calculated divider to be rounded
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* to the closest integer instead of the up one.
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* CLK_DIVIDER_READ_ONLY - The divider settings are preconfigured and should
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* not be changed by the clock framework.
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*/
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struct clk_divider {
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struct clk_hw hw;
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@ -336,8 +338,10 @@ struct clk_divider {
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#define CLK_DIVIDER_ALLOW_ZERO BIT(2)
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#define CLK_DIVIDER_HIWORD_MASK BIT(3)
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#define CLK_DIVIDER_ROUND_CLOSEST BIT(4)
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#define CLK_DIVIDER_READ_ONLY BIT(5)
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extern const struct clk_ops clk_divider_ops;
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extern const struct clk_ops clk_divider_ro_ops;
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struct clk *clk_register_divider(struct device *dev, const char *name,
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const char *parent_name, unsigned long flags,
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void __iomem *reg, u8 shift, u8 width,
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