MLK-16075-11 gpu: imx: dpu: Add basic fetcheco units support
This patch adds basic fetcheco units support. Signed-off-by: Liu Ying <victor.liu@nxp.com>pull/10/head
Liu Ying
Jason Liu
parent
c8667523aa
commit
79d9ad555b
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@ -1,6 +1,6 @@
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obj-$(CONFIG_IMX_DPU_CORE) += imx-dpu-core.o
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imx-dpu-core-objs := dpu-common.o dpu-constframe.o dpu-disengcfg.o \
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dpu-extdst.o dpu-fetchdecode.o dpu-framegen.o \
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dpu-fetchlayer.o dpu-hscaler.o dpu-layerblend.o \
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dpu-tcon.o dpu-vscaler.o
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dpu-extdst.o dpu-fetchdecode.o dpu-fetcheco.o \
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dpu-framegen.o dpu-fetchlayer.o dpu-hscaler.o \
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dpu-layerblend.o dpu-tcon.o dpu-vscaler.o
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@ -162,6 +162,12 @@ static const unsigned long fd_ofss_v2[] = {0x6c00, 0x7800};
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static const unsigned long fd_pec_ofss_v1[] = {0xb60, 0xb80, 0xb00, 0xb20};
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static const unsigned long fd_pec_ofss_v2[] = {0xa80, 0xaa0};
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/* Fetch ECO Unit */
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static const unsigned long fe_ofss_v1[] = {0x9400, 0xa000, 0x8800, 0x1c00};
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static const unsigned long fe_ofss_v2[] = {0x7400, 0x8000, 0x6800, 0x1c00};
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static const unsigned long fe_pec_ofss_v1[] = {0xb70, 0xb90, 0xb50, 0x870};
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static const unsigned long fe_pec_ofss_v2[] = {0xa90, 0xab0, 0xa70, 0x850};
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/* Frame Generator Unit */
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static const unsigned long fg_ofss_v1[] = {0x10c00, 0x12800};
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static const unsigned long fg_ofss_v2[] = {0xb800, 0xd400};
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@ -260,6 +266,22 @@ static const struct dpu_unit fds_v2 = {
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.ofss = fd_ofss_v2,
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};
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static const struct dpu_unit fes_v1 = {
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.name = "FetchECO",
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.num = ARRAY_SIZE(fe_ids),
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.ids = fe_ids,
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.pec_ofss = fe_pec_ofss_v1,
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.ofss = fe_ofss_v1,
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};
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static const struct dpu_unit fes_v2 = {
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.name = "FetchECO",
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.num = ARRAY_SIZE(fe_ids),
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.ids = fe_ids,
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.pec_ofss = fe_pec_ofss_v2,
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.ofss = fe_ofss_v2,
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};
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static const struct dpu_unit fgs_v1 = {
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.name = "FrameGen",
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.num = ARRAY_SIZE(fg_ids),
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@ -453,13 +475,13 @@ static const unsigned int sw2hw_irq_map_v2[] = {
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/* FIXME: overkill for some N/As, revive them when needed */
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static const unsigned int sw2hw_block_id_map_v2[] = {
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/* 0 1 2 3 4 5 6 7 */
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0x00, NA, NA, NA, NA, NA, NA, 0x07,
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0x00, NA, NA, 0x03, NA, NA, NA, 0x07,
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/* 8 9 10 11 12 13 14 15 */
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0x08, NA, 0x0a, NA, 0x0c, NA, 0x0e, NA,
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/* 16 17 18 19 20 21 22 23 */
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0x10, NA, 0x12, NA, NA, NA, NA, NA,
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/* 24 25 26 27 28 29 30 31 */
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NA, NA, 0x14, NA, 0x16, NA, 0x18, NA,
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NA, NA, 0x14, 0x15, 0x16, 0x17, 0x18, 0x19,
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/* 32 33 34 35 36 37 38 39 */
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0x1a, NA, NA, 0x1b, 0x1c, 0x1d, NA, NA,
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/* 40 41 42 43 44 45 46 47 */
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@ -478,6 +500,7 @@ static const struct dpu_devtype dpu_type_v1 = {
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.decs = &decs_v1,
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.eds = &eds_v1,
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.fds = &fds_v1,
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.fes = &fes_v1,
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.fgs = &fgs_v1,
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.fls = &fls_v1,
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.hss = &hss_v1,
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@ -500,6 +523,7 @@ static const struct dpu_devtype dpu_type_v2 = {
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.decs = &decs_v2,
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.eds = &eds_v2,
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.fds = &fds_v2,
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.fes = &fes_v2,
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.fgs = &fgs_v2,
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.fls = &fls_v2,
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.hss = &hss_v2,
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@ -650,6 +674,7 @@ static int dpu_submodules_init(struct dpu_soc *dpu,
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DPU_UNITS_INIT(dec);
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DPU_UNITS_INIT(ed);
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DPU_UNITS_INIT(fd);
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DPU_UNITS_INIT(fe);
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DPU_UNITS_INIT(fg);
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DPU_UNITS_INIT(fl);
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DPU_UNITS_INIT(hs);
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@ -1387,6 +1412,7 @@ static int dpu_probe(struct platform_device *pdev)
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DPU_UNITS_ADDR_DBG(dec);
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DPU_UNITS_ADDR_DBG(ed);
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DPU_UNITS_ADDR_DBG(fd);
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DPU_UNITS_ADDR_DBG(fe);
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DPU_UNITS_ADDR_DBG(fg);
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DPU_UNITS_ADDR_DBG(fl);
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DPU_UNITS_ADDR_DBG(hs);
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@ -0,0 +1,512 @@
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/*
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* Copyright 2017 NXP
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#include <video/dpu.h>
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#include "dpu-prv.h"
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#define BASEADDRESS0 0x10
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#define SOURCEBUFFERATTRIBUTES0 0x14
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#define SOURCEBUFFERDIMENSION0 0x18
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#define COLORCOMPONENTBITS0 0x1C
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#define COLORCOMPONENTSHIFT0 0x20
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#define LAYEROFFSET0 0x24
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#define CLIPWINDOWOFFSET0 0x28
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#define CLIPWINDOWDIMENSIONS0 0x2C
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#define CONSTANTCOLOR0 0x30
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#define LAYERPROPERTY0 0x34
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#define FRAMEDIMENSIONS 0x38
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#define FRAMERESAMPLING 0x3C
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#define CONTROL 0x40
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#define CONTROLTRIGGER 0x44
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#define START 0x48
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#define FETCHTYPE 0x4C
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#define BURSTBUFFERPROPERTIES 0x50
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#define HIDDENSTATUS 0x54
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struct dpu_fetcheco {
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void __iomem *pec_base;
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void __iomem *base;
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struct mutex mutex;
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int id;
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bool inuse;
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struct dpu_soc *dpu;
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/* see DPU_PLANE_SRC_xxx */
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unsigned int stream_id;
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};
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static inline u32 dpu_pec_fe_read(struct dpu_fetcheco *fe, unsigned int offset)
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{
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return readl(fe->pec_base + offset);
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}
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static inline void dpu_pec_fe_write(struct dpu_fetcheco *fe, u32 value,
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unsigned int offset)
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{
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writel(value, fe->pec_base + offset);
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}
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static inline u32 dpu_fe_read(struct dpu_fetcheco *fe, unsigned int offset)
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{
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return readl(fe->base + offset);
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}
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static inline void dpu_fe_write(struct dpu_fetcheco *fe, u32 value,
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unsigned int offset)
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{
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writel(value, fe->base + offset);
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}
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void fetcheco_shden(struct dpu_fetcheco *fe, bool enable)
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{
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u32 val;
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mutex_lock(&fe->mutex);
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val = dpu_fe_read(fe, STATICCONTROL);
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if (enable)
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val |= SHDEN;
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else
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val &= ~SHDEN;
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dpu_fe_write(fe, val, STATICCONTROL);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_shden);
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void fetcheco_baseaddress(struct dpu_fetcheco *fe, dma_addr_t paddr)
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{
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mutex_lock(&fe->mutex);
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dpu_fe_write(fe, paddr, BASEADDRESS0);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_baseaddress);
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void fetcheco_source_bpp(struct dpu_fetcheco *fe, int bpp)
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{
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u32 val;
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mutex_lock(&fe->mutex);
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val = dpu_fe_read(fe, SOURCEBUFFERATTRIBUTES0);
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val &= ~0x3f0000;
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val |= BITSPERPIXEL(bpp);
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dpu_fe_write(fe, val, SOURCEBUFFERATTRIBUTES0);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_source_bpp);
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void fetcheco_source_stride(struct dpu_fetcheco *fe, int stride)
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{
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u32 val;
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mutex_lock(&fe->mutex);
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val = dpu_fe_read(fe, SOURCEBUFFERATTRIBUTES0);
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val &= ~0xffff;
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val |= STRIDE(stride);
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dpu_fe_write(fe, val, SOURCEBUFFERATTRIBUTES0);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_source_stride);
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void fetcheco_src_buf_dimensions(struct dpu_fetcheco *fe, unsigned int w,
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unsigned int h, u32 fmt)
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{
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int width = dpu_format_plane_width(w, fmt, 1);
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int height = dpu_format_plane_height(h, fmt, 1);
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u32 val;
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switch (fmt) {
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case DRM_FORMAT_NV12:
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case DRM_FORMAT_NV21:
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case DRM_FORMAT_NV16:
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case DRM_FORMAT_NV61:
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case DRM_FORMAT_NV24:
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case DRM_FORMAT_NV42:
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break;
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default:
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WARN(1, "Unsupported FetchEco pixel format 0x%08x\n", fmt);
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return;
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}
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val = LINEWIDTH(width) | LINECOUNT(height);
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mutex_lock(&fe->mutex);
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dpu_fe_write(fe, val, SOURCEBUFFERDIMENSION0);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_src_buf_dimensions);
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void fetcheco_set_fmt(struct dpu_fetcheco *fe, u32 fmt)
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{
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u32 val, bits, shift;
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int i, hsub, vsub;
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unsigned int x, y;
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switch (fmt) {
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case DRM_FORMAT_NV12:
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case DRM_FORMAT_NV21:
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case DRM_FORMAT_NV16:
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case DRM_FORMAT_NV61:
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case DRM_FORMAT_NV24:
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case DRM_FORMAT_NV42:
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break;
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default:
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WARN(1, "Unsupported FetchEco pixel format 0x%08x\n", fmt);
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return;
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}
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hsub = dpu_format_horz_chroma_subsampling(fmt);
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switch (hsub) {
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case 1:
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x = 0x4;
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break;
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case 2:
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x = 0x2;
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break;
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default:
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WARN_ON(1);
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return;
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}
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vsub = dpu_format_vert_chroma_subsampling(fmt);
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switch (vsub) {
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case 1:
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y = 0x4;
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break;
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case 2:
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y = 0x2;
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break;
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default:
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WARN_ON(1);
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return;
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}
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mutex_lock(&fe->mutex);
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val = dpu_fe_read(fe, FRAMERESAMPLING);
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val &= ~(DELTAX_MASK | DELTAY_MASK);
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val |= DELTAX(x) | DELTAY(y);
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dpu_fe_write(fe, val, FRAMERESAMPLING);
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val = dpu_fe_read(fe, CONTROL);
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val &= ~RASTERMODE_MASK;
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val |= RASTERMODE(RASTERMODE__NORMAL);
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dpu_fe_write(fe, val, CONTROL);
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mutex_unlock(&fe->mutex);
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for (i = 0; i < ARRAY_SIZE(dpu_pixel_format_matrix); i++) {
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if (dpu_pixel_format_matrix[i].pixel_format == fmt) {
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bits = dpu_pixel_format_matrix[i].bits;
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shift = dpu_pixel_format_matrix[i].shift;
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bits &= ~Y_BITS_MASK;
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shift &= ~Y_SHIFT_MASK;
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mutex_lock(&fe->mutex);
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dpu_fe_write(fe, bits, COLORCOMPONENTBITS0);
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dpu_fe_write(fe, shift, COLORCOMPONENTSHIFT0);
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mutex_unlock(&fe->mutex);
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return;
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}
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}
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WARN_ON(1);
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}
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EXPORT_SYMBOL_GPL(fetcheco_set_fmt);
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void fetcheco_layeroffset(struct dpu_fetcheco *fe, unsigned int x,
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unsigned int y)
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{
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u32 val;
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val = LAYERXOFFSET(x) | LAYERYOFFSET(y);
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mutex_lock(&fe->mutex);
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dpu_fe_write(fe, val, LAYEROFFSET0);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_layeroffset);
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void fetcheco_clipoffset(struct dpu_fetcheco *fe, unsigned int x,
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unsigned int y)
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{
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u32 val;
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val = CLIPWINDOWXOFFSET(x) | CLIPWINDOWYOFFSET(y);
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mutex_lock(&fe->mutex);
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dpu_fe_write(fe, val, CLIPWINDOWOFFSET0);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_clipoffset);
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void fetcheco_clipdimensions(struct dpu_fetcheco *fe, unsigned int w,
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unsigned int h)
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{
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u32 val;
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val = CLIPWINDOWWIDTH(w) | CLIPWINDOWHEIGHT(h);
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mutex_lock(&fe->mutex);
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dpu_fe_write(fe, val, CLIPWINDOWDIMENSIONS0);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_clipdimensions);
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void fetcheco_source_buffer_enable(struct dpu_fetcheco *fe)
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{
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u32 val;
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mutex_lock(&fe->mutex);
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val = dpu_fe_read(fe, LAYERPROPERTY0);
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val |= SOURCEBUFFERENABLE;
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dpu_fe_write(fe, val, LAYERPROPERTY0);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_source_buffer_enable);
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void fetcheco_source_buffer_disable(struct dpu_fetcheco *fe)
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{
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u32 val;
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mutex_lock(&fe->mutex);
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val = dpu_fe_read(fe, LAYERPROPERTY0);
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val &= ~SOURCEBUFFERENABLE;
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dpu_fe_write(fe, val, LAYERPROPERTY0);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_source_buffer_disable);
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bool fetcheco_is_enabled(struct dpu_fetcheco *fe)
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{
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u32 val;
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mutex_lock(&fe->mutex);
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val = dpu_fe_read(fe, LAYERPROPERTY0);
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mutex_unlock(&fe->mutex);
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return !!(val & SOURCEBUFFERENABLE);
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}
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EXPORT_SYMBOL_GPL(fetcheco_is_enabled);
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void fetcheco_framedimensions(struct dpu_fetcheco *fe, unsigned int w,
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unsigned int h)
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{
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u32 val;
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val = FRAMEWIDTH(w) | FRAMEHEIGHT(h);
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mutex_lock(&fe->mutex);
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dpu_fe_write(fe, val, FRAMEDIMENSIONS);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_framedimensions);
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void fetcheco_frameresampling(struct dpu_fetcheco *fe, unsigned int x,
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unsigned int y)
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{
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u32 val;
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mutex_lock(&fe->mutex);
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val = dpu_fe_read(fe, FRAMERESAMPLING);
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val &= ~(DELTAX_MASK | DELTAY_MASK);
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val |= DELTAX(x) | DELTAY(y);
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dpu_fe_write(fe, val, FRAMERESAMPLING);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_frameresampling);
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void fetcheco_controltrigger(struct dpu_fetcheco *fe, bool trigger)
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{
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u32 val;
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val = trigger ? SHDTOKGEN : 0;
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mutex_lock(&fe->mutex);
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dpu_fe_write(fe, val, CONTROLTRIGGER);
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mutex_unlock(&fe->mutex);
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}
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EXPORT_SYMBOL_GPL(fetcheco_controltrigger);
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int fetcheco_fetchtype(struct dpu_fetcheco *fe, fetchtype_t *type)
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{
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struct dpu_soc *dpu = fe->dpu;
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u32 val;
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|
||||
mutex_lock(&fe->mutex);
|
||||
val = dpu_fe_read(fe, FETCHTYPE);
|
||||
val &= FETCHTYPE_MASK;
|
||||
mutex_unlock(&fe->mutex);
|
||||
|
||||
switch (val) {
|
||||
case FETCHTYPE__DECODE:
|
||||
dev_dbg(dpu->dev, "FetchEco%d with RL and RLAD decoder\n",
|
||||
fe->id);
|
||||
break;
|
||||
case FETCHTYPE__LAYER:
|
||||
dev_dbg(dpu->dev, "FetchEco%d with fractional "
|
||||
"plane(8 layers)\n", fe->id);
|
||||
break;
|
||||
case FETCHTYPE__WARP:
|
||||
dev_dbg(dpu->dev, "FetchEco%d with arbitrary warping and "
|
||||
"fractional plane(8 layers)\n", fe->id);
|
||||
break;
|
||||
case FETCHTYPE__ECO:
|
||||
dev_dbg(dpu->dev, "FetchEco%d with minimum feature set for "
|
||||
"alpha, chroma and coordinate planes\n",
|
||||
fe->id);
|
||||
break;
|
||||
case FETCHTYPE__PERSP:
|
||||
dev_dbg(dpu->dev, "FetchEco%d with affine, perspective and "
|
||||
"arbitrary warping\n", fe->id);
|
||||
break;
|
||||
case FETCHTYPE__ROT:
|
||||
dev_dbg(dpu->dev, "FetchEco%d with affine and arbitrary "
|
||||
"warping\n", fe->id);
|
||||
break;
|
||||
case FETCHTYPE__DECODEL:
|
||||
dev_dbg(dpu->dev, "FetchEco%d with RL and RLAD decoder, "
|
||||
"reduced feature set\n", fe->id);
|
||||
break;
|
||||
case FETCHTYPE__LAYERL:
|
||||
dev_dbg(dpu->dev, "FetchEco%d with fractional "
|
||||
"plane(8 layers), reduced feature set\n",
|
||||
fe->id);
|
||||
break;
|
||||
case FETCHTYPE__ROTL:
|
||||
dev_dbg(dpu->dev, "FetchEco%d with affine and arbitrary "
|
||||
"warping, reduced feature set\n", fe->id);
|
||||
break;
|
||||
default:
|
||||
dev_warn(dpu->dev, "Invalid fetch type %u for FetchEco%d\n",
|
||||
val, fe->id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
*type = val;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fetcheco_fetchtype);
|
||||
|
||||
dpu_block_id_t fetcheco_get_block_id(struct dpu_fetcheco *fe)
|
||||
{
|
||||
switch (fe->id) {
|
||||
case 0:
|
||||
return ID_FETCHECO0;
|
||||
case 1:
|
||||
return ID_FETCHECO1;
|
||||
case 2:
|
||||
return ID_FETCHECO2;
|
||||
case 9:
|
||||
return ID_FETCHECO9;
|
||||
default:
|
||||
WARN_ON(1);
|
||||
}
|
||||
|
||||
return ID_NONE;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fetcheco_get_block_id);
|
||||
|
||||
unsigned int fetcheco_get_stream_id(struct dpu_fetcheco *fe)
|
||||
{
|
||||
return fe->stream_id;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fetcheco_get_stream_id);
|
||||
|
||||
void fetcheco_set_stream_id(struct dpu_fetcheco *fe, unsigned int id)
|
||||
{
|
||||
switch (id) {
|
||||
case DPU_PLANE_SRC_TO_DISP_STREAM0:
|
||||
case DPU_PLANE_SRC_TO_DISP_STREAM1:
|
||||
case DPU_PLANE_SRC_DISABLED:
|
||||
fe->stream_id = id;
|
||||
break;
|
||||
default:
|
||||
WARN_ON(1);
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(fetcheco_set_stream_id);
|
||||
|
||||
struct dpu_fetcheco *dpu_fe_get(struct dpu_soc *dpu, int id)
|
||||
{
|
||||
struct dpu_fetcheco *fe;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(fe_ids); i++)
|
||||
if (fe_ids[i] == id)
|
||||
break;
|
||||
|
||||
if (i == ARRAY_SIZE(fe_ids))
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
fe = dpu->fe_priv[i];
|
||||
|
||||
mutex_lock(&fe->mutex);
|
||||
|
||||
if (fe->inuse) {
|
||||
fe = ERR_PTR(-EBUSY);
|
||||
goto out;
|
||||
}
|
||||
|
||||
fe->inuse = true;
|
||||
out:
|
||||
mutex_unlock(&fe->mutex);
|
||||
|
||||
return fe;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(dpu_fe_get);
|
||||
|
||||
void dpu_fe_put(struct dpu_fetcheco *fe)
|
||||
{
|
||||
mutex_lock(&fe->mutex);
|
||||
|
||||
fe->inuse = false;
|
||||
|
||||
mutex_unlock(&fe->mutex);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(dpu_fe_put);
|
||||
|
||||
int dpu_fe_init(struct dpu_soc *dpu, unsigned int id,
|
||||
unsigned long pec_base, unsigned long base)
|
||||
{
|
||||
struct dpu_fetcheco *fe;
|
||||
|
||||
fe = devm_kzalloc(dpu->dev, sizeof(*fe), GFP_KERNEL);
|
||||
if (!fe)
|
||||
return -ENOMEM;
|
||||
|
||||
dpu->fe_priv[id] = fe;
|
||||
|
||||
fe->pec_base = devm_ioremap(dpu->dev, pec_base, SZ_16);
|
||||
if (!fe->pec_base)
|
||||
return -ENOMEM;
|
||||
|
||||
fe->base = devm_ioremap(dpu->dev, base, SZ_128);
|
||||
if (!fe->base)
|
||||
return -ENOMEM;
|
||||
|
||||
fe->dpu = dpu;
|
||||
fe->id = id;
|
||||
mutex_init(&fe->mutex);
|
||||
|
||||
fetcheco_shden(fe, true);
|
||||
|
||||
mutex_lock(&fe->mutex);
|
||||
dpu_fe_write(fe, SETNUMBUFFERS(16) | SETBURSTLENGTH(16),
|
||||
BURSTBUFFERMANAGEMENT);
|
||||
mutex_unlock(&fe->mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -175,6 +175,7 @@ struct dpu_devtype {
|
|||
const struct dpu_unit *decs;
|
||||
const struct dpu_unit *eds;
|
||||
const struct dpu_unit *fds;
|
||||
const struct dpu_unit *fes;
|
||||
const struct dpu_unit *fgs;
|
||||
const struct dpu_unit *fls;
|
||||
const struct dpu_unit *hss;
|
||||
|
|
@ -218,6 +219,7 @@ struct dpu_soc {
|
|||
struct dpu_disengcfg *dec_priv[2];
|
||||
struct dpu_extdst *ed_priv[4];
|
||||
struct dpu_fetchdecode *fd_priv[4];
|
||||
struct dpu_fetcheco *fe_priv[4];
|
||||
struct dpu_framegen *fg_priv[2];
|
||||
struct dpu_fetchlayer *fl_priv[2];
|
||||
struct dpu_hscaler *hs_priv[3];
|
||||
|
|
@ -240,6 +242,7 @@ DECLARE_DPU_UNIT_INIT_FUNC(cf);
|
|||
DECLARE_DPU_UNIT_INIT_FUNC(dec);
|
||||
DECLARE_DPU_UNIT_INIT_FUNC(ed);
|
||||
DECLARE_DPU_UNIT_INIT_FUNC(fd);
|
||||
DECLARE_DPU_UNIT_INIT_FUNC(fe);
|
||||
DECLARE_DPU_UNIT_INIT_FUNC(fg);
|
||||
DECLARE_DPU_UNIT_INIT_FUNC(fl);
|
||||
DECLARE_DPU_UNIT_INIT_FUNC(hs);
|
||||
|
|
@ -251,6 +254,7 @@ static const unsigned int cf_ids[] = {0, 1, 4, 5};
|
|||
static const unsigned int dec_ids[] = {0, 1};
|
||||
static const unsigned int ed_ids[] = {0, 1, 4, 5};
|
||||
static const unsigned int fd_ids[] = {0, 1, 2, 3};
|
||||
static const unsigned int fe_ids[] = {0, 1, 2, 9};
|
||||
static const unsigned int fg_ids[] = {0, 1};
|
||||
static const unsigned int fl_ids[] = {0, 1};
|
||||
static const unsigned int hs_ids[] = {4, 5, 9};
|
||||
|
|
|
|||
|
|
@ -499,6 +499,36 @@ void fetchdecode_set_stream_id(struct dpu_fetchdecode *fd, unsigned int id);
|
|||
struct dpu_fetchdecode *dpu_fd_get(struct dpu_soc *dpu, int id);
|
||||
void dpu_fd_put(struct dpu_fetchdecode *fd);
|
||||
|
||||
/* Fetch ECO Unit */
|
||||
struct dpu_fetcheco;
|
||||
void fetcheco_shden(struct dpu_fetcheco *fe, bool enable);
|
||||
void fetcheco_baseaddress(struct dpu_fetcheco *fe, dma_addr_t paddr);
|
||||
void fetcheco_source_bpp(struct dpu_fetcheco *fe, int bpp);
|
||||
void fetcheco_source_stride(struct dpu_fetcheco *fe, int stride);
|
||||
void fetcheco_src_buf_dimensions(struct dpu_fetcheco *fe, unsigned int w,
|
||||
unsigned int h, u32 fmt);
|
||||
void fetcheco_set_fmt(struct dpu_fetcheco *fe, u32 fmt);
|
||||
void fetcheco_layeroffset(struct dpu_fetcheco *fe, unsigned int x,
|
||||
unsigned int y);
|
||||
void fetcheco_clipoffset(struct dpu_fetcheco *fe, unsigned int x,
|
||||
unsigned int y);
|
||||
void fetcheco_clipdimensions(struct dpu_fetcheco *fe, unsigned int w,
|
||||
unsigned int h);
|
||||
void fetcheco_source_buffer_enable(struct dpu_fetcheco *fe);
|
||||
void fetcheco_source_buffer_disable(struct dpu_fetcheco *fe);
|
||||
bool fetcheco_is_enabled(struct dpu_fetcheco *fe);
|
||||
void fetcheco_framedimensions(struct dpu_fetcheco *fe, unsigned int w,
|
||||
unsigned int h);
|
||||
void fetcheco_frameresampling(struct dpu_fetcheco *fe, unsigned int x,
|
||||
unsigned int y);
|
||||
void fetcheco_controltrigger(struct dpu_fetcheco *fe, bool trigger);
|
||||
int fetcheco_fetchtype(struct dpu_fetcheco *fe, fetchtype_t *type);
|
||||
dpu_block_id_t fetcheco_get_block_id(struct dpu_fetcheco *fe);
|
||||
unsigned int fetcheco_get_stream_id(struct dpu_fetcheco *fe);
|
||||
void fetcheco_set_stream_id(struct dpu_fetcheco *fe, unsigned int id);
|
||||
struct dpu_fetcheco *dpu_fe_get(struct dpu_soc *dpu, int id);
|
||||
void dpu_fe_put(struct dpu_fetcheco *fe);
|
||||
|
||||
/* Fetch Layer Unit */
|
||||
struct dpu_fetchlayer;
|
||||
void fetchlayer_shden(struct dpu_fetchlayer *fl, bool enable);
|
||||
|
|
|
|||
Loading…
Reference in New Issue