mmc: meson-gx: add support for descriptor chain mode
So far a bounce buffer is used to serialize the scatterlist(s). This overhead can be avoided by switching to descriptor chain mode. As result the performance is drastically improved. On a Odroid-C2 with a 128 GB eMMC module raw reads reach 140 MB/s. Prerequisite for descriptor chain mode is that all scatterlist buffers are 8 byte aligned for 64-bit DMA. That's not always the case, at least the brcmfmac SDIO WiFi driver is known to cause problems. Therefore, for each request, check upfront whether all scatterlist buffers are 8 byte aligned and fall back to bounce buffer mode if that's not the case. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>zero-colors
Heiner Kallweit
Ulf Hansson
parent
0b6ed71c3e
commit
79ed05e329
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@ -111,6 +111,11 @@
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#define SD_EMMC_CMD_TIMEOUT 1024 /* in ms */
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#define SD_EMMC_CMD_TIMEOUT_DATA 4096 /* in ms */
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#define SD_EMMC_CFG_CMD_GAP 16 /* in clock cycles */
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#define SD_EMMC_DESC_BUF_LEN PAGE_SIZE
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#define SD_EMMC_PRE_REQ_DONE BIT(0)
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#define SD_EMMC_DESC_CHAIN_MODE BIT(1)
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#define MUX_CLK_NUM_PARENTS 2
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struct meson_tuning_params {
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@ -119,6 +124,13 @@ struct meson_tuning_params {
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u8 rx_phase;
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};
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struct sd_emmc_desc {
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u32 cmd_cfg;
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u32 cmd_arg;
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u32 cmd_data;
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u32 cmd_resp;
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};
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struct meson_host {
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struct device *dev;
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struct mmc_host *mmc;
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@ -137,18 +149,13 @@ struct meson_host {
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unsigned int bounce_buf_size;
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void *bounce_buf;
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dma_addr_t bounce_dma_addr;
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struct sd_emmc_desc *descs;
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dma_addr_t descs_dma_addr;
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struct meson_tuning_params tp;
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bool vqmmc_enabled;
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};
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struct sd_emmc_desc {
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u32 cmd_cfg;
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u32 cmd_arg;
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u32 cmd_data;
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u32 cmd_resp;
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};
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#define CMD_CFG_LENGTH_MASK GENMASK(8, 0)
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#define CMD_CFG_BLOCK_MODE BIT(9)
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#define CMD_CFG_R1B BIT(10)
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@ -195,6 +202,66 @@ static struct mmc_command *meson_mmc_get_next_command(struct mmc_command *cmd)
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return NULL;
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}
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static void meson_mmc_get_transfer_mode(struct mmc_host *mmc,
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struct mmc_request *mrq)
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{
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struct mmc_data *data = mrq->data;
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struct scatterlist *sg;
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int i;
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bool use_desc_chain_mode = true;
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for_each_sg(data->sg, sg, data->sg_len, i)
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/* check for 8 byte alignment */
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if (sg->offset & 7) {
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WARN_ONCE(1, "unaligned scatterlist buffer\n");
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use_desc_chain_mode = false;
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break;
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}
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if (use_desc_chain_mode)
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data->host_cookie |= SD_EMMC_DESC_CHAIN_MODE;
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}
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static inline bool meson_mmc_desc_chain_mode(const struct mmc_data *data)
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{
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return data->host_cookie & SD_EMMC_DESC_CHAIN_MODE;
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}
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static inline bool meson_mmc_bounce_buf_read(const struct mmc_data *data)
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{
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return data && data->flags & MMC_DATA_READ &&
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!meson_mmc_desc_chain_mode(data);
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}
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static void meson_mmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq)
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{
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struct mmc_data *data = mrq->data;
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if (!data)
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return;
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meson_mmc_get_transfer_mode(mmc, mrq);
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data->host_cookie |= SD_EMMC_PRE_REQ_DONE;
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if (!meson_mmc_desc_chain_mode(data))
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return;
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data->sg_count = dma_map_sg(mmc_dev(mmc), data->sg, data->sg_len,
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mmc_get_dma_dir(data));
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if (!data->sg_count)
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dev_err(mmc_dev(mmc), "dma_map_sg failed");
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}
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static void meson_mmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq,
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int err)
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{
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struct mmc_data *data = mrq->data;
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if (data && meson_mmc_desc_chain_mode(data) && data->sg_count)
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dma_unmap_sg(mmc_dev(mmc), data->sg, data->sg_len,
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mmc_get_dma_dir(data));
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}
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static int meson_mmc_clk_set(struct meson_host *host, unsigned long clk_rate)
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{
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struct mmc_host *mmc = host->mmc;
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@ -509,6 +576,44 @@ static void meson_mmc_set_response_bits(struct mmc_command *cmd, u32 *cmd_cfg)
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}
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}
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static void meson_mmc_desc_chain_transfer(struct mmc_host *mmc, u32 cmd_cfg)
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{
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struct meson_host *host = mmc_priv(mmc);
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struct sd_emmc_desc *desc = host->descs;
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struct mmc_data *data = host->cmd->data;
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struct scatterlist *sg;
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u32 start;
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int i;
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if (data->flags & MMC_DATA_WRITE)
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cmd_cfg |= CMD_CFG_DATA_WR;
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if (data->blocks > 1) {
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cmd_cfg |= CMD_CFG_BLOCK_MODE;
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meson_mmc_set_blksz(mmc, data->blksz);
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}
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for_each_sg(data->sg, sg, data->sg_count, i) {
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unsigned int len = sg_dma_len(sg);
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if (data->blocks > 1)
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len /= data->blksz;
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desc[i].cmd_cfg = cmd_cfg;
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desc[i].cmd_cfg |= FIELD_PREP(CMD_CFG_LENGTH_MASK, len);
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if (i > 0)
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desc[i].cmd_cfg |= CMD_CFG_NO_CMD;
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desc[i].cmd_arg = host->cmd->arg;
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desc[i].cmd_resp = 0;
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desc[i].cmd_data = sg_dma_address(sg);
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}
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desc[data->sg_count - 1].cmd_cfg |= CMD_CFG_END_OF_CHAIN;
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dma_wmb(); /* ensure descriptor is written before kicked */
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start = host->descs_dma_addr | START_DESC_BUSY;
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writel(start, host->regs + SD_EMMC_START);
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}
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static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
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{
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struct meson_host *host = mmc_priv(mmc);
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@ -519,6 +624,8 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
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/* Setup descriptors */
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dma_rmb();
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host->cmd = cmd;
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cmd_cfg |= FIELD_PREP(CMD_CFG_CMD_INDEX_MASK, cmd->opcode);
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cmd_cfg |= CMD_CFG_OWNER; /* owned by CPU */
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@ -526,10 +633,16 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
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/* data? */
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if (data) {
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data->bytes_xfered = 0;
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cmd_cfg |= CMD_CFG_DATA_IO;
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cmd_cfg |= FIELD_PREP(CMD_CFG_TIMEOUT_MASK,
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ilog2(meson_mmc_get_timeout_msecs(data)));
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if (meson_mmc_desc_chain_mode(data)) {
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meson_mmc_desc_chain_transfer(mmc, cmd_cfg);
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return;
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}
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if (data->blocks > 1) {
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cmd_cfg |= CMD_CFG_BLOCK_MODE;
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cmd_cfg |= FIELD_PREP(CMD_CFG_LENGTH_MASK,
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@ -539,7 +652,6 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
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cmd_cfg |= FIELD_PREP(CMD_CFG_LENGTH_MASK, data->blksz);
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}
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data->bytes_xfered = 0;
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xfer_bytes = data->blksz * data->blocks;
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if (data->flags & MMC_DATA_WRITE) {
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cmd_cfg |= CMD_CFG_DATA_WR;
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@ -555,8 +667,6 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
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ilog2(SD_EMMC_CMD_TIMEOUT));
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}
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host->cmd = cmd;
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/* Last descriptor */
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cmd_cfg |= CMD_CFG_END_OF_CHAIN;
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writel(cmd_cfg, host->regs + SD_EMMC_CMD_CFG);
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@ -569,14 +679,25 @@ static void meson_mmc_start_cmd(struct mmc_host *mmc, struct mmc_command *cmd)
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static void meson_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
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{
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struct meson_host *host = mmc_priv(mmc);
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bool needs_pre_post_req = mrq->data &&
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!(mrq->data->host_cookie & SD_EMMC_PRE_REQ_DONE);
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if (needs_pre_post_req) {
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meson_mmc_get_transfer_mode(mmc, mrq);
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if (!meson_mmc_desc_chain_mode(mrq->data))
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needs_pre_post_req = false;
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}
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if (needs_pre_post_req)
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meson_mmc_pre_req(mmc, mrq);
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/* Stop execution */
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writel(0, host->regs + SD_EMMC_START);
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if (mrq->sbc)
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meson_mmc_start_cmd(mmc, mrq->sbc);
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else
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meson_mmc_start_cmd(mmc, mrq->cmd);
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meson_mmc_start_cmd(mmc, mrq->sbc ?: mrq->cmd);
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if (needs_pre_post_req)
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meson_mmc_post_req(mmc, mrq, 0);
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}
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static void meson_mmc_read_resp(struct mmc_host *mmc, struct mmc_command *cmd)
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@ -654,7 +775,9 @@ static irqreturn_t meson_mmc_irq(int irq, void *dev_id)
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if (status & (IRQ_END_OF_CHAIN | IRQ_RESP_STATUS)) {
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if (data && !cmd->error)
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data->bytes_xfered = data->blksz * data->blocks;
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ret = IRQ_WAKE_THREAD;
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if (meson_mmc_bounce_buf_read(data) ||
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meson_mmc_get_next_command(cmd))
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ret = IRQ_WAKE_THREAD;
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} else {
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dev_warn(host->dev, "Unknown IRQ! status=0x%04x: MMC CMD%u arg=0x%08x flags=0x%08x stop=%d\n",
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status, cmd->opcode, cmd->arg,
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@ -691,7 +814,7 @@ static irqreturn_t meson_mmc_irq_thread(int irq, void *dev_id)
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return IRQ_NONE;
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data = cmd->data;
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if (data && data->flags & MMC_DATA_READ) {
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if (meson_mmc_bounce_buf_read(data)) {
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xfer_bytes = data->blksz * data->blocks;
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WARN_ON(xfer_bytes > host->bounce_buf_size);
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sg_copy_from_buffer(data->sg, data->sg_len,
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@ -760,6 +883,8 @@ static const struct mmc_host_ops meson_mmc_ops = {
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.request = meson_mmc_request,
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.set_ios = meson_mmc_set_ios,
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.get_cd = meson_mmc_get_cd,
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.pre_req = meson_mmc_pre_req,
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.post_req = meson_mmc_post_req,
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.execute_tuning = meson_mmc_execute_tuning,
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};
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@ -845,6 +970,8 @@ static int meson_mmc_probe(struct platform_device *pdev)
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mmc->caps |= MMC_CAP_CMD23;
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mmc->max_blk_count = CMD_CFG_LENGTH_MASK;
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mmc->max_req_size = mmc->max_blk_count * mmc->max_blk_size;
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mmc->max_segs = SD_EMMC_DESC_BUF_LEN / sizeof(struct sd_emmc_desc);
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mmc->max_seg_size = mmc->max_req_size;
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/* data bounce buffer */
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host->bounce_buf_size = mmc->max_req_size;
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@ -857,11 +984,22 @@ static int meson_mmc_probe(struct platform_device *pdev)
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goto err_div_clk;
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}
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host->descs = dma_alloc_coherent(host->dev, SD_EMMC_DESC_BUF_LEN,
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&host->descs_dma_addr, GFP_KERNEL);
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if (!host->descs) {
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dev_err(host->dev, "Allocating descriptor DMA buffer failed\n");
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ret = -ENOMEM;
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goto err_bounce_buf;
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}
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mmc->ops = &meson_mmc_ops;
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mmc_add_host(mmc);
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return 0;
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err_bounce_buf:
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dma_free_coherent(host->dev, host->bounce_buf_size,
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host->bounce_buf, host->bounce_dma_addr);
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err_div_clk:
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clk_disable_unprepare(host->cfg_div_clk);
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err_core_clk:
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@ -880,6 +1018,8 @@ static int meson_mmc_remove(struct platform_device *pdev)
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/* disable interrupts */
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writel(0, host->regs + SD_EMMC_IRQ_EN);
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dma_free_coherent(host->dev, SD_EMMC_DESC_BUF_LEN,
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host->descs, host->descs_dma_addr);
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dma_free_coherent(host->dev, host->bounce_buf_size,
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host->bounce_buf, host->bounce_dma_addr);
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