STM32 DT updates for v4.10, round 2.
Highlights: ---------- - Add support of STM32F746 MCU and STM32746G-Eval board - Add QSPI support for STM32F469-Disco board -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJYKx16AAoJEH+ayWryHnCF9bEP/jKtDO76cumlrZys7mttuKoF MHolgPj2wI9etfniOvJA3wjC++WYRnkJlMxt1KxjaAVDVxgO3r6j8YOli11OKbUk 1yKFVUzjq5Z3k9dvr0UdZsk5PZ46j+UwvYtvkQfX+ErEKOkVjdv1m9Ktjfkv1+dM VubIKtYaUH9ELR6dVOH36R/S4tlKBw7oboj+4P+jVPcNu/jlhELw0VszQ3cYvrt9 wJ4I2bNXTomLzqVJ61AEPDRg86v317ZlBnwxfGRMzwUa1zNLACQDqtem+e9hnLHx yDmeIoAKZpuFsqJZ+c1VetE9GNAmp9fhHmDaZZ/rikt6GeszYdGXvkJ7rn3nyVp2 nbb7xPBXcMXD5lIDeVn7jddT5CfpzrRnNiH1ovfkv2WLViM6GarJMs4yOs0iOY/w 5E67tv0J3eJgK5kAuq7NmKwBbBbRsHEM3Vng8ijAdZ278RpG9PzOarMU8FZWnCWz uFOP3/Ls8DgZe/CMdq5eQPN/JooViSXhg4JUEvSIjulze8W55sYtpGiYidYD8Ein XrAwQt8br3hlqi9QAcpSU8drTOa3gn38iE5svQ+JkUT6akI4blT1CDuIr9gc1lSn zz9OiuB/f8QM5+gO37sWOwD9QrgdMFcVjAeF/eJROBkBEoxAhCWf3h6pmQa2+8jk jtR6Ec1eguD/s9PthiHs =h9qv -----END PGP SIGNATURE----- Merge tag 'stm32-dt-for-v4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into next/dt STM32 DT updates for v4.10, round 2. Highlights: ---------- - Add support of STM32F746 MCU and STM32746G-Eval board - Add QSPI support for STM32F469-Disco board * tag 'stm32-dt-for-v4.10-2' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: ARM: dts: stm32f429: Add QSPI clock ARM: dts: Add STM32F746 MCU and STM32746g-EVAL board Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
7af5664e0c
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@ -730,7 +730,8 @@ dtb-$(CONFIG_ARCH_STI) += \
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dtb-$(CONFIG_ARCH_STM32)+= \
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stm32f429-disco.dtb \
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stm32f469-disco.dtb \
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stm32429i-eval.dtb
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stm32429i-eval.dtb \
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stm32746g-eval.dtb
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dtb-$(CONFIG_MACH_SUN4I) += \
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sun4i-a10-a1000.dtb \
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sun4i-a10-ba10-tvbox.dtb \
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96
arch/arm/boot/dts/stm32746g-eval.dts
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96
arch/arm/boot/dts/stm32746g-eval.dts
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@ -0,0 +1,96 @@
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/*
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* Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "stm32f746.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "STMicroelectronics STM32746g-EVAL board";
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compatible = "st,stm32746g-eval", "st,stm32f746";
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chosen {
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bootargs = "root=/dev/ram";
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0xc0000000 0x2000000>;
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};
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aliases {
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serial0 = &usart1;
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};
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leds {
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compatible = "gpio-leds";
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green {
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gpios = <&gpiof 10 1>;
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linux,default-trigger = "heartbeat";
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};
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red {
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gpios = <&gpiob 7 1>;
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};
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};
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gpio_keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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button@0 {
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label = "Wake up";
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linux,code = <KEY_WAKEUP>;
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gpios = <&gpioc 13 0>;
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};
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};
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};
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&clk_hse {
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clock-frequency = <25000000>;
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};
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&usart1 {
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pinctrl-0 = <&usart1_pins_a>;
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pinctrl-names = "default";
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status = "okay";
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};
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@ -70,6 +70,10 @@
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};
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};
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&rcc {
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compatible = "st,stm32f469-rcc", "st,stm32f42xx-rcc", "st,stm32-rcc";
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};
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&clk_hse {
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clock-frequency = <8000000>;
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};
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304
arch/arm/boot/dts/stm32f746.dtsi
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304
arch/arm/boot/dts/stm32f746.dtsi
Normal file
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@ -0,0 +1,304 @@
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/*
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* Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include "skeleton.dtsi"
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#include "armv7-m.dtsi"
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#include <dt-bindings/pinctrl/stm32f746-pinfunc.h>
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/ {
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clocks {
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clk_hse: clk-hse {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <0>;
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};
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};
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soc {
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timer2: timer@40000000 {
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compatible = "st,stm32-timer";
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reg = <0x40000000 0x400>;
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interrupts = <28>;
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clocks = <&rcc 0 128>;
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status = "disabled";
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};
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timer3: timer@40000400 {
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compatible = "st,stm32-timer";
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reg = <0x40000400 0x400>;
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interrupts = <29>;
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clocks = <&rcc 0 129>;
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status = "disabled";
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};
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timer4: timer@40000800 {
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compatible = "st,stm32-timer";
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reg = <0x40000800 0x400>;
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interrupts = <30>;
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clocks = <&rcc 0 130>;
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status = "disabled";
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};
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timer5: timer@40000c00 {
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compatible = "st,stm32-timer";
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reg = <0x40000c00 0x400>;
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interrupts = <50>;
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clocks = <&rcc 0 131>;
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};
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timer6: timer@40001000 {
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compatible = "st,stm32-timer";
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reg = <0x40001000 0x400>;
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interrupts = <54>;
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clocks = <&rcc 0 132>;
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status = "disabled";
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};
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timer7: timer@40001400 {
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compatible = "st,stm32-timer";
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reg = <0x40001400 0x400>;
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interrupts = <55>;
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clocks = <&rcc 0 133>;
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status = "disabled";
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};
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usart2: serial@40004400 {
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compatible = "st,stm32f7-usart", "st,stm32f7-uart";
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reg = <0x40004400 0x400>;
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interrupts = <38>;
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clocks = <&rcc 0 145>;
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status = "disabled";
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};
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usart3: serial@40004800 {
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compatible = "st,stm32f7-usart", "st,stm32f7-uart";
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reg = <0x40004800 0x400>;
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interrupts = <39>;
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clocks = <&rcc 0 146>;
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status = "disabled";
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};
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usart4: serial@40004c00 {
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compatible = "st,stm32f7-uart";
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reg = <0x40004c00 0x400>;
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interrupts = <52>;
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clocks = <&rcc 0 147>;
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status = "disabled";
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};
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usart5: serial@40005000 {
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compatible = "st,stm32f7-uart";
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reg = <0x40005000 0x400>;
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interrupts = <53>;
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clocks = <&rcc 0 148>;
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status = "disabled";
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};
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usart7: serial@40007800 {
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compatible = "st,stm32f7-usart", "st,stm32f7-uart";
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reg = <0x40007800 0x400>;
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interrupts = <82>;
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clocks = <&rcc 0 158>;
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status = "disabled";
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};
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usart8: serial@40007c00 {
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compatible = "st,stm32f7-usart", "st,stm32f7-uart";
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reg = <0x40007c00 0x400>;
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interrupts = <83>;
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clocks = <&rcc 0 159>;
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status = "disabled";
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};
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usart1: serial@40011000 {
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compatible = "st,stm32f7-usart", "st,stm32f7-uart";
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reg = <0x40011000 0x400>;
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interrupts = <37>;
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clocks = <&rcc 0 164>;
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status = "disabled";
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};
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usart6: serial@40011400 {
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compatible = "st,stm32f7-usart", "st,stm32f7-uart";
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reg = <0x40011400 0x400>;
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interrupts = <71>;
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clocks = <&rcc 0 165>;
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status = "disabled";
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};
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syscfg: system-config@40013800 {
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compatible = "syscon";
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reg = <0x40013800 0x400>;
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};
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exti: interrupt-controller@40013c00 {
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compatible = "st,stm32-exti";
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x40013C00 0x400>;
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interrupts = <1>, <2>, <3>, <6>, <7>, <8>, <9>, <10>, <23>, <40>, <41>, <42>, <62>, <76>;
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};
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pin-controller {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stm32f746-pinctrl";
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ranges = <0 0x40020000 0x3000>;
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interrupt-parent = <&exti>;
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st,syscfg = <&syscfg 0x8>;
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pins-are-numbered;
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gpioa: gpio@40020000 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x0 0x400>;
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clocks = <&rcc 0 256>;
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st,bank-name = "GPIOA";
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};
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gpiob: gpio@40020400 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x400 0x400>;
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clocks = <&rcc 0 257>;
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st,bank-name = "GPIOB";
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};
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gpioc: gpio@40020800 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x800 0x400>;
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clocks = <&rcc 0 258>;
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st,bank-name = "GPIOC";
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};
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gpiod: gpio@40020c00 {
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0xc00 0x400>;
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clocks = <&rcc 0 259>;
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st,bank-name = "GPIOD";
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};
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gpioe: gpio@40021000 {
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||||
gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1000 0x400>;
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clocks = <&rcc 0 260>;
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st,bank-name = "GPIOE";
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};
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gpiof: gpio@40021400 {
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||||
gpio-controller;
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#gpio-cells = <2>;
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reg = <0x1400 0x400>;
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||||
clocks = <&rcc 0 261>;
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||||
st,bank-name = "GPIOF";
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||||
};
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gpiog: gpio@40021800 {
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||||
gpio-controller;
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#gpio-cells = <2>;
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||||
reg = <0x1800 0x400>;
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clocks = <&rcc 0 262>;
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st,bank-name = "GPIOG";
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||||
};
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||||
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||||
gpioh: gpio@40021c00 {
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||||
gpio-controller;
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||||
#gpio-cells = <2>;
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||||
reg = <0x1c00 0x400>;
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||||
clocks = <&rcc 0 263>;
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||||
st,bank-name = "GPIOH";
|
||||
};
|
||||
|
||||
gpioi: gpio@40022000 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x2000 0x400>;
|
||||
clocks = <&rcc 0 264>;
|
||||
st,bank-name = "GPIOI";
|
||||
};
|
||||
|
||||
gpioj: gpio@40022400 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x2400 0x400>;
|
||||
clocks = <&rcc 0 265>;
|
||||
st,bank-name = "GPIOJ";
|
||||
};
|
||||
|
||||
gpiok: gpio@40022800 {
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
reg = <0x2800 0x400>;
|
||||
clocks = <&rcc 0 266>;
|
||||
st,bank-name = "GPIOK";
|
||||
};
|
||||
|
||||
usart1_pins_a: usart1@0 {
|
||||
pins1 {
|
||||
pinmux = <STM32F746_PA9_FUNC_USART1_TX>;
|
||||
bias-disable;
|
||||
drive-push-pull;
|
||||
slew-rate = <0>;
|
||||
};
|
||||
pins2 {
|
||||
pinmux = <STM32F746_PA10_FUNC_USART1_RX>;
|
||||
bias-disable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
rcc: rcc@40023800 {
|
||||
#clock-cells = <2>;
|
||||
compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
|
||||
reg = <0x40023800 0x400>;
|
||||
clocks = <&clk_hse>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&systick {
|
||||
clocks = <&rcc 1 0>;
|
||||
status = "okay";
|
||||
};
|
Loading…
Reference in a new issue