[PATCH] bcm43xx: Remove the mmio access printing facility overhead.
Signed-off-by: Michael Buesch <mbuesch@freenet.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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@ -718,8 +718,6 @@ struct bcm43xx_private {
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/* Debugging stuff follows. */
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#ifdef CONFIG_BCM43XX_DEBUG
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struct bcm43xx_dfsentry *dfsentry;
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atomic_t mmio_print_cnt;
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atomic_t pcicfg_print_cnt;
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#endif
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};
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@ -805,141 +803,54 @@ struct bcm43xx_lopair * bcm43xx_get_lopair(struct bcm43xx_phyinfo *phy,
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}
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/* MMIO read/write functions. Debug and non-debug variants. */
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#ifdef CONFIG_BCM43XX_DEBUG
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static inline
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u16 bcm43xx_read16(struct bcm43xx_private *bcm, u16 offset)
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{
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u16 value;
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value = ioread16(bcm->mmio_addr + core_offset(bcm) + offset);
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if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
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printk(KERN_INFO PFX "ioread16 offset: 0x%04x, value: 0x%04x\n",
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offset, value);
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}
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return value;
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return ioread16(bcm->mmio_addr + core_offset(bcm) + offset);
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}
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static inline
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void bcm43xx_write16(struct bcm43xx_private *bcm, u16 offset, u16 value)
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{
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iowrite16(value, bcm->mmio_addr + core_offset(bcm) + offset);
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if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
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printk(KERN_INFO PFX "iowrite16 offset: 0x%04x, value: 0x%04x\n",
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offset, value);
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}
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}
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static inline
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u32 bcm43xx_read32(struct bcm43xx_private *bcm, u16 offset)
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{
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u32 value;
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value = ioread32(bcm->mmio_addr + core_offset(bcm) + offset);
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if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
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printk(KERN_INFO PFX "ioread32 offset: 0x%04x, value: 0x%08x\n",
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offset, value);
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}
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return value;
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return ioread32(bcm->mmio_addr + core_offset(bcm) + offset);
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}
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static inline
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void bcm43xx_write32(struct bcm43xx_private *bcm, u16 offset, u32 value)
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{
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iowrite32(value, bcm->mmio_addr + core_offset(bcm) + offset);
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if (unlikely(atomic_read(&bcm->mmio_print_cnt) > 0)) {
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printk(KERN_INFO PFX "iowrite32 offset: 0x%04x, value: 0x%08x\n",
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offset, value);
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}
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}
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static inline
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int bcm43xx_pci_read_config16(struct bcm43xx_private *bcm, int offset, u16 *value)
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{
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int err;
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err = pci_read_config_word(bcm->pci_dev, offset, value);
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if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
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printk(KERN_INFO PFX "pciread16 offset: 0x%08x, value: 0x%04x, err: %d\n",
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offset, *value, err);
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}
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return err;
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return pci_read_config_word(bcm->pci_dev, offset, value);
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}
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static inline
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int bcm43xx_pci_read_config32(struct bcm43xx_private *bcm, int offset, u32 *value)
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{
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int err;
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err = pci_read_config_dword(bcm->pci_dev, offset, value);
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if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
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printk(KERN_INFO PFX "pciread32 offset: 0x%08x, value: 0x%08x, err: %d\n",
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offset, *value, err);
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}
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return err;
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return pci_read_config_dword(bcm->pci_dev, offset, value);
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}
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static inline
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int bcm43xx_pci_write_config16(struct bcm43xx_private *bcm, int offset, u16 value)
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{
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int err;
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err = pci_write_config_word(bcm->pci_dev, offset, value);
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if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
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printk(KERN_INFO PFX "pciwrite16 offset: 0x%08x, value: 0x%04x, err: %d\n",
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offset, value, err);
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}
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return err;
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return pci_write_config_word(bcm->pci_dev, offset, value);
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}
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static inline
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int bcm43xx_pci_write_config32(struct bcm43xx_private *bcm, int offset, u32 value)
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{
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int err;
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err = pci_write_config_dword(bcm->pci_dev, offset, value);
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if (unlikely(atomic_read(&bcm->pcicfg_print_cnt) > 0)) {
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printk(KERN_INFO PFX "pciwrite32 offset: 0x%08x, value: 0x%08x, err: %d\n",
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offset, value, err);
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}
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return err;
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return pci_write_config_dword(bcm->pci_dev, offset, value);
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}
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#define bcm43xx_mmioprint_initial(bcm, value) atomic_set(&(bcm)->mmio_print_cnt, (value))
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#define bcm43xx_mmioprint_enable(bcm) atomic_inc(&(bcm)->mmio_print_cnt)
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#define bcm43xx_mmioprint_disable(bcm) atomic_dec(&(bcm)->mmio_print_cnt)
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#define bcm43xx_pciprint_initial(bcm, value) atomic_set(&(bcm)->pcicfg_print_cnt, (value))
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#define bcm43xx_pciprint_enable(bcm) atomic_inc(&(bcm)->pcicfg_print_cnt)
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#define bcm43xx_pciprint_disable(bcm) atomic_dec(&(bcm)->pcicfg_print_cnt)
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#else /* CONFIG_BCM43XX_DEBUG*/
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#define bcm43xx_read16(bcm, offset) ioread16((bcm)->mmio_addr + core_offset(bcm) + (offset))
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#define bcm43xx_write16(bcm, offset, value) iowrite16((value), (bcm)->mmio_addr + core_offset(bcm) + (offset))
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#define bcm43xx_read32(bcm, offset) ioread32((bcm)->mmio_addr + core_offset(bcm) + (offset))
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#define bcm43xx_write32(bcm, offset, value) iowrite32((value), (bcm)->mmio_addr + core_offset(bcm) + (offset))
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#define bcm43xx_pci_read_config16(bcm, o, v) pci_read_config_word((bcm)->pci_dev, (o), (v))
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#define bcm43xx_pci_read_config32(bcm, o, v) pci_read_config_dword((bcm)->pci_dev, (o), (v))
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#define bcm43xx_pci_write_config16(bcm, o, v) pci_write_config_word((bcm)->pci_dev, (o), (v))
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#define bcm43xx_pci_write_config32(bcm, o, v) pci_write_config_dword((bcm)->pci_dev, (o), (v))
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#define bcm43xx_mmioprint_initial(x, y) do { /* nothing */ } while (0)
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#define bcm43xx_mmioprint_enable(x) do { /* nothing */ } while (0)
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#define bcm43xx_mmioprint_disable(x) do { /* nothing */ } while (0)
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#define bcm43xx_pciprint_initial(bcm, value) do { /* nothing */ } while (0)
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#define bcm43xx_pciprint_enable(bcm) do { /* nothing */ } while (0)
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#define bcm43xx_pciprint_disable(bcm) do { /* nothing */ } while (0)
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#endif /* CONFIG_BCM43XX_DEBUG*/
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/** Limit a value between two limits */
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#ifdef limit_value
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# undef limit_value
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@ -2018,12 +2018,6 @@ static void bcm43xx_upload_microcode(struct bcm43xx_private *bcm)
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const u32 *data;
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unsigned int i, len;
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#ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT
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bcm43xx_mmioprint_enable(bcm);
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#else
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bcm43xx_mmioprint_disable(bcm);
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#endif
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/* Upload Microcode. */
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data = (u32 *)(bcm->ucode->data);
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len = bcm->ucode->size / sizeof(u32);
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@ -2045,12 +2039,6 @@ static void bcm43xx_upload_microcode(struct bcm43xx_private *bcm)
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be32_to_cpu(data[i]));
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udelay(10);
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}
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#ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT
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bcm43xx_mmioprint_disable(bcm);
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#else
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bcm43xx_mmioprint_enable(bcm);
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#endif
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}
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static int bcm43xx_write_initvals(struct bcm43xx_private *bcm,
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@ -2090,12 +2078,6 @@ static int bcm43xx_upload_initvals(struct bcm43xx_private *bcm)
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{
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int err;
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#ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT
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bcm43xx_mmioprint_enable(bcm);
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#else
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bcm43xx_mmioprint_disable(bcm);
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#endif
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err = bcm43xx_write_initvals(bcm, (struct bcm43xx_initval *)bcm->initvals0->data,
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bcm->initvals0->size / sizeof(struct bcm43xx_initval));
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if (err)
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@ -2106,13 +2088,7 @@ static int bcm43xx_upload_initvals(struct bcm43xx_private *bcm)
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if (err)
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goto out;
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}
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out:
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#ifdef DEBUG_ENABLE_UCODE_MMIO_PRINT
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bcm43xx_mmioprint_disable(bcm);
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#else
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bcm43xx_mmioprint_enable(bcm);
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#endif
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return err;
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}
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@ -3728,17 +3704,6 @@ static int bcm43xx_init_private(struct bcm43xx_private *bcm,
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bcm->softmac = ieee80211_priv(net_dev);
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bcm->softmac->set_channel = bcm43xx_ieee80211_set_chan;
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#ifdef DEBUG_ENABLE_MMIO_PRINT
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bcm43xx_mmioprint_initial(bcm, 1);
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#else
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bcm43xx_mmioprint_initial(bcm, 0);
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#endif
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#ifdef DEBUG_ENABLE_PCILOG
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bcm43xx_pciprint_initial(bcm, 1);
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#else
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bcm43xx_pciprint_initial(bcm, 0);
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#endif
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bcm->irq_savedstate = BCM43xx_IRQ_INITIAL;
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bcm->pci_dev = pci_dev;
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bcm->net_dev = net_dev;
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