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drm/etnaviv: update MLCG disables with info from newer Vivante driver

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PA clock gating can be enabled when the right bugfix bit is present.

There are broken revs of GC4000 and GC2000, which need TX clock gating
to be disabled.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
This commit is contained in:
Lucas Stach 2017-03-17 12:42:30 +01:00
parent 2801c84917
commit 7cef6004ec
1 changed files with 8 additions and 2 deletions
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10
drivers/gpu/drm/etnaviv/etnaviv_gpu.c
View file

@ -523,9 +523,10 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
pmc = gpu_read(gpu, VIVS_PM_MODULE_CONTROLS);
/* Disable PA clock gating for GC400+ except for GC420 */
/* Disable PA clock gating for GC400+ without bugfix except for GC420 */
if (gpu->identity.model >= chipModel_GC400 &&
gpu->identity.model != chipModel_GC420)
gpu->identity.model != chipModel_GC420 &&
!(gpu->identity.minor_features3 & chipMinorFeatures3_BUG_FIXES12))
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_PA;
/*
@ -541,6 +542,11 @@ static void etnaviv_gpu_enable_mlcg(struct etnaviv_gpu *gpu)
if (gpu->identity.revision < 0x5422)
pmc |= BIT(15); /* Unknown bit */
/* Disable TX clock gating on affected core revisions. */
if (etnaviv_is_model_rev(gpu, GC4000, 0x5222) ||
etnaviv_is_model_rev(gpu, GC2000, 0x5108))
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_TX;
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_HZ;
pmc |= VIVS_PM_MODULE_CONTROLS_DISABLE_MODULE_CLOCK_GATING_RA_EZ;