crypto: caam - de-CHIP-ify device tree compatibles
- all the integration parameters have been captured by the binding. - the block name really uniquely identifies this hardware. Some advocate putting SoC names everywhere in case software needs to work around some chip-specific bug, but more precise SoC information already exists in SVR, and board information already exists in the top-level device tree node. Note that sometimes the SoC name is a worse identifier than the block version, as the block version can change between revisions of the same SoC. As a matter of historical reference, neither SEC versions 2.x nor 3.x (driven by talitos) ever needed CHIP references. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Kumar Gala <kumar.gala@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Acked-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Kim Phillips
Herbert Xu
parent
6d00376ad1
commit
7dfc2179ec
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@ -38,7 +38,7 @@ in the memory partition devoted to a particular core. The P4080 has 4 JRs, so
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up to 4 JRs can be configured; and all 4 JRs process requests in parallel.
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=====================================================================
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P4080 SEC 4 Node
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SEC 4 Node
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Description
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@ -53,7 +53,7 @@ PROPERTIES
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- compatible
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Usage: required
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Value type: <string>
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Definition: Must include "fsl,p4080-sec-v4.0","fsl,sec-v4.0"
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Definition: Must include "fsl,sec-v4.0"
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- #address-cells
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Usage: required
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@ -105,7 +105,7 @@ PROPERTIES
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EXAMPLE
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crypto@300000 {
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compatible = "fsl,p4080-sec-v4.0", "fsl,sec-v4.0";
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compatible = "fsl,sec-v4.0";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x300000 0x10000>;
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@ -115,7 +115,7 @@ EXAMPLE
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};
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=====================================================================
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P4080 Job Ring (JR) Node
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Job Ring (JR) Node
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Child of the crypto node defines data processing interface to SEC 4
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across the peripheral bus for purposes of processing
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@ -127,7 +127,7 @@ P4080 Job Ring (JR) Node
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- compatible
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Usage: required
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Value type: <string>
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Definition: Must include "fsl,p4080-sec-v4.0-job-ring","fsl,sec-v4.0-job-ring"
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Definition: Must include "fsl,sec-v4.0-job-ring"
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- reg
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Usage: required
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@ -163,8 +163,7 @@ P4080 Job Ring (JR) Node
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EXAMPLE
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jr@1000 {
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compatible = "fsl,p4080-sec-v4.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x1000 0x1000>;
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fsl,liodn = <0x081>;
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interrupt-parent = <&mpic>;
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@ -173,7 +172,7 @@ EXAMPLE
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=====================================================================
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P4080 Run Time Integrity Check (RTIC) Node
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Run Time Integrity Check (RTIC) Node
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Child node of the crypto node. Defines a register space that
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contains up to 5 sets of addresses and their lengths (sizes) that
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@ -186,7 +185,7 @@ P4080 Run Time Integrity Check (RTIC) Node
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- compatible
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Usage: required
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Value type: <string>
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Definition: Must include "fsl,p4080-sec-v4.0-rtic","fsl,sec-v4.0-rtic".
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Definition: Must include "fsl,sec-v4.0-rtic".
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- #address-cells
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Usage: required
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@ -219,8 +218,7 @@ P4080 Run Time Integrity Check (RTIC) Node
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EXAMPLE
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rtic@6000 {
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compatible = "fsl,p4080-sec-v4.0-rtic",
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"fsl,sec-v4.0-rtic";
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compatible = "fsl,sec-v4.0-rtic";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x6000 0x100>;
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@ -228,7 +226,7 @@ EXAMPLE
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};
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=====================================================================
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P4080 Run Time Integrity Check (RTIC) Memory Node
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Run Time Integrity Check (RTIC) Memory Node
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A child node that defines individual RTIC memory regions that are used to
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perform run-time integrity check of memory areas that should not modified.
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The node defines a register that contains the memory address &
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@ -238,7 +236,7 @@ P4080 Run Time Integrity Check (RTIC) Memory Node
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- compatible
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Usage: required
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Value type: <string>
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Definition: Must include "fsl,p4080-sec-v4.0-rtic-memory","fsl,sec-v4.0-rtic-memory".
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Definition: Must include "fsl,sec-v4.0-rtic-memory".
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- reg
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Usage: required
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@ -270,15 +268,14 @@ P4080 Run Time Integrity Check (RTIC) Memory Node
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EXAMPLE
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rtic-a@0 {
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compatible = "fsl,p4080-sec-v4.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x00 0x20 0x100 0x80>;
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fsl,liodn = <0x03c>;
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fsl,rtic-region = <0x12345678 0x12345678 0x12345678>;
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};
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=====================================================================
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P4080 Secure Non-Volatile Storage (SNVS) Node
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Secure Non-Volatile Storage (SNVS) Node
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Node defines address range and the associated
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interrupt for the SNVS function. This function
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@ -288,7 +285,7 @@ P4080 Secure Non-Volatile Storage (SNVS) Node
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- compatible
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Usage: required
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Value type: <string>
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Definition: Must include "fsl,p4080-sec-v4.0-mon", "fsl,sec-v4.0-mon".
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Definition: Must include "fsl,sec-v4.0-mon".
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- reg
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Usage: required
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@ -315,7 +312,7 @@ P4080 Secure Non-Volatile Storage (SNVS) Node
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EXAMPLE
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sec_mon@314000 {
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compatible = "fsl,p4080-sec-v4.0-mon", "fsl,sec-v4.0-mon";
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compatible = "fsl,sec-v4.0-mon";
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reg = <0x314000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <93 2>;
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@ -325,7 +322,7 @@ EXAMPLE
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FULL EXAMPLE
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crypto: crypto@300000 {
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compatible = "fsl,p4080-sec-v4.0", "fsl,sec-v4.0";
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compatible = "fsl,sec-v4.0";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x300000 0x10000>;
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@ -334,73 +331,64 @@ FULL EXAMPLE
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interrupts = <92 2>;
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sec_jr0: jr@1000 {
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compatible = "fsl,p4080-sec-v4.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x1000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <88 2>;
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};
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sec_jr1: jr@2000 {
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compatible = "fsl,p4080-sec-v4.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <89 2>;
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};
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sec_jr2: jr@3000 {
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compatible = "fsl,p4080-sec-v4.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x3000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <90 2>;
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};
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sec_jr3: jr@4000 {
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compatible = "fsl,p4080-sec-v4.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x4000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <91 2>;
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};
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rtic@6000 {
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compatible = "fsl,p4080-sec-v4.0-rtic",
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"fsl,sec-v4.0-rtic";
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compatible = "fsl,sec-v4.0-rtic";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x6000 0x100>;
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ranges = <0x0 0x6100 0xe00>;
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rtic_a: rtic-a@0 {
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compatible = "fsl,p4080-sec-v4.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x00 0x20 0x100 0x80>;
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};
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rtic_b: rtic-b@20 {
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compatible = "fsl,p4080-sec-v4.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x20 0x20 0x200 0x80>;
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};
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rtic_c: rtic-c@40 {
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compatible = "fsl,p4080-sec-v4.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x40 0x20 0x300 0x80>;
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};
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rtic_d: rtic-d@60 {
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compatible = "fsl,p4080-sec-v4.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x60 0x20 0x500 0x80>;
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};
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};
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};
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sec_mon: sec_mon@314000 {
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compatible = "fsl,p4080-sec-v4.0-mon", "fsl,sec-v4.0-mon";
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compatible = "fsl,sec-v4.0-mon";
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reg = <0x314000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <93 2>;
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@ -423,7 +423,7 @@
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};
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crypto: crypto@300000 {
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compatible = "fsl,p4080-sec-v4.0", "fsl,sec-v4.0";
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compatible = "fsl,sec-v4.0";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x300000 0x10000>;
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@ -432,74 +432,64 @@
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interrupts = <92 2>;
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sec_jr0: jr@1000 {
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compatible = "fsl,p4080-sec-v4.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x1000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <88 2>;
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};
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sec_jr1: jr@2000 {
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compatible = "fsl,p4080-sec-v4.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x2000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <89 2>;
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};
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sec_jr2: jr@3000 {
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compatible = "fsl,p4080-sec-v4.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x3000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <90 2>;
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};
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sec_jr3: jr@4000 {
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compatible = "fsl,p4080-sec-v4.0-job-ring",
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"fsl,sec-v4.0-job-ring";
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compatible = "fsl,sec-v4.0-job-ring";
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reg = <0x4000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <91 2>;
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};
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rtic@6000 {
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compatible = "fsl,p4080-sec-v4.0-rtic",
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"fsl,sec-v4.0-rtic";
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compatible = "fsl,sec-v4.0-rtic";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x6000 0x100>;
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ranges = <0x0 0x6100 0xe00>;
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rtic_a: rtic-a@0 {
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compatible = "fsl,p4080-sec-v4.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x00 0x20 0x100 0x80>;
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};
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rtic_b: rtic-b@20 {
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compatible = "fsl,p4080-sec-v4.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x20 0x20 0x200 0x80>;
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};
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rtic_c: rtic-c@40 {
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compatible = "fsl,p4080-sec-v4.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x40 0x20 0x300 0x80>;
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};
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rtic_d: rtic-d@60 {
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compatible = "fsl,p4080-sec-v4.0-rtic-memory",
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"fsl,sec-v4.0-rtic-memory";
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compatible = "fsl,sec-v4.0-rtic-memory";
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reg = <0x60 0x20 0x500 0x80>;
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};
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};
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};
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sec_mon: sec_mon@314000 {
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compatible = "fsl,p4080-sec-v4.0-mon",
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"fsl,sec-v4.0-mon";
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compatible = "fsl,sec-v4.0-mon";
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reg = <0x314000 0x1000>;
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interrupt-parent = <&mpic>;
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interrupts = <93 2>;
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