drm/i915/dsi: add drm mipi dsi host support
Add basic support for using the drm mipi dsi framework for DSI. We don't use device tree which is pretty much required by mipi_dsi_host_register and friends, and we don't have the kind of device model the functions expect either. So we cheat and use it as a library to abstract what we need: a nice, clean interface for DSI transfers. This means we will have to be careful with what functions we call, as the driver model devices in mipi_dsi_host and mipi_dsi_device will *not* be initialized. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-By: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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593e0622f4
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@ -12,6 +12,7 @@ config DRM_I915
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select TMPFS
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select DRM_KMS_HELPER
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select DRM_PANEL
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select DRM_MIPI_DSI
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# i915 depends on ACPI_VIDEO when ACPI is enabled
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# but for select to work, need to select ACPI_VIDEO's dependencies, ick
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select BACKLIGHT_LCD_SUPPORT if ACPI
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@ -29,6 +29,7 @@
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#include <drm/drm_edid.h>
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#include <drm/i915_drm.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_mipi_dsi.h>
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#include <linux/slab.h>
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#include "i915_drv.h"
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#include "intel_drv.h"
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@ -59,6 +60,149 @@ static void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
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DRM_ERROR("DPI FIFOs are not empty\n");
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}
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static void write_data(struct drm_i915_private *dev_priv, u32 reg,
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const u8 *data, u32 len)
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{
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u32 i, j;
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for (i = 0; i < len; i += 4) {
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u32 val = 0;
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for (j = 0; j < min_t(u32, len - i, 4); j++)
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val |= *data++ << 8 * j;
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I915_WRITE(reg, val);
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}
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}
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static void read_data(struct drm_i915_private *dev_priv, u32 reg,
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u8 *data, u32 len)
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{
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u32 i, j;
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for (i = 0; i < len; i += 4) {
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u32 val = I915_READ(reg);
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for (j = 0; j < min_t(u32, len - i, 4); j++)
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*data++ = val >> 8 * j;
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}
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}
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static ssize_t intel_dsi_host_transfer(struct mipi_dsi_host *host,
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const struct mipi_dsi_msg *msg)
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{
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struct intel_dsi_host *intel_dsi_host = to_intel_dsi_host(host);
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struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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enum port port = intel_dsi_host->port;
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struct mipi_dsi_packet packet;
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ssize_t ret;
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const u8 *header, *data;
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u32 data_reg, data_mask, ctrl_reg, ctrl_mask;
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ret = mipi_dsi_create_packet(&packet, msg);
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if (ret < 0)
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return ret;
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header = packet.header;
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data = packet.payload;
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if (msg->flags & MIPI_DSI_MSG_USE_LPM) {
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data_reg = MIPI_LP_GEN_DATA(port);
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data_mask = LP_DATA_FIFO_FULL;
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ctrl_reg = MIPI_LP_GEN_CTRL(port);
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ctrl_mask = LP_CTRL_FIFO_FULL;
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} else {
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data_reg = MIPI_HS_GEN_DATA(port);
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data_mask = HS_DATA_FIFO_FULL;
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ctrl_reg = MIPI_HS_GEN_CTRL(port);
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ctrl_mask = HS_CTRL_FIFO_FULL;
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}
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/* note: this is never true for reads */
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if (packet.payload_length) {
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if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & data_mask) == 0, 50))
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DRM_ERROR("Timeout waiting for HS/LP DATA FIFO !full\n");
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write_data(dev_priv, data_reg, packet.payload,
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packet.payload_length);
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}
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if (msg->rx_len) {
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I915_WRITE(MIPI_INTR_STAT(port), GEN_READ_DATA_AVAIL);
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}
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if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & ctrl_mask) == 0, 50)) {
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DRM_ERROR("Timeout waiting for HS/LP CTRL FIFO !full\n");
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}
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I915_WRITE(ctrl_reg, header[2] << 16 | header[1] << 8 | header[0]);
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/* ->rx_len is set only for reads */
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if (msg->rx_len) {
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data_mask = GEN_READ_DATA_AVAIL;
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if (wait_for((I915_READ(MIPI_INTR_STAT(port)) & data_mask) == data_mask, 50))
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DRM_ERROR("Timeout waiting for read data.\n");
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read_data(dev_priv, data_reg, msg->rx_buf, msg->rx_len);
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}
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/* XXX: fix for reads and writes */
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return 4 + packet.payload_length;
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}
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static int intel_dsi_host_attach(struct mipi_dsi_host *host,
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struct mipi_dsi_device *dsi)
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{
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return 0;
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}
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static int intel_dsi_host_detach(struct mipi_dsi_host *host,
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struct mipi_dsi_device *dsi)
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{
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return 0;
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}
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static const struct mipi_dsi_host_ops intel_dsi_host_ops = {
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.attach = intel_dsi_host_attach,
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.detach = intel_dsi_host_detach,
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.transfer = intel_dsi_host_transfer,
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};
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static struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
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enum port port)
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{
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struct intel_dsi_host *host;
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struct mipi_dsi_device *device;
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host = kzalloc(sizeof(*host), GFP_KERNEL);
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if (!host)
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return NULL;
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host->base.ops = &intel_dsi_host_ops;
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host->intel_dsi = intel_dsi;
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host->port = port;
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/*
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* We should call mipi_dsi_host_register(&host->base) here, but we don't
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* have a host->dev, and we don't have OF stuff either. So just use the
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* dsi framework as a library and hope for the best. Create the dsi
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* devices by ourselves here too. Need to be careful though, because we
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* don't initialize any of the driver model devices here.
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*/
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device = kzalloc(sizeof(*device), GFP_KERNEL);
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if (!device) {
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kfree(host);
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return NULL;
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}
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device->host = &host->base;
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host->device = device;
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return host;
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}
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static void band_gap_reset(struct drm_i915_private *dev_priv)
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{
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mutex_lock(&dev_priv->dpio_lock);
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@ -809,6 +953,7 @@ void intel_dsi_init(struct drm_device *dev)
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struct drm_connector *connector;
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struct drm_display_mode *scan, *fixed_mode = NULL;
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struct drm_i915_private *dev_priv = dev->dev_private;
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enum port port;
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unsigned int i;
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DRM_DEBUG_KMS("\n");
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@ -857,7 +1002,11 @@ void intel_dsi_init(struct drm_device *dev)
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intel_connector->unregister = intel_connector_unregister;
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/* Pipe A maps to MIPI DSI port A, pipe B maps to MIPI DSI port C */
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if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIA) {
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if (dev_priv->vbt.dsi.config->dual_link) {
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/* XXX: does dual link work on either pipe? */
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intel_encoder->crtc_mask = (1 << PIPE_A);
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intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C));
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} else if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIA) {
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intel_encoder->crtc_mask = (1 << PIPE_A);
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intel_dsi->ports = (1 << PORT_A);
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} else if (dev_priv->vbt.dsi.port == DVO_PORT_MIPIC) {
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@ -865,6 +1014,17 @@ void intel_dsi_init(struct drm_device *dev)
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intel_dsi->ports = (1 << PORT_C);
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}
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/* Create a DSI host (and a device) for each port. */
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for_each_dsi_port(port, intel_dsi->ports) {
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struct intel_dsi_host *host;
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host = intel_dsi_host_init(intel_dsi, port);
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if (!host)
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goto err;
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intel_dsi->dsi_hosts[port] = host;
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}
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for (i = 0; i < ARRAY_SIZE(intel_dsi_drivers); i++) {
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intel_dsi->panel = intel_dsi_drivers[i].init(intel_dsi,
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intel_dsi_drivers[i].panel_id);
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@ -26,6 +26,7 @@
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#include <drm/drmP.h>
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#include <drm/drm_crtc.h>
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#include <drm/drm_mipi_dsi.h>
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#include "intel_drv.h"
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/* Dual Link support */
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#define DSI_DUAL_LINK_FRONT_BACK 1
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#define DSI_DUAL_LINK_PIXEL_ALT 2
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struct intel_dsi_host;
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struct intel_dsi {
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struct intel_encoder base;
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struct drm_panel *panel;
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struct intel_dsi_host *dsi_hosts[I915_MAX_PORTS];
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struct intel_connector *attached_connector;
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@ -94,6 +98,20 @@ struct intel_dsi {
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u16 panel_pwr_cycle_delay;
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};
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struct intel_dsi_host {
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struct mipi_dsi_host base;
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struct intel_dsi *intel_dsi;
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enum port port;
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/* our little hack */
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struct mipi_dsi_device *device;
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};
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static inline struct intel_dsi_host *to_intel_dsi_host(struct mipi_dsi_host *h)
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{
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return container_of(h, struct intel_dsi_host, base);
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}
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#define for_each_dsi_port(__port, __ports_mask) \
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for ((__port) = PORT_A; (__port) < I915_MAX_PORTS; (__port)++) \
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if ((__ports_mask) & (1 << (__port)))
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@ -399,9 +399,6 @@ struct drm_panel *vbt_panel_init(struct intel_dsi *intel_dsi, u16 panel_id)
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intel_dsi->dual_link = mipi_config->dual_link;
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intel_dsi->pixel_overlap = mipi_config->pixel_overlap;
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if (intel_dsi->dual_link)
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intel_dsi->ports = ((1 << PORT_A) | (1 << PORT_C));
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if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB666)
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bits_per_pixel = 18;
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else if (intel_dsi->pixel_format == VID_MODE_FORMAT_RGB565)
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