drivers/perf: arm_pmu: manage interrupts per-cpu
When requesting or freeing interrupts, we use platform_get_irq() to find relevant irqs, backing this up with additional information in an optional irq_affinity table. This means that our irq request and free paths are tied to a platform_device, and our request path must jump through a number of hoops in order to determine the required affinity of each interrupt. Given that the affinity must be static, we can compute the affinity once up-front at probe time, simplifying the irq request and free paths. By recording interrupts in a per-cpu data structure, we simplify a few paths, and permit a subsequent rework of the request and free paths. Signed-off-by: Mark Rutland <mark.rutland@arm.com> [will: rename local nr_irqs variable to avoid conflict with global] Signed-off-by: Will Deacon <will.deacon@arm.com>zero-colors
Mark Rutland
Will Deacon
parent
2681f01842
commit
7ed98e0168
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@ -617,94 +617,76 @@ static void cpu_pmu_disable_percpu_irq(void *data)
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static void cpu_pmu_free_irq(struct arm_pmu *cpu_pmu)
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{
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int i, irq, irqs;
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struct platform_device *pmu_device = cpu_pmu->plat_device;
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int cpu;
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struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
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irqs = min(pmu_device->num_resources, num_possible_cpus());
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for_each_cpu(cpu, &cpu_pmu->supported_cpus) {
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int irq = per_cpu(hw_events->irq, cpu);
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if (!irq)
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continue;
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irq = platform_get_irq(pmu_device, 0);
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if (irq > 0 && irq_is_percpu(irq)) {
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on_each_cpu_mask(&cpu_pmu->supported_cpus,
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cpu_pmu_disable_percpu_irq, &irq, 1);
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free_percpu_irq(irq, &hw_events->percpu_pmu);
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} else {
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for (i = 0; i < irqs; ++i) {
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int cpu = i;
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if (irq_is_percpu(irq)) {
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on_each_cpu_mask(&cpu_pmu->supported_cpus,
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cpu_pmu_disable_percpu_irq, &irq, 1);
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free_percpu_irq(irq, &hw_events->percpu_pmu);
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if (cpu_pmu->irq_affinity)
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cpu = cpu_pmu->irq_affinity[i];
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if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs))
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continue;
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irq = platform_get_irq(pmu_device, i);
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if (irq > 0)
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free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, cpu));
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break;
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}
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if (!cpumask_test_and_clear_cpu(cpu, &cpu_pmu->active_irqs))
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continue;
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free_irq(irq, per_cpu_ptr(&hw_events->percpu_pmu, cpu));
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}
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}
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static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
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{
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int i, err, irq, irqs;
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struct platform_device *pmu_device = cpu_pmu->plat_device;
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int cpu, err;
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struct pmu_hw_events __percpu *hw_events = cpu_pmu->hw_events;
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if (!pmu_device)
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return -ENODEV;
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for_each_cpu(cpu, &cpu_pmu->supported_cpus) {
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int irq = per_cpu(hw_events->irq, cpu);
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if (!irq)
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continue;
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irqs = min(pmu_device->num_resources, num_possible_cpus());
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if (irqs < 1) {
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pr_warn_once("perf/ARM: No irqs for PMU defined, sampling events not supported\n");
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return 0;
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}
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irq = platform_get_irq(pmu_device, 0);
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if (irq > 0 && irq_is_percpu(irq)) {
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err = request_percpu_irq(irq, handler, "arm-pmu",
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&hw_events->percpu_pmu);
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if (err) {
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pr_err("unable to request IRQ%d for ARM PMU counters\n",
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irq);
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return err;
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}
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on_each_cpu_mask(&cpu_pmu->supported_cpus,
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cpu_pmu_enable_percpu_irq, &irq, 1);
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} else {
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for (i = 0; i < irqs; ++i) {
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int cpu = i;
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err = 0;
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irq = platform_get_irq(pmu_device, i);
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if (irq < 0)
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continue;
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if (cpu_pmu->irq_affinity)
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cpu = cpu_pmu->irq_affinity[i];
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/*
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* If we have a single PMU interrupt that we can't shift,
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* assume that we're running on a uniprocessor machine and
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* continue. Otherwise, continue without this interrupt.
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*/
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if (irq_set_affinity(irq, cpumask_of(cpu)) && irqs > 1) {
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pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
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irq, cpu);
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continue;
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}
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err = request_irq(irq, handler,
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IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
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per_cpu_ptr(&hw_events->percpu_pmu, cpu));
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if (irq_is_percpu(irq)) {
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err = request_percpu_irq(irq, handler, "arm-pmu",
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&hw_events->percpu_pmu);
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if (err) {
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pr_err("unable to request IRQ%d for ARM PMU counters\n",
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irq);
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return err;
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}
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cpumask_set_cpu(cpu, &cpu_pmu->active_irqs);
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on_each_cpu_mask(&cpu_pmu->supported_cpus,
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cpu_pmu_enable_percpu_irq, &irq, 1);
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break;
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}
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/*
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* If we have a single PMU interrupt that we can't shift,
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* assume that we're running on a uniprocessor machine and
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* continue. Otherwise, continue without this interrupt.
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*/
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if (irq_set_affinity(irq, cpumask_of(cpu)) &&
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num_possible_cpus() > 1) {
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pr_warn("unable to set irq affinity (irq=%d, cpu=%u)\n",
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irq, cpu);
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continue;
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}
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err = request_irq(irq, handler,
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IRQF_NOBALANCING | IRQF_NO_THREAD, "arm-pmu",
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per_cpu_ptr(&hw_events->percpu_pmu, cpu));
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if (err) {
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pr_err("unable to request IRQ%d for ARM PMU counters\n",
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irq);
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return err;
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}
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cpumask_set_cpu(cpu, &cpu_pmu->active_irqs);
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}
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return 0;
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@ -846,10 +828,6 @@ static int cpu_pmu_init(struct arm_pmu *cpu_pmu)
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on_each_cpu_mask(&cpu_pmu->supported_cpus, cpu_pmu->reset,
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cpu_pmu, 1);
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/* If no interrupts available, set the corresponding capability flag */
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if (!platform_get_irq(cpu_pmu->plat_device, 0))
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cpu_pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
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/*
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* This is a CPU PMU potentially in a heterogeneous configuration (e.g.
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* big.LITTLE). This is not an uncore PMU, and we have taken ctx
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@ -897,98 +875,133 @@ static int probe_current_pmu(struct arm_pmu *pmu,
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return ret;
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}
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static int of_pmu_irq_cfg(struct arm_pmu *pmu)
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static int pmu_parse_percpu_irq(struct arm_pmu *pmu, int irq)
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{
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int *irqs, i = 0;
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bool using_spi = false;
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struct platform_device *pdev = pmu->plat_device;
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int cpu, ret;
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struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
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irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
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if (!irqs)
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return -ENOMEM;
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ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
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if (ret)
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return ret;
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do {
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struct device_node *dn;
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int cpu, irq;
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for_each_cpu(cpu, &pmu->supported_cpus)
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per_cpu(hw_events->irq, cpu) = irq;
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/* See if we have an affinity entry */
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dn = of_parse_phandle(pdev->dev.of_node, "interrupt-affinity", i);
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if (!dn)
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break;
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return 0;
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}
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/* Check the IRQ type and prohibit a mix of PPIs and SPIs */
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irq = platform_get_irq(pdev, i);
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if (irq > 0) {
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bool spi = !irq_is_percpu(irq);
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static bool pmu_has_irq_affinity(struct device_node *node)
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{
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return !!of_find_property(node, "interrupt-affinity", NULL);
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}
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if (i > 0 && spi != using_spi) {
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pr_err("PPI/SPI IRQ type mismatch for %s!\n",
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dn->name);
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of_node_put(dn);
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kfree(irqs);
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return -EINVAL;
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}
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static int pmu_parse_irq_affinity(struct device_node *node, int i)
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{
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struct device_node *dn;
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int cpu;
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using_spi = spi;
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}
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/*
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* If we don't have an interrupt-affinity property, we guess irq
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* affinity matches our logical CPU order, as we used to assume.
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* This is fragile, so we'll warn in pmu_parse_irqs().
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*/
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if (!pmu_has_irq_affinity(node))
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return i;
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/* Now look up the logical CPU number */
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for_each_possible_cpu(cpu) {
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struct device_node *cpu_dn;
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cpu_dn = of_cpu_device_node_get(cpu);
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of_node_put(cpu_dn);
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if (dn == cpu_dn)
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break;
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}
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if (cpu >= nr_cpu_ids) {
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pr_warn("Failed to find logical CPU for %s\n",
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dn->name);
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of_node_put(dn);
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cpumask_setall(&pmu->supported_cpus);
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break;
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}
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of_node_put(dn);
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/* For SPIs, we need to track the affinity per IRQ */
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if (using_spi) {
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if (i >= pdev->num_resources)
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break;
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irqs[i] = cpu;
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}
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/* Keep track of the CPUs containing this PMU type */
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cpumask_set_cpu(cpu, &pmu->supported_cpus);
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i++;
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} while (1);
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/* If we didn't manage to parse anything, try the interrupt affinity */
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if (cpumask_weight(&pmu->supported_cpus) == 0) {
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int irq = platform_get_irq(pdev, 0);
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if (irq > 0 && irq_is_percpu(irq)) {
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/* If using PPIs, check the affinity of the partition */
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int ret;
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ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus);
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if (ret) {
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kfree(irqs);
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return ret;
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}
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} else {
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/* Otherwise default to all CPUs */
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cpumask_setall(&pmu->supported_cpus);
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}
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dn = of_parse_phandle(node, "interrupt-affinity", i);
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if (!dn) {
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pr_warn("failed to parse interrupt-affinity[%d] for %s\n",
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i, node->name);
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return -EINVAL;
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}
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/* If we matched up the IRQ affinities, use them to route the SPIs */
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if (using_spi && i == pdev->num_resources)
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pmu->irq_affinity = irqs;
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else
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kfree(irqs);
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/* Now look up the logical CPU number */
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for_each_possible_cpu(cpu) {
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struct device_node *cpu_dn;
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cpu_dn = of_cpu_device_node_get(cpu);
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of_node_put(cpu_dn);
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if (dn == cpu_dn)
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break;
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}
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if (cpu >= nr_cpu_ids) {
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pr_warn("failed to find logical CPU for %s\n", dn->name);
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}
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of_node_put(dn);
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return cpu;
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}
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static int pmu_parse_irqs(struct arm_pmu *pmu)
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{
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int i = 0, irqs;
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struct platform_device *pdev = pmu->plat_device;
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struct pmu_hw_events __percpu *hw_events = pmu->hw_events;
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irqs = platform_irq_count(pdev);
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if (irqs < 0) {
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pr_err("unable to count PMU IRQs\n");
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return irqs;
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}
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/*
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* In this case we have no idea which CPUs are covered by the PMU.
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* To match our prior behaviour, we assume all CPUs in this case.
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*/
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if (irqs == 0) {
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pr_warn("no irqs for PMU, sampling events not supported\n");
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pmu->pmu.capabilities |= PERF_PMU_CAP_NO_INTERRUPT;
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cpumask_setall(&pmu->supported_cpus);
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return 0;
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}
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if (irqs == 1) {
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int irq = platform_get_irq(pdev, 0);
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if (irq && irq_is_percpu(irq))
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return pmu_parse_percpu_irq(pmu, irq);
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}
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if (!pmu_has_irq_affinity(pdev->dev.of_node)) {
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pr_warn("no interrupt-affinity property for %s, guessing.\n",
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of_node_full_name(pdev->dev.of_node));
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}
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/*
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* Some platforms have all PMU IRQs OR'd into a single IRQ, with a
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* special platdata function that attempts to demux them.
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*/
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if (dev_get_platdata(&pdev->dev))
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cpumask_setall(&pmu->supported_cpus);
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for (i = 0; i < irqs; i++) {
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int cpu, irq;
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irq = platform_get_irq(pdev, i);
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if (WARN_ON(irq <= 0))
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continue;
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if (irq_is_percpu(irq)) {
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pr_warn("multiple PPIs or mismatched SPI/PPI detected\n");
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return -EINVAL;
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}
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cpu = pmu_parse_irq_affinity(pdev->dev.of_node, i);
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if (cpu < 0)
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return cpu;
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if (cpu >= nr_cpu_ids)
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continue;
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if (per_cpu(hw_events->irq, cpu)) {
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pr_warn("multiple PMU IRQs for the same CPU detected\n");
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return -EINVAL;
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}
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per_cpu(hw_events->irq, cpu) = irq;
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cpumask_set_cpu(cpu, &pmu->supported_cpus);
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}
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return 0;
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}
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@ -1050,6 +1063,10 @@ int arm_pmu_device_probe(struct platform_device *pdev,
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pmu->plat_device = pdev;
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ret = pmu_parse_irqs(pmu);
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if (ret)
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goto out_free;
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if (node && (of_id = of_match_node(of_table, pdev->dev.of_node))) {
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init_fn = of_id->data;
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@ -1062,9 +1079,7 @@ int arm_pmu_device_probe(struct platform_device *pdev,
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pmu->secure_access = false;
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}
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ret = of_pmu_irq_cfg(pmu);
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if (!ret)
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ret = init_fn(pmu);
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ret = init_fn(pmu);
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} else if (probe_table) {
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cpumask_setall(&pmu->supported_cpus);
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ret = probe_current_pmu(pmu, probe_table);
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@ -1097,7 +1112,6 @@ out_destroy:
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out_free:
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pr_info("%s: failed to register PMU devices!\n",
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of_node_full_name(node));
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kfree(pmu->irq_affinity);
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armpmu_free(pmu);
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return ret;
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}
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@ -75,6 +75,8 @@ struct pmu_hw_events {
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* already have to allocate this struct per cpu.
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*/
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struct arm_pmu *percpu_pmu;
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int irq;
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};
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enum armpmu_attr_groups {
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@ -88,7 +90,6 @@ struct arm_pmu {
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struct pmu pmu;
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cpumask_t active_irqs;
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cpumask_t supported_cpus;
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int *irq_affinity;
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char *name;
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irqreturn_t (*handle_irq)(int irq_num, void *dev);
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void (*enable)(struct perf_event *event);
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