usb: dwc3: dwc3-omap: get rid of ->prepare()/->complete()
Enabling the core interrupts in complete is too late for XHCI, and stops it from proper operation. The root of the problem is due to a disagreement between dwc3-omap and XHCI about when IRQs should be enabled. As it turns out, ->resume's documentation states that: "... generally the driver is expected to start working again, responding to hardware events and software requests (the device itself may be left in a low-power state, waiting for a runtime resume to occur) ..." From that we infer that IRQs must be unmasked by the end of ->resume(). Due to that, we will remove ->prepare() and ->complete() and disable/enable interrupts in ->suspend()/->resume(). Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: George Cherian <george.cherian@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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@ -593,27 +593,12 @@ static const struct of_device_id of_dwc3_match[] = {
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MODULE_DEVICE_TABLE(of, of_dwc3_match);
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#ifdef CONFIG_PM_SLEEP
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static int dwc3_omap_prepare(struct device *dev)
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{
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struct dwc3_omap *omap = dev_get_drvdata(dev);
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dwc3_omap_disable_irqs(omap);
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return 0;
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}
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static void dwc3_omap_complete(struct device *dev)
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{
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struct dwc3_omap *omap = dev_get_drvdata(dev);
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dwc3_omap_enable_irqs(omap);
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}
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static int dwc3_omap_suspend(struct device *dev)
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{
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struct dwc3_omap *omap = dev_get_drvdata(dev);
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omap->utmi_otg_status = dwc3_omap_read_utmi_status(omap);
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dwc3_omap_disable_irqs(omap);
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return 0;
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}
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@ -623,6 +608,7 @@ static int dwc3_omap_resume(struct device *dev)
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struct dwc3_omap *omap = dev_get_drvdata(dev);
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dwc3_omap_write_utmi_status(omap, omap->utmi_otg_status);
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dwc3_omap_enable_irqs(omap);
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pm_runtime_disable(dev);
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pm_runtime_set_active(dev);
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@ -632,8 +618,6 @@ static int dwc3_omap_resume(struct device *dev)
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}
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static const struct dev_pm_ops dwc3_omap_dev_pm_ops = {
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.prepare = dwc3_omap_prepare,
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.complete = dwc3_omap_complete,
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SET_SYSTEM_SLEEP_PM_OPS(dwc3_omap_suspend, dwc3_omap_resume)
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};
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