Merge commit 'v2.6.30' into for-2.6.31
This commit is contained in:
commit
7eef4091a6
|
@ -69,9 +69,13 @@ Description:
|
|||
gpe1F: 0 invalid
|
||||
gpe_all: 1192
|
||||
sci: 1194
|
||||
sci_not: 0
|
||||
|
||||
sci - The total number of times the ACPI SCI
|
||||
has claimed an interrupt.
|
||||
sci - The number of times the ACPI SCI
|
||||
has been called and claimed an interrupt.
|
||||
|
||||
sci_not - The number of times the ACPI SCI
|
||||
has been called and NOT claimed an interrupt.
|
||||
|
||||
gpe_all - count of SCI caused by GPEs.
|
||||
|
||||
|
|
479
Documentation/ABI/testing/sysfs-kernel-slab
Normal file
479
Documentation/ABI/testing/sysfs-kernel-slab
Normal file
|
@ -0,0 +1,479 @@
|
|||
What: /sys/kernel/slab
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The /sys/kernel/slab directory contains a snapshot of the
|
||||
internal state of the SLUB allocator for each cache. Certain
|
||||
files may be modified to change the behavior of the cache (and
|
||||
any cache it aliases, if any).
|
||||
Users: kernel memory tuning tools
|
||||
|
||||
What: /sys/kernel/slab/cache/aliases
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The aliases file is read-only and specifies how many caches
|
||||
have merged into this cache.
|
||||
|
||||
What: /sys/kernel/slab/cache/align
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The align file is read-only and specifies the cache's object
|
||||
alignment in bytes.
|
||||
|
||||
What: /sys/kernel/slab/cache/alloc_calls
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The alloc_calls file is read-only and lists the kernel code
|
||||
locations from which allocations for this cache were performed.
|
||||
The alloc_calls file only contains information if debugging is
|
||||
enabled for that cache (see Documentation/vm/slub.txt).
|
||||
|
||||
What: /sys/kernel/slab/cache/alloc_fastpath
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The alloc_fastpath file is read-only and specifies how many
|
||||
objects have been allocated using the fast path.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/alloc_from_partial
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The alloc_from_partial file is read-only and specifies how
|
||||
many times a cpu slab has been full and it has been refilled
|
||||
by using a slab from the list of partially used slabs.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/alloc_refill
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The alloc_refill file is read-only and specifies how many
|
||||
times the per-cpu freelist was empty but there were objects
|
||||
available as the result of remote cpu frees.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/alloc_slab
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The alloc_slab file is read-only and specifies how many times
|
||||
a new slab had to be allocated from the page allocator.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/alloc_slowpath
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The alloc_slowpath file is read-only and specifies how many
|
||||
objects have been allocated using the slow path because of a
|
||||
refill or allocation from a partial or new slab.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/cache_dma
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The cache_dma file is read-only and specifies whether objects
|
||||
are from ZONE_DMA.
|
||||
Available when CONFIG_ZONE_DMA is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/cpu_slabs
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The cpu_slabs file is read-only and displays how many cpu slabs
|
||||
are active and their NUMA locality.
|
||||
|
||||
What: /sys/kernel/slab/cache/cpuslab_flush
|
||||
Date: April 2009
|
||||
KernelVersion: 2.6.31
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file cpuslab_flush is read-only and specifies how many
|
||||
times a cache's cpu slabs have been flushed as the result of
|
||||
destroying or shrinking a cache, a cpu going offline, or as
|
||||
the result of forcing an allocation from a certain node.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/ctor
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The ctor file is read-only and specifies the cache's object
|
||||
constructor function, which is invoked for each object when a
|
||||
new slab is allocated.
|
||||
|
||||
What: /sys/kernel/slab/cache/deactivate_empty
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file deactivate_empty is read-only and specifies how many
|
||||
times an empty cpu slab was deactivated.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/deactivate_full
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file deactivate_full is read-only and specifies how many
|
||||
times a full cpu slab was deactivated.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/deactivate_remote_frees
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file deactivate_remote_frees is read-only and specifies how
|
||||
many times a cpu slab has been deactivated and contained free
|
||||
objects that were freed remotely.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/deactivate_to_head
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file deactivate_to_head is read-only and specifies how
|
||||
many times a partial cpu slab was deactivated and added to the
|
||||
head of its node's partial list.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/deactivate_to_tail
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file deactivate_to_tail is read-only and specifies how
|
||||
many times a partial cpu slab was deactivated and added to the
|
||||
tail of its node's partial list.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/destroy_by_rcu
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The destroy_by_rcu file is read-only and specifies whether
|
||||
slabs (not objects) are freed by rcu.
|
||||
|
||||
What: /sys/kernel/slab/cache/free_add_partial
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file free_add_partial is read-only and specifies how many
|
||||
times an object has been freed in a full slab so that it had to
|
||||
added to its node's partial list.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/free_calls
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The free_calls file is read-only and lists the locations of
|
||||
object frees if slab debugging is enabled (see
|
||||
Documentation/vm/slub.txt).
|
||||
|
||||
What: /sys/kernel/slab/cache/free_fastpath
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The free_fastpath file is read-only and specifies how many
|
||||
objects have been freed using the fast path because it was an
|
||||
object from the cpu slab.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/free_frozen
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The free_frozen file is read-only and specifies how many
|
||||
objects have been freed to a frozen slab (i.e. a remote cpu
|
||||
slab).
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/free_remove_partial
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file free_remove_partial is read-only and specifies how
|
||||
many times an object has been freed to a now-empty slab so
|
||||
that it had to be removed from its node's partial list.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/free_slab
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The free_slab file is read-only and specifies how many times an
|
||||
empty slab has been freed back to the page allocator.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/free_slowpath
|
||||
Date: February 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The free_slowpath file is read-only and specifies how many
|
||||
objects have been freed using the slow path (i.e. to a full or
|
||||
partial slab).
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/hwcache_align
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The hwcache_align file is read-only and specifies whether
|
||||
objects are aligned on cachelines.
|
||||
|
||||
What: /sys/kernel/slab/cache/min_partial
|
||||
Date: February 2009
|
||||
KernelVersion: 2.6.30
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
David Rientjes <rientjes@google.com>
|
||||
Description:
|
||||
The min_partial file specifies how many empty slabs shall
|
||||
remain on a node's partial list to avoid the overhead of
|
||||
allocating new slabs. Such slabs may be reclaimed by utilizing
|
||||
the shrink file.
|
||||
|
||||
What: /sys/kernel/slab/cache/object_size
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The object_size file is read-only and specifies the cache's
|
||||
object size.
|
||||
|
||||
What: /sys/kernel/slab/cache/objects
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The objects file is read-only and displays how many objects are
|
||||
active and from which nodes they are from.
|
||||
|
||||
What: /sys/kernel/slab/cache/objects_partial
|
||||
Date: April 2008
|
||||
KernelVersion: 2.6.26
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The objects_partial file is read-only and displays how many
|
||||
objects are on partial slabs and from which nodes they are
|
||||
from.
|
||||
|
||||
What: /sys/kernel/slab/cache/objs_per_slab
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file objs_per_slab is read-only and specifies how many
|
||||
objects may be allocated from a single slab of the order
|
||||
specified in /sys/kernel/slab/cache/order.
|
||||
|
||||
What: /sys/kernel/slab/cache/order
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The order file specifies the page order at which new slabs are
|
||||
allocated. It is writable and can be changed to increase the
|
||||
number of objects per slab. If a slab cannot be allocated
|
||||
because of fragmentation, SLUB will retry with the minimum order
|
||||
possible depending on its characteristics.
|
||||
|
||||
What: /sys/kernel/slab/cache/order_fallback
|
||||
Date: April 2008
|
||||
KernelVersion: 2.6.26
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file order_fallback is read-only and specifies how many
|
||||
times an allocation of a new slab has not been possible at the
|
||||
cache's order and instead fallen back to its minimum possible
|
||||
order.
|
||||
Available when CONFIG_SLUB_STATS is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/partial
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The partial file is read-only and displays how long many
|
||||
partial slabs there are and how long each node's list is.
|
||||
|
||||
What: /sys/kernel/slab/cache/poison
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The poison file specifies whether objects should be poisoned
|
||||
when a new slab is allocated.
|
||||
|
||||
What: /sys/kernel/slab/cache/reclaim_account
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The reclaim_account file specifies whether the cache's objects
|
||||
are reclaimable (and grouped by their mobility).
|
||||
|
||||
What: /sys/kernel/slab/cache/red_zone
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The red_zone file specifies whether the cache's objects are red
|
||||
zoned.
|
||||
|
||||
What: /sys/kernel/slab/cache/remote_node_defrag_ratio
|
||||
Date: January 2008
|
||||
KernelVersion: 2.6.25
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The file remote_node_defrag_ratio specifies the percentage of
|
||||
times SLUB will attempt to refill the cpu slab with a partial
|
||||
slab from a remote node as opposed to allocating a new slab on
|
||||
the local node. This reduces the amount of wasted memory over
|
||||
the entire system but can be expensive.
|
||||
Available when CONFIG_NUMA is enabled.
|
||||
|
||||
What: /sys/kernel/slab/cache/sanity_checks
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The sanity_checks file specifies whether expensive checks
|
||||
should be performed on free and, at minimum, enables double free
|
||||
checks. Caches that enable sanity_checks cannot be merged with
|
||||
caches that do not.
|
||||
|
||||
What: /sys/kernel/slab/cache/shrink
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The shrink file is written when memory should be reclaimed from
|
||||
a cache. Empty partial slabs are freed and the partial list is
|
||||
sorted so the slabs with the fewest available objects are used
|
||||
first.
|
||||
|
||||
What: /sys/kernel/slab/cache/slab_size
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The slab_size file is read-only and specifies the object size
|
||||
with metadata (debugging information and alignment) in bytes.
|
||||
|
||||
What: /sys/kernel/slab/cache/slabs
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The slabs file is read-only and displays how long many slabs
|
||||
there are (both cpu and partial) and from which nodes they are
|
||||
from.
|
||||
|
||||
What: /sys/kernel/slab/cache/store_user
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The store_user file specifies whether the location of
|
||||
allocation or free should be tracked for a cache.
|
||||
|
||||
What: /sys/kernel/slab/cache/total_objects
|
||||
Date: April 2008
|
||||
KernelVersion: 2.6.26
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The total_objects file is read-only and displays how many total
|
||||
objects a cache has and from which nodes they are from.
|
||||
|
||||
What: /sys/kernel/slab/cache/trace
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
The trace file specifies whether object allocations and frees
|
||||
should be traced.
|
||||
|
||||
What: /sys/kernel/slab/cache/validate
|
||||
Date: May 2007
|
||||
KernelVersion: 2.6.22
|
||||
Contact: Pekka Enberg <penberg@cs.helsinki.fi>,
|
||||
Christoph Lameter <cl@linux-foundation.org>
|
||||
Description:
|
||||
Writing to the validate file causes SLUB to traverse all of its
|
||||
cache's objects and check the validity of metadata.
|
|
@ -143,7 +143,8 @@ quiet_cmd_db2pdf = PDF $@
|
|||
$(call cmd,db2pdf)
|
||||
|
||||
|
||||
main_idx = Documentation/DocBook/index.html
|
||||
index = index.html
|
||||
main_idx = Documentation/DocBook/$(index)
|
||||
build_main_index = rm -rf $(main_idx) && \
|
||||
echo '<h1>Linux Kernel HTML Documentation</h1>' >> $(main_idx) && \
|
||||
echo '<h2>Kernel Version: $(KERNELVERSION)</h2>' >> $(main_idx) && \
|
||||
|
@ -232,7 +233,7 @@ clean-files := $(DOCBOOKS) \
|
|||
$(patsubst %.xml, %.pdf, $(DOCBOOKS)) \
|
||||
$(patsubst %.xml, %.html, $(DOCBOOKS)) \
|
||||
$(patsubst %.xml, %.9, $(DOCBOOKS)) \
|
||||
$(C-procfs-example)
|
||||
$(C-procfs-example) $(index)
|
||||
|
||||
clean-dirs := $(patsubst %.xml,%,$(DOCBOOKS)) man
|
||||
|
||||
|
|
|
@ -190,16 +190,20 @@ X!Ekernel/module.c
|
|||
!Edrivers/pci/pci.c
|
||||
!Edrivers/pci/pci-driver.c
|
||||
!Edrivers/pci/remove.c
|
||||
!Edrivers/pci/pci-acpi.c
|
||||
!Edrivers/pci/search.c
|
||||
!Edrivers/pci/msi.c
|
||||
!Edrivers/pci/bus.c
|
||||
!Edrivers/pci/access.c
|
||||
!Edrivers/pci/irq.c
|
||||
!Edrivers/pci/htirq.c
|
||||
<!-- FIXME: Removed for now since no structured comments in source
|
||||
X!Edrivers/pci/hotplug.c
|
||||
-->
|
||||
!Edrivers/pci/probe.c
|
||||
!Edrivers/pci/slot.c
|
||||
!Edrivers/pci/rom.c
|
||||
!Edrivers/pci/iov.c
|
||||
!Idrivers/pci/pci-sysfs.c
|
||||
</sect1>
|
||||
<sect1><title>PCI Hotplug Support Library</title>
|
||||
!Edrivers/pci/hotplug/pci_hotplug_core.c
|
||||
|
|
|
@ -281,7 +281,7 @@
|
|||
seriously wrong while debugging, it will most often be the case
|
||||
that you want to enable gdb to be verbose about its target
|
||||
communications. You do this prior to issuing the <constant>target
|
||||
remote</constant> command by typing in: <constant>set remote debug 1</constant>
|
||||
remote</constant> command by typing in: <constant>set debug remote 1</constant>
|
||||
</para>
|
||||
</chapter>
|
||||
<chapter id="KGDBTestSuite">
|
||||
|
|
|
@ -512,16 +512,24 @@ locking rules:
|
|||
BKL mmap_sem PageLocked(page)
|
||||
open: no yes
|
||||
close: no yes
|
||||
fault: no yes
|
||||
page_mkwrite: no yes no
|
||||
fault: no yes can return with page locked
|
||||
page_mkwrite: no yes can return with page locked
|
||||
access: no yes
|
||||
|
||||
->page_mkwrite() is called when a previously read-only page is
|
||||
about to become writeable. The file system is responsible for
|
||||
protecting against truncate races. Once appropriate action has been
|
||||
taking to lock out truncate, the page range should be verified to be
|
||||
within i_size. The page mapping should also be checked that it is not
|
||||
NULL.
|
||||
->fault() is called when a previously not present pte is about
|
||||
to be faulted in. The filesystem must find and return the page associated
|
||||
with the passed in "pgoff" in the vm_fault structure. If it is possible that
|
||||
the page may be truncated and/or invalidated, then the filesystem must lock
|
||||
the page, then ensure it is not already truncated (the page lock will block
|
||||
subsequent truncate), and then return with VM_FAULT_LOCKED, and the page
|
||||
locked. The VM will unlock the page.
|
||||
|
||||
->page_mkwrite() is called when a previously read-only pte is
|
||||
about to become writeable. The filesystem again must ensure that there are
|
||||
no truncate/invalidate races, and then return with the page locked. If
|
||||
the page has been truncated, the filesystem should not look up a new page
|
||||
like the ->fault() handler, but simply return with VM_FAULT_NOPAGE, which
|
||||
will cause the VM to retry the fault.
|
||||
|
||||
->access() is called when get_user_pages() fails in
|
||||
acces_process_vm(), typically used to debug a process through
|
||||
|
|
|
@ -407,7 +407,7 @@ A NOTE ON SECURITY
|
|||
==================
|
||||
|
||||
CacheFiles makes use of the split security in the task_struct. It allocates
|
||||
its own task_security structure, and redirects current->act_as to point to it
|
||||
its own task_security structure, and redirects current->cred to point to it
|
||||
when it acts on behalf of another process, in that process's context.
|
||||
|
||||
The reason it does this is that it calls vfs_mkdir() and suchlike rather than
|
||||
|
@ -429,9 +429,9 @@ This means it may lose signals or ptrace events for example, and affects what
|
|||
the process looks like in /proc.
|
||||
|
||||
So CacheFiles makes use of a logical split in the security between the
|
||||
objective security (task->sec) and the subjective security (task->act_as). The
|
||||
objective security holds the intrinsic security properties of a process and is
|
||||
never overridden. This is what appears in /proc, and is what is used when a
|
||||
objective security (task->real_cred) and the subjective security (task->cred).
|
||||
The objective security holds the intrinsic security properties of a process and
|
||||
is never overridden. This is what appears in /proc, and is what is used when a
|
||||
process is the target of an operation by some other process (SIGKILL for
|
||||
example).
|
||||
|
||||
|
|
|
@ -133,4 +133,4 @@ RAM/SWAP in 10240 inodes and it is only accessible by root.
|
|||
Author:
|
||||
Christoph Rohland <cr@sap.com>, 1.12.01
|
||||
Updated:
|
||||
Hugh Dickins <hugh@veritas.com>, 4 June 2007
|
||||
Hugh Dickins, 4 June 2007
|
||||
|
|
|
@ -150,6 +150,11 @@ fan[1-*]_min Fan minimum value
|
|||
Unit: revolution/min (RPM)
|
||||
RW
|
||||
|
||||
fan[1-*]_max Fan maximum value
|
||||
Unit: revolution/min (RPM)
|
||||
Only rarely supported by the hardware.
|
||||
RW
|
||||
|
||||
fan[1-*]_input Fan input value.
|
||||
Unit: revolution/min (RPM)
|
||||
RO
|
||||
|
@ -390,6 +395,7 @@ OR
|
|||
in[0-*]_min_alarm
|
||||
in[0-*]_max_alarm
|
||||
fan[1-*]_min_alarm
|
||||
fan[1-*]_max_alarm
|
||||
temp[1-*]_min_alarm
|
||||
temp[1-*]_max_alarm
|
||||
temp[1-*]_crit_alarm
|
||||
|
|
65
Documentation/input/bcm5974.txt
Normal file
65
Documentation/input/bcm5974.txt
Normal file
|
@ -0,0 +1,65 @@
|
|||
BCM5974 Driver (bcm5974)
|
||||
------------------------
|
||||
Copyright (C) 2008-2009 Henrik Rydberg <rydberg@euromail.se>
|
||||
|
||||
The USB initialization and package decoding was made by Scott Shawcroft as
|
||||
part of the touchd user-space driver project:
|
||||
Copyright (C) 2008 Scott Shawcroft (scott.shawcroft@gmail.com)
|
||||
|
||||
The BCM5974 driver is based on the appletouch driver:
|
||||
Copyright (C) 2001-2004 Greg Kroah-Hartman (greg@kroah.com)
|
||||
Copyright (C) 2005 Johannes Berg (johannes@sipsolutions.net)
|
||||
Copyright (C) 2005 Stelian Pop (stelian@popies.net)
|
||||
Copyright (C) 2005 Frank Arnold (frank@scirocco-5v-turbo.de)
|
||||
Copyright (C) 2005 Peter Osterlund (petero2@telia.com)
|
||||
Copyright (C) 2005 Michael Hanselmann (linux-kernel@hansmi.ch)
|
||||
Copyright (C) 2006 Nicolas Boichat (nicolas@boichat.ch)
|
||||
|
||||
This driver adds support for the multi-touch trackpad on the new Apple
|
||||
Macbook Air and Macbook Pro laptops. It replaces the appletouch driver on
|
||||
those computers, and integrates well with the synaptics driver of the Xorg
|
||||
system.
|
||||
|
||||
Known to work on Macbook Air, Macbook Pro Penryn and the new unibody
|
||||
Macbook 5 and Macbook Pro 5.
|
||||
|
||||
Usage
|
||||
-----
|
||||
|
||||
The driver loads automatically for the supported usb device ids, and
|
||||
becomes available both as an event device (/dev/input/event*) and as a
|
||||
mouse via the mousedev driver (/dev/input/mice).
|
||||
|
||||
USB Race
|
||||
--------
|
||||
|
||||
The Apple multi-touch trackpads report both mouse and keyboard events via
|
||||
different interfaces of the same usb device. This creates a race condition
|
||||
with the HID driver, which, if not told otherwise, will find the standard
|
||||
HID mouse and keyboard, and claim the whole device. To remedy, the usb
|
||||
product id must be listed in the mouse_ignore list of the hid driver.
|
||||
|
||||
Debug output
|
||||
------------
|
||||
|
||||
To ease the development for new hardware version, verbose packet output can
|
||||
be switched on with the debug kernel module parameter. The range [1-9]
|
||||
yields different levels of verbosity. Example (as root):
|
||||
|
||||
echo -n 9 > /sys/module/bcm5974/parameters/debug
|
||||
|
||||
tail -f /var/log/debug
|
||||
|
||||
echo -n 0 > /sys/module/bcm5974/parameters/debug
|
||||
|
||||
Trivia
|
||||
------
|
||||
|
||||
The driver was developed at the ubuntu forums in June 2008 [1], and now has
|
||||
a more permanent home at bitmath.org [2].
|
||||
|
||||
Links
|
||||
-----
|
||||
|
||||
[1] http://ubuntuforums.org/showthread.php?t=840040
|
||||
[2] http://http://bitmath.org/code/
|
195
Documentation/input/multi-touch-protocol.txt
Normal file
195
Documentation/input/multi-touch-protocol.txt
Normal file
|
@ -0,0 +1,195 @@
|
|||
Multi-touch (MT) Protocol
|
||||
-------------------------
|
||||
Copyright (C) 2009 Henrik Rydberg <rydberg@euromail.se>
|
||||
|
||||
|
||||
Introduction
|
||||
------------
|
||||
|
||||
In order to utilize the full power of the new multi-touch devices, a way to
|
||||
report detailed finger data to user space is needed. This document
|
||||
describes the multi-touch (MT) protocol which allows kernel drivers to
|
||||
report details for an arbitrary number of fingers.
|
||||
|
||||
|
||||
Usage
|
||||
-----
|
||||
|
||||
Anonymous finger details are sent sequentially as separate packets of ABS
|
||||
events. Only the ABS_MT events are recognized as part of a finger
|
||||
packet. The end of a packet is marked by calling the input_mt_sync()
|
||||
function, which generates a SYN_MT_REPORT event. This instructs the
|
||||
receiver to accept the data for the current finger and prepare to receive
|
||||
another. The end of a multi-touch transfer is marked by calling the usual
|
||||
input_sync() function. This instructs the receiver to act upon events
|
||||
accumulated since last EV_SYN/SYN_REPORT and prepare to receive a new
|
||||
set of events/packets.
|
||||
|
||||
A set of ABS_MT events with the desired properties is defined. The events
|
||||
are divided into categories, to allow for partial implementation. The
|
||||
minimum set consists of ABS_MT_TOUCH_MAJOR, ABS_MT_POSITION_X and
|
||||
ABS_MT_POSITION_Y, which allows for multiple fingers to be tracked. If the
|
||||
device supports it, the ABS_MT_WIDTH_MAJOR may be used to provide the size
|
||||
of the approaching finger. Anisotropy and direction may be specified with
|
||||
ABS_MT_TOUCH_MINOR, ABS_MT_WIDTH_MINOR and ABS_MT_ORIENTATION. The
|
||||
ABS_MT_TOOL_TYPE may be used to specify whether the touching tool is a
|
||||
finger or a pen or something else. Devices with more granular information
|
||||
may specify general shapes as blobs, i.e., as a sequence of rectangular
|
||||
shapes grouped together by an ABS_MT_BLOB_ID. Finally, for the few devices
|
||||
that currently support it, the ABS_MT_TRACKING_ID event may be used to
|
||||
report finger tracking from hardware [5].
|
||||
|
||||
Here is what a minimal event sequence for a two-finger touch would look
|
||||
like:
|
||||
|
||||
ABS_MT_TOUCH_MAJOR
|
||||
ABS_MT_POSITION_X
|
||||
ABS_MT_POSITION_Y
|
||||
SYN_MT_REPORT
|
||||
ABS_MT_TOUCH_MAJOR
|
||||
ABS_MT_POSITION_X
|
||||
ABS_MT_POSITION_Y
|
||||
SYN_MT_REPORT
|
||||
SYN_REPORT
|
||||
|
||||
|
||||
Event Semantics
|
||||
---------------
|
||||
|
||||
The word "contact" is used to describe a tool which is in direct contact
|
||||
with the surface. A finger, a pen or a rubber all classify as contacts.
|
||||
|
||||
ABS_MT_TOUCH_MAJOR
|
||||
|
||||
The length of the major axis of the contact. The length should be given in
|
||||
surface units. If the surface has an X times Y resolution, the largest
|
||||
possible value of ABS_MT_TOUCH_MAJOR is sqrt(X^2 + Y^2), the diagonal [4].
|
||||
|
||||
ABS_MT_TOUCH_MINOR
|
||||
|
||||
The length, in surface units, of the minor axis of the contact. If the
|
||||
contact is circular, this event can be omitted [4].
|
||||
|
||||
ABS_MT_WIDTH_MAJOR
|
||||
|
||||
The length, in surface units, of the major axis of the approaching
|
||||
tool. This should be understood as the size of the tool itself. The
|
||||
orientation of the contact and the approaching tool are assumed to be the
|
||||
same [4].
|
||||
|
||||
ABS_MT_WIDTH_MINOR
|
||||
|
||||
The length, in surface units, of the minor axis of the approaching
|
||||
tool. Omit if circular [4].
|
||||
|
||||
The above four values can be used to derive additional information about
|
||||
the contact. The ratio ABS_MT_TOUCH_MAJOR / ABS_MT_WIDTH_MAJOR approximates
|
||||
the notion of pressure. The fingers of the hand and the palm all have
|
||||
different characteristic widths [1].
|
||||
|
||||
ABS_MT_ORIENTATION
|
||||
|
||||
The orientation of the ellipse. The value should describe a signed quarter
|
||||
of a revolution clockwise around the touch center. The signed value range
|
||||
is arbitrary, but zero should be returned for a finger aligned along the Y
|
||||
axis of the surface, a negative value when finger is turned to the left, and
|
||||
a positive value when finger turned to the right. When completely aligned with
|
||||
the X axis, the range max should be returned. Orientation can be omitted
|
||||
if the touching object is circular, or if the information is not available
|
||||
in the kernel driver. Partial orientation support is possible if the device
|
||||
can distinguish between the two axis, but not (uniquely) any values in
|
||||
between. In such cases, the range of ABS_MT_ORIENTATION should be [0, 1]
|
||||
[4].
|
||||
|
||||
ABS_MT_POSITION_X
|
||||
|
||||
The surface X coordinate of the center of the touching ellipse.
|
||||
|
||||
ABS_MT_POSITION_Y
|
||||
|
||||
The surface Y coordinate of the center of the touching ellipse.
|
||||
|
||||
ABS_MT_TOOL_TYPE
|
||||
|
||||
The type of approaching tool. A lot of kernel drivers cannot distinguish
|
||||
between different tool types, such as a finger or a pen. In such cases, the
|
||||
event should be omitted. The protocol currently supports MT_TOOL_FINGER and
|
||||
MT_TOOL_PEN [2].
|
||||
|
||||
ABS_MT_BLOB_ID
|
||||
|
||||
The BLOB_ID groups several packets together into one arbitrarily shaped
|
||||
contact. This is a low-level anonymous grouping, and should not be confused
|
||||
with the high-level trackingID [5]. Most kernel drivers will not have blob
|
||||
capability, and can safely omit the event.
|
||||
|
||||
ABS_MT_TRACKING_ID
|
||||
|
||||
The TRACKING_ID identifies an initiated contact throughout its life cycle
|
||||
[5]. There are currently only a few devices that support it, so this event
|
||||
should normally be omitted.
|
||||
|
||||
|
||||
Event Computation
|
||||
-----------------
|
||||
|
||||
The flora of different hardware unavoidably leads to some devices fitting
|
||||
better to the MT protocol than others. To simplify and unify the mapping,
|
||||
this section gives recipes for how to compute certain events.
|
||||
|
||||
For devices reporting contacts as rectangular shapes, signed orientation
|
||||
cannot be obtained. Assuming X and Y are the lengths of the sides of the
|
||||
touching rectangle, here is a simple formula that retains the most
|
||||
information possible:
|
||||
|
||||
ABS_MT_TOUCH_MAJOR := max(X, Y)
|
||||
ABS_MT_TOUCH_MINOR := min(X, Y)
|
||||
ABS_MT_ORIENTATION := bool(X > Y)
|
||||
|
||||
The range of ABS_MT_ORIENTATION should be set to [0, 1], to indicate that
|
||||
the device can distinguish between a finger along the Y axis (0) and a
|
||||
finger along the X axis (1).
|
||||
|
||||
|
||||
Finger Tracking
|
||||
---------------
|
||||
|
||||
The kernel driver should generate an arbitrary enumeration of the set of
|
||||
anonymous contacts currently on the surface. The order in which the packets
|
||||
appear in the event stream is not important.
|
||||
|
||||
The process of finger tracking, i.e., to assign a unique trackingID to each
|
||||
initiated contact on the surface, is left to user space; preferably the
|
||||
multi-touch X driver [3]. In that driver, the trackingID stays the same and
|
||||
unique until the contact vanishes (when the finger leaves the surface). The
|
||||
problem of assigning a set of anonymous fingers to a set of identified
|
||||
fingers is a euclidian bipartite matching problem at each event update, and
|
||||
relies on a sufficiently rapid update rate.
|
||||
|
||||
There are a few devices that support trackingID in hardware. User space can
|
||||
make use of these native identifiers to reduce bandwidth and cpu usage.
|
||||
|
||||
|
||||
Notes
|
||||
-----
|
||||
|
||||
In order to stay compatible with existing applications, the data
|
||||
reported in a finger packet must not be recognized as single-touch
|
||||
events. In addition, all finger data must bypass input filtering,
|
||||
since subsequent events of the same type refer to different fingers.
|
||||
|
||||
The first kernel driver to utilize the MT protocol is the bcm5974 driver,
|
||||
where examples can be found.
|
||||
|
||||
[1] With the extension ABS_MT_APPROACH_X and ABS_MT_APPROACH_Y, the
|
||||
difference between the contact position and the approaching tool position
|
||||
could be used to derive tilt.
|
||||
[2] The list can of course be extended.
|
||||
[3] The multi-touch X driver is currently in the prototyping stage. At the
|
||||
time of writing (April 2009), the MT protocol is not yet merged, and the
|
||||
prototype implements finger matching, basic mouse support and two-finger
|
||||
scrolling. The project aims at improving the quality of current multi-touch
|
||||
functionality available in the Synaptics X driver, and in addition
|
||||
implement more advanced gestures.
|
||||
[4] See the section on event computation.
|
||||
[5] See the section on finger tracking.
|
|
@ -2,8 +2,14 @@
|
|||
- this file (info on ISDN implementation for Linux)
|
||||
CREDITS
|
||||
- list of the kind folks that brought you this stuff.
|
||||
HiSax.cert
|
||||
- information about the ITU approval certification of the HiSax driver.
|
||||
INTERFACE
|
||||
- description of Linklevel and Hardwarelevel ISDN interface.
|
||||
- description of isdn4linux Link Level and Hardware Level interfaces.
|
||||
INTERFACE.fax
|
||||
- description of the fax subinterface of isdn4linux.
|
||||
INTERFACE.CAPI
|
||||
- description of kernel CAPI Link Level to Hardware Level interface.
|
||||
README
|
||||
- general info on what you need and what to do for Linux ISDN.
|
||||
README.FAQ
|
||||
|
@ -12,6 +18,8 @@ README.audio
|
|||
- info for running audio over ISDN.
|
||||
README.fax
|
||||
- info for using Fax over ISDN.
|
||||
README.gigaset
|
||||
- info on the drivers for Siemens Gigaset ISDN adapters.
|
||||
README.icn
|
||||
- info on the ICN-ISDN-card and its driver.
|
||||
README.HiSax
|
||||
|
@ -37,7 +45,8 @@ README.diversion
|
|||
README.sc
|
||||
- info on driver for Spellcaster cards.
|
||||
README.x25
|
||||
_ info for running X.25 over ISDN.
|
||||
- info for running X.25 over ISDN.
|
||||
README.hysdn
|
||||
- info on driver for Hypercope active HYSDN cards
|
||||
|
||||
- info on driver for Hypercope active HYSDN cards
|
||||
README.mISDN
|
||||
- info on the Modular ISDN subsystem (mISDN).
|
||||
|
|
213
Documentation/isdn/INTERFACE.CAPI
Normal file
213
Documentation/isdn/INTERFACE.CAPI
Normal file
|
@ -0,0 +1,213 @@
|
|||
Kernel CAPI Interface to Hardware Drivers
|
||||
-----------------------------------------
|
||||
|
||||
1. Overview
|
||||
|
||||
From the CAPI 2.0 specification:
|
||||
COMMON-ISDN-API (CAPI) is an application programming interface standard used
|
||||
to access ISDN equipment connected to basic rate interfaces (BRI) and primary
|
||||
rate interfaces (PRI).
|
||||
|
||||
Kernel CAPI operates as a dispatching layer between CAPI applications and CAPI
|
||||
hardware drivers. Hardware drivers register ISDN devices (controllers, in CAPI
|
||||
lingo) with Kernel CAPI to indicate their readiness to provide their service
|
||||
to CAPI applications. CAPI applications also register with Kernel CAPI,
|
||||
requesting association with a CAPI device. Kernel CAPI then dispatches the
|
||||
application registration to an available device, forwarding it to the
|
||||
corresponding hardware driver. Kernel CAPI then forwards CAPI messages in both
|
||||
directions between the application and the hardware driver.
|
||||
|
||||
Format and semantics of CAPI messages are specified in the CAPI 2.0 standard.
|
||||
This standard is freely available from http://www.capi.org.
|
||||
|
||||
|
||||
2. Driver and Device Registration
|
||||
|
||||
CAPI drivers optionally register themselves with Kernel CAPI by calling the
|
||||
Kernel CAPI function register_capi_driver() with a pointer to a struct
|
||||
capi_driver. This structure must be filled with the name and revision of the
|
||||
driver, and optionally a pointer to a callback function, add_card(). The
|
||||
registration can be revoked by calling the function unregister_capi_driver()
|
||||
with a pointer to the same struct capi_driver.
|
||||
|
||||
CAPI drivers must register each of the ISDN devices they control with Kernel
|
||||
CAPI by calling the Kernel CAPI function attach_capi_ctr() with a pointer to a
|
||||
struct capi_ctr before they can be used. This structure must be filled with
|
||||
the names of the driver and controller, and a number of callback function
|
||||
pointers which are subsequently used by Kernel CAPI for communicating with the
|
||||
driver. The registration can be revoked by calling the function
|
||||
detach_capi_ctr() with a pointer to the same struct capi_ctr.
|
||||
|
||||
Before the device can be actually used, the driver must fill in the device
|
||||
information fields 'manu', 'version', 'profile' and 'serial' in the capi_ctr
|
||||
structure of the device, and signal its readiness by calling capi_ctr_ready().
|
||||
From then on, Kernel CAPI may call the registered callback functions for the
|
||||
device.
|
||||
|
||||
If the device becomes unusable for any reason (shutdown, disconnect ...), the
|
||||
driver has to call capi_ctr_reseted(). This will prevent further calls to the
|
||||
callback functions by Kernel CAPI.
|
||||
|
||||
|
||||
3. Application Registration and Communication
|
||||
|
||||
Kernel CAPI forwards registration requests from applications (calls to CAPI
|
||||
operation CAPI_REGISTER) to an appropriate hardware driver by calling its
|
||||
register_appl() callback function. A unique Application ID (ApplID, u16) is
|
||||
allocated by Kernel CAPI and passed to register_appl() along with the
|
||||
parameter structure provided by the application. This is analogous to the
|
||||
open() operation on regular files or character devices.
|
||||
|
||||
After a successful return from register_appl(), CAPI messages from the
|
||||
application may be passed to the driver for the device via calls to the
|
||||
send_message() callback function. The CAPI message to send is stored in the
|
||||
data portion of an skb. Conversely, the driver may call Kernel CAPI's
|
||||
capi_ctr_handle_message() function to pass a received CAPI message to Kernel
|
||||
CAPI for forwarding to an application, specifying its ApplID.
|
||||
|
||||
Deregistration requests (CAPI operation CAPI_RELEASE) from applications are
|
||||
forwarded as calls to the release_appl() callback function, passing the same
|
||||
ApplID as with register_appl(). After return from release_appl(), no CAPI
|
||||
messages for that application may be passed to or from the device anymore.
|
||||
|
||||
|
||||
4. Data Structures
|
||||
|
||||
4.1 struct capi_driver
|
||||
|
||||
This structure describes a Kernel CAPI driver itself. It is used in the
|
||||
register_capi_driver() and unregister_capi_driver() functions, and contains
|
||||
the following non-private fields, all to be set by the driver before calling
|
||||
register_capi_driver():
|
||||
|
||||
char name[32]
|
||||
the name of the driver, as a zero-terminated ASCII string
|
||||
char revision[32]
|
||||
the revision number of the driver, as a zero-terminated ASCII string
|
||||
int (*add_card)(struct capi_driver *driver, capicardparams *data)
|
||||
a callback function pointer (may be NULL)
|
||||
|
||||
|
||||
4.2 struct capi_ctr
|
||||
|
||||
This structure describes an ISDN device (controller) handled by a Kernel CAPI
|
||||
driver. After registration via the attach_capi_ctr() function it is passed to
|
||||
all controller specific lower layer interface and callback functions to
|
||||
identify the controller to operate on.
|
||||
|
||||
It contains the following non-private fields:
|
||||
|
||||
- to be set by the driver before calling attach_capi_ctr():
|
||||
|
||||
struct module *owner
|
||||
pointer to the driver module owning the device
|
||||
|
||||
void *driverdata
|
||||
an opaque pointer to driver specific data, not touched by Kernel CAPI
|
||||
|
||||
char name[32]
|
||||
the name of the controller, as a zero-terminated ASCII string
|
||||
|
||||
char *driver_name
|
||||
the name of the driver, as a zero-terminated ASCII string
|
||||
|
||||
int (*load_firmware)(struct capi_ctr *ctrlr, capiloaddata *ldata)
|
||||
(optional) pointer to a callback function for sending firmware and
|
||||
configuration data to the device
|
||||
|
||||
void (*reset_ctr)(struct capi_ctr *ctrlr)
|
||||
pointer to a callback function for performing a reset on the device,
|
||||
releasing all registered applications
|
||||
|
||||
void (*register_appl)(struct capi_ctr *ctrlr, u16 applid,
|
||||
capi_register_params *rparam)
|
||||
void (*release_appl)(struct capi_ctr *ctrlr, u16 applid)
|
||||
pointers to callback functions for registration and deregistration of
|
||||
applications with the device
|
||||
|
||||
u16 (*send_message)(struct capi_ctr *ctrlr, struct sk_buff *skb)
|
||||
pointer to a callback function for sending a CAPI message to the
|
||||
device
|
||||
|
||||
char *(*procinfo)(struct capi_ctr *ctrlr)
|
||||
pointer to a callback function returning the entry for the device in
|
||||
the CAPI controller info table, /proc/capi/controller
|
||||
|
||||
read_proc_t *ctr_read_proc
|
||||
pointer to the read_proc callback function for the device's proc file
|
||||
system entry, /proc/capi/controllers/<n>; will be called with a
|
||||
pointer to the device's capi_ctr structure as the last (data) argument
|
||||
|
||||
- to be filled in before calling capi_ctr_ready():
|
||||
|
||||
u8 manu[CAPI_MANUFACTURER_LEN]
|
||||
value to return for CAPI_GET_MANUFACTURER
|
||||
|
||||
capi_version version
|
||||
value to return for CAPI_GET_VERSION
|
||||
|
||||
capi_profile profile
|
||||
value to return for CAPI_GET_PROFILE
|
||||
|
||||
u8 serial[CAPI_SERIAL_LEN]
|
||||
value to return for CAPI_GET_SERIAL
|
||||
|
||||
|
||||
5. Lower Layer Interface Functions
|
||||
|
||||
(declared in <linux/isdn/capilli.h>)
|
||||
|
||||
void register_capi_driver(struct capi_driver *drvr)
|
||||
void unregister_capi_driver(struct capi_driver *drvr)
|
||||
register/unregister a driver with Kernel CAPI
|
||||
|
||||
int attach_capi_ctr(struct capi_ctr *ctrlr)
|
||||
int detach_capi_ctr(struct capi_ctr *ctrlr)
|
||||
register/unregister a device (controller) with Kernel CAPI
|
||||
|
||||
void capi_ctr_ready(struct capi_ctr *ctrlr)
|
||||
void capi_ctr_reseted(struct capi_ctr *ctrlr)
|
||||
signal controller ready/not ready
|
||||
|
||||
void capi_ctr_suspend_output(struct capi_ctr *ctrlr)
|
||||
void capi_ctr_resume_output(struct capi_ctr *ctrlr)
|
||||
signal suspend/resume
|
||||
|
||||
void capi_ctr_handle_message(struct capi_ctr * ctrlr, u16 applid,
|
||||
struct sk_buff *skb)
|
||||
pass a received CAPI message to Kernel CAPI
|
||||
for forwarding to the specified application
|
||||
|
||||
|
||||
6. Helper Functions and Macros
|
||||
|
||||
Library functions (from <linux/isdn/capilli.h>):
|
||||
|
||||
void capilib_new_ncci(struct list_head *head, u16 applid,
|
||||
u32 ncci, u32 winsize)
|
||||
void capilib_free_ncci(struct list_head *head, u16 applid, u32 ncci)
|
||||
void capilib_release_appl(struct list_head *head, u16 applid)
|
||||
void capilib_release(struct list_head *head)
|
||||
void capilib_data_b3_conf(struct list_head *head, u16 applid,
|
||||
u32 ncci, u16 msgid)
|
||||
u16 capilib_data_b3_req(struct list_head *head, u16 applid,
|
||||
u32 ncci, u16 msgid)
|
||||
|
||||
|
||||
Macros to extract/set element values from/in a CAPI message header
|
||||
(from <linux/isdn/capiutil.h>):
|
||||
|
||||
Get Macro Set Macro Element (Type)
|
||||
|
||||
CAPIMSG_LEN(m) CAPIMSG_SETLEN(m, len) Total Length (u16)
|
||||
CAPIMSG_APPID(m) CAPIMSG_SETAPPID(m, applid) ApplID (u16)
|
||||
CAPIMSG_COMMAND(m) CAPIMSG_SETCOMMAND(m,cmd) Command (u8)
|
||||
CAPIMSG_SUBCOMMAND(m) CAPIMSG_SETSUBCOMMAND(m, cmd) Subcommand (u8)
|
||||
CAPIMSG_CMD(m) - Command*256
|
||||
+ Subcommand (u16)
|
||||
CAPIMSG_MSGID(m) CAPIMSG_SETMSGID(m, msgid) Message Number (u16)
|
||||
|
||||
CAPIMSG_CONTROL(m) CAPIMSG_SETCONTROL(m, contr) Controller/PLCI/NCCI
|
||||
(u32)
|
||||
CAPIMSG_DATALEN(m) CAPIMSG_SETDATALEN(m, len) Data Length (u16)
|
||||
|
|
@ -269,7 +269,10 @@ Use the argument mechanism to document members or constants.
|
|||
|
||||
Inside a struct description, you can use the "private:" and "public:"
|
||||
comment tags. Structure fields that are inside a "private:" area
|
||||
are not listed in the generated output documentation.
|
||||
are not listed in the generated output documentation. The "private:"
|
||||
and "public:" tags must begin immediately following a "/*" comment
|
||||
marker. They may optionally include comments between the ":" and the
|
||||
ending "*/" marker.
|
||||
|
||||
Example:
|
||||
|
||||
|
@ -283,7 +286,7 @@ Example:
|
|||
struct my_struct {
|
||||
int a;
|
||||
int b;
|
||||
/* private: */
|
||||
/* private: internal use only */
|
||||
int c;
|
||||
};
|
||||
|
||||
|
|
|
@ -17,6 +17,12 @@ are specified on the kernel command line with the module name plus
|
|||
|
||||
usbcore.blinkenlights=1
|
||||
|
||||
Hyphens (dashes) and underscores are equivalent in parameter names, so
|
||||
log_buf_len=1M print-fatal-signals=1
|
||||
can also be entered as
|
||||
log-buf-len=1M print_fatal_signals=1
|
||||
|
||||
|
||||
This document may not be entirely up to date and comprehensive. The command
|
||||
"modinfo -p ${modulename}" shows a current list of all parameters of a loadable
|
||||
module. Loadable modules, after being loaded into the running kernel, also
|
||||
|
@ -345,7 +351,7 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
not play well with APC CPU idle - disable it if you have
|
||||
APC and your system crashes randomly.
|
||||
|
||||
apic= [APIC,i386] Advanced Programmable Interrupt Controller
|
||||
apic= [APIC,X86-32] Advanced Programmable Interrupt Controller
|
||||
Change the output verbosity whilst booting
|
||||
Format: { quiet (default) | verbose | debug }
|
||||
Change the amount of debugging information output
|
||||
|
@ -702,7 +708,7 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
to discrete, to make X server driver able to add WB
|
||||
entry later. This parameter enables that.
|
||||
|
||||
enable_timer_pin_1 [i386,x86-64]
|
||||
enable_timer_pin_1 [X86]
|
||||
Enable PIN 1 of APIC timer
|
||||
Can be useful to work around chipset bugs
|
||||
(in particular on some ATI chipsets).
|
||||
|
@ -775,7 +781,7 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
|
||||
hashdist= [KNL,NUMA] Large hashes allocated during boot
|
||||
are distributed across NUMA nodes. Defaults on
|
||||
for IA-64, off otherwise.
|
||||
for 64bit NUMA, off otherwise.
|
||||
Format: 0 | 1 (for off | on)
|
||||
|
||||
hcl= [IA-64] SGI's Hardware Graph compatibility layer
|
||||
|
@ -1529,6 +1535,10 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
register save and restore. The kernel will only save
|
||||
legacy floating-point registers on task switch.
|
||||
|
||||
noxsave [BUGS=X86] Disables x86 extended register state save
|
||||
and restore using xsave. The kernel will fallback to
|
||||
enabling legacy floating-point and sse state.
|
||||
|
||||
nohlt [BUGS=ARM,SH] Tells the kernel that the sleep(SH) or
|
||||
wfi(ARM) instruction doesn't work correctly and not to
|
||||
use it. This is also useful when using JTAG debugger.
|
||||
|
@ -1620,6 +1630,8 @@ and is between 256 and 4096 characters. It is defined in the file
|
|||
|
||||
nowb [ARM]
|
||||
|
||||
nox2apic [X86-64,APIC] Do not enable x2APIC mode.
|
||||
|
||||
nptcg= [IA64] Override max number of concurrent global TLB
|
||||
purges which is reported from either PAL_VM_SUMMARY or
|
||||
SAL PALO.
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
ThinkPad ACPI Extras Driver
|
||||
|
||||
Version 0.22
|
||||
November 23rd, 2008
|
||||
Version 0.23
|
||||
April 10th, 2009
|
||||
|
||||
Borislav Deianov <borislav@users.sf.net>
|
||||
Henrique de Moraes Holschuh <hmh@hmh.eng.br>
|
||||
|
|
|
@ -54,9 +54,9 @@ locking error messages, inside curlies. A contrived example:
|
|||
The bit position indicates STATE, STATE-read, for each of the states listed
|
||||
above, and the character displayed in each indicates:
|
||||
|
||||
'.' acquired while irqs disabled
|
||||
'+' acquired in irq context
|
||||
'-' acquired with irqs enabled
|
||||
'.' acquired while irqs disabled and not in irq context
|
||||
'-' acquired in irq context
|
||||
'+' acquired with irqs enabled
|
||||
'?' acquired in irq context with irqs enabled.
|
||||
|
||||
Unused mutexes cannot be part of the cause of an error.
|
||||
|
|
BIN
Documentation/logo.gif
Normal file
BIN
Documentation/logo.gif
Normal file
Binary file not shown.
After Width: | Height: | Size: 16 KiB |
File diff suppressed because one or more lines are too long
Before Width: | Height: | Size: 303 KiB |
|
@ -1,4 +1,13 @@
|
|||
Tux is taking a three month sabbatical to work as a barber, so Tuz is
|
||||
standing in. He's taken pains to ensure you'll hardly notice.
|
||||
This is the full-colour version of the currently unofficial Linux logo
|
||||
("currently unofficial" just means that there has been no paperwork and
|
||||
that I have not really announced it yet). It was created by Larry Ewing,
|
||||
and is freely usable as long as you acknowledge Larry as the original
|
||||
artist.
|
||||
|
||||
Note that there are black-and-white versions of this available that
|
||||
scale down to smaller sizes and are better for letterheads or whatever
|
||||
you want to use it for: for the full range of logos take a look at
|
||||
Larry's web-page:
|
||||
|
||||
http://www.isc.tamu.edu/~lewing/linux/
|
||||
|
||||
Image by Andrew McGown and Josh Bush. Image is licensed CC BY-SA.
|
||||
|
|
|
@ -1266,13 +1266,22 @@ sctp_rmem - vector of 3 INTEGERs: min, default, max
|
|||
sctp_wmem - vector of 3 INTEGERs: min, default, max
|
||||
See tcp_wmem for a description.
|
||||
|
||||
UNDOCUMENTED:
|
||||
|
||||
/proc/sys/net/core/*
|
||||
dev_weight FIXME
|
||||
dev_weight - INTEGER
|
||||
The maximum number of packets that kernel can handle on a NAPI
|
||||
interrupt, it's a Per-CPU variable.
|
||||
|
||||
Default: 64
|
||||
|
||||
/proc/sys/net/unix/*
|
||||
max_dgram_qlen FIXME
|
||||
max_dgram_qlen - INTEGER
|
||||
The maximum length of dgram socket receive queue
|
||||
|
||||
Default: 10
|
||||
|
||||
|
||||
UNDOCUMENTED:
|
||||
|
||||
/proc/sys/net/irda/*
|
||||
fast_poll_increase FIXME
|
||||
|
|
|
@ -43,12 +43,11 @@ Table of Contents
|
|||
2) Representing devices without a current OF specification
|
||||
a) PHY nodes
|
||||
b) Interrupt controllers
|
||||
c) CFI or JEDEC memory-mapped NOR flash
|
||||
d) 4xx/Axon EMAC ethernet nodes
|
||||
e) Xilinx IP cores
|
||||
f) USB EHCI controllers
|
||||
g) MDIO on GPIOs
|
||||
h) SPI busses
|
||||
c) 4xx/Axon EMAC ethernet nodes
|
||||
d) Xilinx IP cores
|
||||
e) USB EHCI controllers
|
||||
f) MDIO on GPIOs
|
||||
g) SPI busses
|
||||
|
||||
VII - Marvell Discovery mv64[345]6x System Controller chips
|
||||
1) The /system-controller node
|
||||
|
@ -999,7 +998,7 @@ compatibility.
|
|||
translation of SOC addresses for memory mapped SOC registers.
|
||||
- bus-frequency: Contains the bus frequency for the SOC node.
|
||||
Typically, the value of this field is filled in by the boot
|
||||
loader.
|
||||
loader.
|
||||
|
||||
|
||||
Recommended properties:
|
||||
|
@ -1287,71 +1286,7 @@ platforms are moved over to use the flattened-device-tree model.
|
|||
device_type = "open-pic";
|
||||
};
|
||||
|
||||
c) CFI or JEDEC memory-mapped NOR flash
|
||||
|
||||
Flash chips (Memory Technology Devices) are often used for solid state
|
||||
file systems on embedded devices.
|
||||
|
||||
- compatible : should contain the specific model of flash chip(s)
|
||||
used, if known, followed by either "cfi-flash" or "jedec-flash"
|
||||
- reg : Address range of the flash chip
|
||||
- bank-width : Width (in bytes) of the flash bank. Equal to the
|
||||
device width times the number of interleaved chips.
|
||||
- device-width : (optional) Width of a single flash chip. If
|
||||
omitted, assumed to be equal to 'bank-width'.
|
||||
- #address-cells, #size-cells : Must be present if the flash has
|
||||
sub-nodes representing partitions (see below). In this case
|
||||
both #address-cells and #size-cells must be equal to 1.
|
||||
|
||||
For JEDEC compatible devices, the following additional properties
|
||||
are defined:
|
||||
|
||||
- vendor-id : Contains the flash chip's vendor id (1 byte).
|
||||
- device-id : Contains the flash chip's device id (1 byte).
|
||||
|
||||
In addition to the information on the flash bank itself, the
|
||||
device tree may optionally contain additional information
|
||||
describing partitions of the flash address space. This can be
|
||||
used on platforms which have strong conventions about which
|
||||
portions of the flash are used for what purposes, but which don't
|
||||
use an on-flash partition table such as RedBoot.
|
||||
|
||||
Each partition is represented as a sub-node of the flash device.
|
||||
Each node's name represents the name of the corresponding
|
||||
partition of the flash device.
|
||||
|
||||
Flash partitions
|
||||
- reg : The partition's offset and size within the flash bank.
|
||||
- label : (optional) The label / name for this flash partition.
|
||||
If omitted, the label is taken from the node name (excluding
|
||||
the unit address).
|
||||
- read-only : (optional) This parameter, if present, is a hint to
|
||||
Linux that this flash partition should only be mounted
|
||||
read-only. This is usually used for flash partitions
|
||||
containing early-boot firmware images or data which should not
|
||||
be clobbered.
|
||||
|
||||
Example:
|
||||
|
||||
flash@ff000000 {
|
||||
compatible = "amd,am29lv128ml", "cfi-flash";
|
||||
reg = <ff000000 01000000>;
|
||||
bank-width = <4>;
|
||||
device-width = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
fs@0 {
|
||||
label = "fs";
|
||||
reg = <0 f80000>;
|
||||
};
|
||||
firmware@f80000 {
|
||||
label ="firmware";
|
||||
reg = <f80000 80000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
d) 4xx/Axon EMAC ethernet nodes
|
||||
c) 4xx/Axon EMAC ethernet nodes
|
||||
|
||||
The EMAC ethernet controller in IBM and AMCC 4xx chips, and also
|
||||
the Axon bridge. To operate this needs to interact with a ths
|
||||
|
@ -1499,7 +1434,7 @@ platforms are moved over to use the flattened-device-tree model.
|
|||
available.
|
||||
For Axon: 0x0000012a
|
||||
|
||||
e) Xilinx IP cores
|
||||
d) Xilinx IP cores
|
||||
|
||||
The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
|
||||
in Xilinx Spartan and Virtex FPGAs. The devices cover the whole range
|
||||
|
@ -1761,7 +1696,7 @@ platforms are moved over to use the flattened-device-tree model.
|
|||
listed above, nodes for these devices should include a phy-handle
|
||||
property, and may include other common network device properties
|
||||
like local-mac-address.
|
||||
|
||||
|
||||
iv) Xilinx Uartlite
|
||||
|
||||
Xilinx uartlite devices are simple fixed speed serial ports.
|
||||
|
@ -1793,7 +1728,7 @@ platforms are moved over to use the flattened-device-tree model.
|
|||
- reg-offset : A value of 3 is required
|
||||
- reg-shift : A value of 2 is required
|
||||
|
||||
f) USB EHCI controllers
|
||||
e) USB EHCI controllers
|
||||
|
||||
Required properties:
|
||||
- compatible : should be "usb-ehci".
|
||||
|
@ -1819,7 +1754,7 @@ platforms are moved over to use the flattened-device-tree model.
|
|||
big-endian;
|
||||
};
|
||||
|
||||
g) MDIO on GPIOs
|
||||
f) MDIO on GPIOs
|
||||
|
||||
Currently defined compatibles:
|
||||
- virtual,gpio-mdio
|
||||
|
@ -1839,7 +1774,7 @@ platforms are moved over to use the flattened-device-tree model.
|
|||
&qe_pio_c 6>;
|
||||
};
|
||||
|
||||
h) SPI (Serial Peripheral Interface) busses
|
||||
g) SPI (Serial Peripheral Interface) busses
|
||||
|
||||
SPI busses can be described with a node for the SPI master device
|
||||
and a set of child nodes for each SPI slave on the bus. For this
|
||||
|
|
80
Documentation/powerpc/dts-bindings/mtd-physmap.txt
Normal file
80
Documentation/powerpc/dts-bindings/mtd-physmap.txt
Normal file
|
@ -0,0 +1,80 @@
|
|||
CFI or JEDEC memory-mapped NOR flash
|
||||
|
||||
Flash chips (Memory Technology Devices) are often used for solid state
|
||||
file systems on embedded devices.
|
||||
|
||||
- compatible : should contain the specific model of flash chip(s)
|
||||
used, if known, followed by either "cfi-flash" or "jedec-flash"
|
||||
- reg : Address range(s) of the flash chip(s)
|
||||
It's possible to (optionally) define multiple "reg" tuples so that
|
||||
non-identical NOR chips can be described in one flash node.
|
||||
- bank-width : Width (in bytes) of the flash bank. Equal to the
|
||||
device width times the number of interleaved chips.
|
||||
- device-width : (optional) Width of a single flash chip. If
|
||||
omitted, assumed to be equal to 'bank-width'.
|
||||
- #address-cells, #size-cells : Must be present if the flash has
|
||||
sub-nodes representing partitions (see below). In this case
|
||||
both #address-cells and #size-cells must be equal to 1.
|
||||
|
||||
For JEDEC compatible devices, the following additional properties
|
||||
are defined:
|
||||
|
||||
- vendor-id : Contains the flash chip's vendor id (1 byte).
|
||||
- device-id : Contains the flash chip's device id (1 byte).
|
||||
|
||||
In addition to the information on the flash bank itself, the
|
||||
device tree may optionally contain additional information
|
||||
describing partitions of the flash address space. This can be
|
||||
used on platforms which have strong conventions about which
|
||||
portions of the flash are used for what purposes, but which don't
|
||||
use an on-flash partition table such as RedBoot.
|
||||
|
||||
Each partition is represented as a sub-node of the flash device.
|
||||
Each node's name represents the name of the corresponding
|
||||
partition of the flash device.
|
||||
|
||||
Flash partitions
|
||||
- reg : The partition's offset and size within the flash bank.
|
||||
- label : (optional) The label / name for this flash partition.
|
||||
If omitted, the label is taken from the node name (excluding
|
||||
the unit address).
|
||||
- read-only : (optional) This parameter, if present, is a hint to
|
||||
Linux that this flash partition should only be mounted
|
||||
read-only. This is usually used for flash partitions
|
||||
containing early-boot firmware images or data which should not
|
||||
be clobbered.
|
||||
|
||||
Example:
|
||||
|
||||
flash@ff000000 {
|
||||
compatible = "amd,am29lv128ml", "cfi-flash";
|
||||
reg = <ff000000 01000000>;
|
||||
bank-width = <4>;
|
||||
device-width = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
fs@0 {
|
||||
label = "fs";
|
||||
reg = <0 f80000>;
|
||||
};
|
||||
firmware@f80000 {
|
||||
label ="firmware";
|
||||
reg = <f80000 80000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
|
||||
Here an example with multiple "reg" tuples:
|
||||
|
||||
flash@f0000000,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
compatible = "intel,PC48F4400P0VB", "cfi-flash";
|
||||
reg = <0 0x00000000 0x02000000
|
||||
0 0x02000000 0x02000000>;
|
||||
bank-width = <2>;
|
||||
partition@0 {
|
||||
label = "test-part1";
|
||||
reg = <0 0x04000000>;
|
||||
};
|
||||
};
|
|
@ -334,6 +334,7 @@ STAC9227/9228/9229/927x
|
|||
ref-no-jd Reference board without HP/Mic jack detection
|
||||
3stack D965 3stack
|
||||
5stack D965 5stack + SPDIF
|
||||
5stack-no-fp D965 5stack without front panel
|
||||
dell-3stack Dell Dimension E520
|
||||
dell-bios Fixes with Dell BIOS setup
|
||||
auto BIOS setup (default)
|
||||
|
|
|
@ -104,6 +104,11 @@ card*/pcm*/xrun_debug
|
|||
When this value is greater than 1, the driver will show the
|
||||
stack trace additionally. This may help the debugging.
|
||||
|
||||
Since 2.6.30, this option also enables the hwptr check using
|
||||
jiffies. This detects spontaneous invalid pointer callback
|
||||
values, but can be lead to too much corrections for a (mostly
|
||||
buggy) hardware that doesn't give smooth pointer updates.
|
||||
|
||||
card*/pcm*/sub*/info
|
||||
The general information of this PCM sub-stream.
|
||||
|
||||
|
|
|
@ -39,8 +39,6 @@ Currently, these files are in /proc/sys/vm:
|
|||
- nr_hugepages
|
||||
- nr_overcommit_hugepages
|
||||
- nr_pdflush_threads
|
||||
- nr_pdflush_threads_min
|
||||
- nr_pdflush_threads_max
|
||||
- nr_trim_pages (only if CONFIG_MMU=n)
|
||||
- numa_zonelist_order
|
||||
- oom_dump_tasks
|
||||
|
@ -90,6 +88,10 @@ will itself start writeback.
|
|||
If dirty_bytes is written, dirty_ratio becomes a function of its value
|
||||
(dirty_bytes / the amount of dirtyable system memory).
|
||||
|
||||
Note: the minimum value allowed for dirty_bytes is two pages (in bytes); any
|
||||
value lower than this limit will be ignored and the old configuration will be
|
||||
retained.
|
||||
|
||||
==============================================================
|
||||
|
||||
dirty_expire_centisecs
|
||||
|
@ -465,32 +467,6 @@ The default value is 0.
|
|||
|
||||
==============================================================
|
||||
|
||||
nr_pdflush_threads_min
|
||||
|
||||
This value controls the minimum number of pdflush threads.
|
||||
|
||||
At boot time, the kernel will create and maintain 'nr_pdflush_threads_min'
|
||||
threads for the kernel's lifetime.
|
||||
|
||||
The default value is 2. The minimum value you can specify is 1, and
|
||||
the maximum value is the current setting of 'nr_pdflush_threads_max'.
|
||||
|
||||
See 'nr_pdflush_threads_max' below for more information.
|
||||
|
||||
==============================================================
|
||||
|
||||
nr_pdflush_threads_max
|
||||
|
||||
This value controls the maximum number of pdflush threads that can be
|
||||
created. The pdflush algorithm will create a new pdflush thread (up to
|
||||
this maximum) if no pdflush threads have been available for >= 1 second.
|
||||
|
||||
The default value is 8. The minimum value you can specify is the
|
||||
current value of 'nr_pdflush_threads_min' and the
|
||||
maximum is 1000.
|
||||
|
||||
==============================================================
|
||||
|
||||
overcommit_memory:
|
||||
|
||||
This value contains a flag that enables memory overcommitment.
|
||||
|
|
|
@ -113,7 +113,7 @@ versions of the sysfs interface.
|
|||
"devices" directory at /sys/subsystem/<name>/devices.
|
||||
|
||||
If /sys/subsystem exists, /sys/bus, /sys/class and /sys/block can be
|
||||
ignored. If it does not exist, you have always to scan all three
|
||||
ignored. If it does not exist, you always have to scan all three
|
||||
places, as the kernel is free to move a subsystem from one place to
|
||||
the other, as long as the devices are still reachable by the same
|
||||
subsystem name.
|
||||
|
|
92
MAINTAINERS
92
MAINTAINERS
|
@ -434,7 +434,7 @@ F: arch/alpha/
|
|||
|
||||
AMD GEODE CS5536 USB DEVICE CONTROLLER DRIVER
|
||||
P: Thomas Dahlmann
|
||||
M: thomas.dahlmann@amd.com
|
||||
M: dahlmann.thomas@arcor.de
|
||||
L: linux-geode@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Supported
|
||||
F: drivers/usb/gadget/amd5536udc.*
|
||||
|
@ -624,6 +624,7 @@ M: paulius.zaleckas@teltonika.lt
|
|||
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
|
||||
T: git git://gitorious.org/linux-gemini/mainline.git
|
||||
S: Maintained
|
||||
F: arch/arm/mach-gemini/
|
||||
|
||||
ARM/EBSA110 MACHINE SUPPORT
|
||||
P: Russell King
|
||||
|
@ -650,6 +651,7 @@ P: Paulius Zaleckas
|
|||
M: paulius.zaleckas@teltonika.lt
|
||||
L: linux-arm-kernel@lists.arm.linux.org.uk (subscribers-only)
|
||||
S: Maintained
|
||||
F: arch/arm/mm/*-fa*
|
||||
|
||||
ARM/FOOTBRIDGE ARCHITECTURE
|
||||
P: Russell King
|
||||
|
@ -1132,17 +1134,17 @@ F: fs/bfs/
|
|||
F: include/linux/bfs_fs.h
|
||||
|
||||
BLACKFIN ARCHITECTURE
|
||||
P: Bryan Wu
|
||||
M: cooloney@kernel.org
|
||||
P: Mike Frysinger
|
||||
M: vapier@gentoo.org
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org
|
||||
W: http://blackfin.uclinux.org
|
||||
S: Supported
|
||||
F: arch/blackfin/
|
||||
|
||||
BLACKFIN EMAC DRIVER
|
||||
P: Bryan Wu
|
||||
M: cooloney@kernel.org
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
||||
P: Michael Hennerich
|
||||
M: michael.hennerich@analog.com
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org
|
||||
W: http://blackfin.uclinux.org
|
||||
S: Supported
|
||||
F: drivers/net/bfin_mac.*
|
||||
|
@ -1150,7 +1152,7 @@ F: drivers/net/bfin_mac.*
|
|||
BLACKFIN RTC DRIVER
|
||||
P: Mike Frysinger
|
||||
M: vapier.adi@gmail.com
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org
|
||||
W: http://blackfin.uclinux.org
|
||||
S: Supported
|
||||
F: drivers/rtc/rtc-bfin.c
|
||||
|
@ -1158,7 +1160,7 @@ F: drivers/rtc/rtc-bfin.c
|
|||
BLACKFIN SERIAL DRIVER
|
||||
P: Sonic Zhang
|
||||
M: sonic.zhang@analog.com
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org
|
||||
W: http://blackfin.uclinux.org
|
||||
S: Supported
|
||||
F: drivers/serial/bfin_5xx.c
|
||||
|
@ -1166,7 +1168,7 @@ F: drivers/serial/bfin_5xx.c
|
|||
BLACKFIN WATCHDOG DRIVER
|
||||
P: Mike Frysinger
|
||||
M: vapier.adi@gmail.com
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org
|
||||
W: http://blackfin.uclinux.org
|
||||
S: Supported
|
||||
F: drivers/watchdog/bfin_wdt.c
|
||||
|
@ -1174,7 +1176,7 @@ F: drivers/watchdog/bfin_wdt.c
|
|||
BLACKFIN I2C TWI DRIVER
|
||||
P: Sonic Zhang
|
||||
M: sonic.zhang@analog.com
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org (subscribers-only)
|
||||
L: uclinux-dist-devel@blackfin.uclinux.org
|
||||
W: http://blackfin.uclinux.org/
|
||||
S: Supported
|
||||
F: drivers/i2c/busses/i2c-bfin-twi.c
|
||||
|
@ -1337,12 +1339,9 @@ L: cbe-oss-dev@ozlabs.org
|
|||
W: http://www.ibm.com/developerworks/power/cell/
|
||||
S: Supported
|
||||
F: arch/powerpc/include/asm/cell*.h
|
||||
F: arch/powerpc/include/asm/lv1call.h
|
||||
F: arch/powerpc/include/asm/ps3*.h
|
||||
F: arch/powerpc/include/asm/spu*.h
|
||||
F: arch/powerpc/oprofile/*cell*
|
||||
F: arch/powerpc/platforms/cell/
|
||||
F: arch/powerpc/platforms/ps3/
|
||||
|
||||
CERTIFIED WIRELESS USB (WUSB) SUBSYSTEM:
|
||||
P: David Vrabel
|
||||
|
@ -1434,6 +1433,14 @@ P: Russell King
|
|||
M: linux@arm.linux.org.uk
|
||||
F: include/linux/clk.h
|
||||
|
||||
CISCO FCOE HBA DRIVER
|
||||
P: Abhijeet Joglekar
|
||||
M: abjoglek@cisco.com
|
||||
P: Joe Eykholt
|
||||
M: jeykholt@cisco.com
|
||||
L: linux-scsi@vger.kernel.org
|
||||
S: Supported
|
||||
|
||||
CODA FILE SYSTEM
|
||||
P: Jan Harkes
|
||||
M: jaharkes@cs.cmu.edu
|
||||
|
@ -1535,6 +1542,13 @@ W: http://www.fi.muni.cz/~kas/cosa/
|
|||
S: Maintained
|
||||
F: drivers/net/wan/cosa*
|
||||
|
||||
CPMAC ETHERNET DRIVER
|
||||
P: Florian Fainelli
|
||||
M: florian@openwrt.org
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/cpmac.c
|
||||
|
||||
CPU FREQUENCY DRIVERS
|
||||
P: Dave Jones
|
||||
M: davej@redhat.com
|
||||
|
@ -1966,8 +1980,8 @@ F: include/linux/edac.h
|
|||
|
||||
EDAC-E752X
|
||||
P: Mark Gross
|
||||
P: Doug Thompson
|
||||
M: mark.gross@intel.com
|
||||
P: Doug Thompson
|
||||
M: dougthompson@xmission.com
|
||||
L: bluesmoke-devel@lists.sourceforge.net (moderated for non-subscribers)
|
||||
W: bluesmoke.sourceforge.net
|
||||
|
@ -2244,7 +2258,7 @@ P: Li Yang
|
|||
M: leoli@freescale.com
|
||||
P: Zhang Wei
|
||||
M: zw@zh-kernel.org
|
||||
L: linuxppc-embedded@ozlabs.org
|
||||
L: linuxppc-dev@ozlabs.org
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/dma/fsldma.*
|
||||
|
@ -2761,7 +2775,7 @@ IDE SUBSYSTEM
|
|||
P: Bartlomiej Zolnierkiewicz
|
||||
M: bzolnier@gmail.com
|
||||
L: linux-ide@vger.kernel.org
|
||||
T: quilt kernel.org/pub/linux/kernel/people/bart/pata-2.6/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6.git
|
||||
S: Maintained
|
||||
F: Documentation/ide/
|
||||
F: drivers/ide/
|
||||
|
@ -3437,11 +3451,10 @@ L: linuxppc-dev@ozlabs.org
|
|||
S: Maintained
|
||||
|
||||
LINUX FOR POWERPC EMBEDDED MPC5XXX
|
||||
P: Sylvain Munaut
|
||||
M: tnt@246tNt.com
|
||||
P: Grant Likely
|
||||
M: grant.likely@secretlab.ca
|
||||
L: linuxppc-dev@ozlabs.org
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
S: Maintained
|
||||
|
||||
LINUX FOR POWERPC EMBEDDED PPC4XX
|
||||
|
@ -3451,7 +3464,7 @@ P: Matt Porter
|
|||
M: mporter@kernel.crashing.org
|
||||
W: http://www.penguinppc.org/
|
||||
L: linuxppc-dev@ozlabs.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/powerpc.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jwboyer/powerpc-4xx.git
|
||||
S: Maintained
|
||||
|
||||
LINUX FOR POWERPC EMBEDDED XILINX VIRTEX
|
||||
|
@ -3459,6 +3472,7 @@ P: Grant Likely
|
|||
M: grant.likely@secretlab.ca
|
||||
W: http://wiki.secretlab.ca/index.php/Linux_on_Xilinx_Virtex
|
||||
L: linuxppc-dev@ozlabs.org
|
||||
T: git git://git.secretlab.ca/git/linux-2.6.git
|
||||
S: Maintained
|
||||
|
||||
LINUX FOR POWERPC EMBEDDED PPC8XX
|
||||
|
@ -3994,8 +4008,8 @@ NETWORKING [GENERAL]
|
|||
P: David S. Miller
|
||||
M: davem@davemloft.net
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://linux-net.osdl.org/
|
||||
T: git kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6.git
|
||||
W: http://www.linuxfoundation.org/en/Net
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6.git
|
||||
S: Maintained
|
||||
F: net/
|
||||
F: include/net/
|
||||
|
@ -4036,6 +4050,13 @@ F: net/wireless/
|
|||
F: include/net/ieee80211*
|
||||
F: include/net/wireless.h
|
||||
|
||||
NETWORKING DRIVERS
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.linuxfoundation.org/en/Net
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6.git
|
||||
S: Odd Fixes
|
||||
F: drivers/net/
|
||||
|
||||
NETXEN (1/10) GbE SUPPORT
|
||||
P: Dhananjay Phadke
|
||||
M: dhananjay@netxen.com
|
||||
|
@ -4185,7 +4206,7 @@ P: Joel Becker
|
|||
M: joel.becker@oracle.com
|
||||
L: ocfs2-devel@oss.oracle.com (moderated for non-subscribers)
|
||||
W: http://oss.oracle.com/projects/ocfs2/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mfasheh/ocfs2.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/ocfs2.git
|
||||
S: Supported
|
||||
F: Documentation/filesystems/ocfs2.txt
|
||||
F: Documentation/filesystems/dlmfs.txt
|
||||
|
@ -4507,7 +4528,9 @@ F: arch/powerpc/include/asm/ps3*.h
|
|||
F: arch/powerpc/platforms/ps3/
|
||||
F: drivers/*/ps3*
|
||||
F: drivers/ps3/
|
||||
F: drivers/rtc/rtc-ps3.c
|
||||
F: drivers/usb/host/*ps3.c
|
||||
F: sound/ppc/snd_ps3*
|
||||
|
||||
PS3VRAM DRIVER
|
||||
P: Jim Paris
|
||||
|
@ -4515,6 +4538,19 @@ M: jim@jtan.com
|
|||
L: cbe-oss-dev@ozlabs.org
|
||||
S: Maintained
|
||||
|
||||
PTRACE SUPPORT
|
||||
P: Roland McGrath
|
||||
M: roland@redhat.com
|
||||
P: Oleg Nesterov
|
||||
M: oleg@redhat.com
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: include/asm-generic/syscall.h
|
||||
F: include/linux/ptrace.h
|
||||
F: include/linux/regset.h
|
||||
F: include/linux/tracehook.h
|
||||
F: kernel/ptrace.c
|
||||
|
||||
PVRUSB2 VIDEO4LINUX DRIVER
|
||||
P: Mike Isely
|
||||
M: isely@pobox.com
|
||||
|
@ -4660,13 +4696,13 @@ F: kernel/rcutorture.c
|
|||
|
||||
RDC R-321X SoC
|
||||
P: Florian Fainelli
|
||||
M: florian.fainelli@telecomint.eu
|
||||
M: florian@openwrt.org
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
|
||||
RDC R6040 FAST ETHERNET DRIVER
|
||||
P: Florian Fainelli
|
||||
M: florian.fainelli@telecomint.eu
|
||||
M: florian@openwrt.org
|
||||
L: netdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/net/r6040.c
|
||||
|
@ -5560,6 +5596,14 @@ M: ian@mnementh.co.uk
|
|||
S: Maintained
|
||||
F: drivers/mmc/host/tmio_mmc.*
|
||||
|
||||
TMPFS (SHMEM FILESYSTEM)
|
||||
P: Hugh Dickins
|
||||
M: hugh.dickins@tiscali.co.uk
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: include/linux/shmem_fs.h
|
||||
F: mm/shmem.c
|
||||
|
||||
TPM DEVICE DRIVER
|
||||
P: Debora Velarde
|
||||
M: debora@linux.vnet.ibm.com
|
||||
|
|
12
Makefile
12
Makefile
|
@ -1,8 +1,8 @@
|
|||
VERSION = 2
|
||||
PATCHLEVEL = 6
|
||||
SUBLEVEL = 30
|
||||
EXTRAVERSION = -rc3
|
||||
NAME = Temporary Tasmanian Devil
|
||||
EXTRAVERSION =
|
||||
NAME = Man-Eating Seals of Antiquity
|
||||
|
||||
# *DOCUMENTATION*
|
||||
# To see a list of typical targets execute "make help"
|
||||
|
@ -533,7 +533,7 @@ endif
|
|||
|
||||
include $(srctree)/arch/$(SRCARCH)/Makefile
|
||||
|
||||
ifneq (CONFIG_FRAME_WARN,0)
|
||||
ifneq ($(CONFIG_FRAME_WARN),0)
|
||||
KBUILD_CFLAGS += $(call cc-option,-Wframe-larger-than=${CONFIG_FRAME_WARN})
|
||||
endif
|
||||
|
||||
|
@ -1293,7 +1293,7 @@ help:
|
|||
@echo ' dir/ - Build all files in dir and below'
|
||||
@echo ' dir/file.[ois] - Build specified target only'
|
||||
@echo ' dir/file.ko - Build module including final link'
|
||||
@echo ' prepare - Set up for building external modules'
|
||||
@echo ' modules_prepare - Set up for building external modules'
|
||||
@echo ' tags/TAGS - Generate tags file for editors'
|
||||
@echo ' cscope - Generate cscope index'
|
||||
@echo ' kernelrelease - Output the release version string'
|
||||
|
@ -1421,7 +1421,9 @@ $(clean-dirs):
|
|||
$(Q)$(MAKE) $(clean)=$(patsubst _clean_%,%,$@)
|
||||
|
||||
clean: rm-dirs := $(MODVERDIR)
|
||||
clean: rm-files := $(KBUILD_EXTMOD)/Module.symvers
|
||||
clean: rm-files := $(KBUILD_EXTMOD)/Module.symvers \
|
||||
$(KBUILD_EXTMOD)/Module.markers \
|
||||
$(KBUILD_EXTMOD)/modules.order
|
||||
clean: $(clean-dirs)
|
||||
$(call cmd,rmdirs)
|
||||
$(call cmd,rmfiles)
|
||||
|
|
|
@ -16,11 +16,13 @@ __asm__ __volatile__("wmb": : :"memory")
|
|||
__asm__ __volatile__("mb": : :"memory")
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#define __ASM_SMP_MB "\tmb\n"
|
||||
#define smp_mb() mb()
|
||||
#define smp_rmb() rmb()
|
||||
#define smp_wmb() wmb()
|
||||
#define smp_read_barrier_depends() read_barrier_depends()
|
||||
#else
|
||||
#define __ASM_SMP_MB
|
||||
#define smp_mb() barrier()
|
||||
#define smp_rmb() barrier()
|
||||
#define smp_wmb() barrier()
|
||||
|
|
|
@ -1,6 +1,116 @@
|
|||
#ifndef _ASM_FUTEX_H
|
||||
#define _ASM_FUTEX_H
|
||||
#ifndef _ASM_ALPHA_FUTEX_H
|
||||
#define _ASM_ALPHA_FUTEX_H
|
||||
|
||||
#include <asm-generic/futex.h>
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#endif
|
||||
#include <linux/futex.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <asm/errno.h>
|
||||
#include <asm/barrier.h>
|
||||
|
||||
#define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
|
||||
__asm__ __volatile__( \
|
||||
__ASM_SMP_MB \
|
||||
"1: ldl_l %0,0(%2)\n" \
|
||||
insn \
|
||||
"2: stl_c %1,0(%2)\n" \
|
||||
" beq %1,4f\n" \
|
||||
" mov $31,%1\n" \
|
||||
"3: .subsection 2\n" \
|
||||
"4: br 1b\n" \
|
||||
" .previous\n" \
|
||||
" .section __ex_table,\"a\"\n" \
|
||||
" .long 1b-.\n" \
|
||||
" lda $31,3b-1b(%1)\n" \
|
||||
" .long 2b-.\n" \
|
||||
" lda $31,3b-2b(%1)\n" \
|
||||
" .previous\n" \
|
||||
: "=&r" (oldval), "=&r"(ret) \
|
||||
: "r" (uaddr), "r"(oparg) \
|
||||
: "memory")
|
||||
|
||||
static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
|
||||
{
|
||||
int op = (encoded_op >> 28) & 7;
|
||||
int cmp = (encoded_op >> 24) & 15;
|
||||
int oparg = (encoded_op << 8) >> 20;
|
||||
int cmparg = (encoded_op << 20) >> 20;
|
||||
int oldval = 0, ret;
|
||||
if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
|
||||
oparg = 1 << oparg;
|
||||
|
||||
if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
|
||||
return -EFAULT;
|
||||
|
||||
pagefault_disable();
|
||||
|
||||
switch (op) {
|
||||
case FUTEX_OP_SET:
|
||||
__futex_atomic_op("mov %3,%1\n", ret, oldval, uaddr, oparg);
|
||||
break;
|
||||
case FUTEX_OP_ADD:
|
||||
__futex_atomic_op("addl %0,%3,%1\n", ret, oldval, uaddr, oparg);
|
||||
break;
|
||||
case FUTEX_OP_OR:
|
||||
__futex_atomic_op("or %0,%3,%1\n", ret, oldval, uaddr, oparg);
|
||||
break;
|
||||
case FUTEX_OP_ANDN:
|
||||
__futex_atomic_op("andnot %0,%3,%1\n", ret, oldval, uaddr, oparg);
|
||||
break;
|
||||
case FUTEX_OP_XOR:
|
||||
__futex_atomic_op("xor %0,%3,%1\n", ret, oldval, uaddr, oparg);
|
||||
break;
|
||||
default:
|
||||
ret = -ENOSYS;
|
||||
}
|
||||
|
||||
pagefault_enable();
|
||||
|
||||
if (!ret) {
|
||||
switch (cmp) {
|
||||
case FUTEX_OP_CMP_EQ: ret = (oldval == cmparg); break;
|
||||
case FUTEX_OP_CMP_NE: ret = (oldval != cmparg); break;
|
||||
case FUTEX_OP_CMP_LT: ret = (oldval < cmparg); break;
|
||||
case FUTEX_OP_CMP_GE: ret = (oldval >= cmparg); break;
|
||||
case FUTEX_OP_CMP_LE: ret = (oldval <= cmparg); break;
|
||||
case FUTEX_OP_CMP_GT: ret = (oldval > cmparg); break;
|
||||
default: ret = -ENOSYS;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline int
|
||||
futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
|
||||
{
|
||||
int prev, cmp;
|
||||
|
||||
if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
|
||||
return -EFAULT;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
__ASM_SMP_MB
|
||||
"1: ldl_l %0,0(%2)\n"
|
||||
" cmpeq %0,%3,%1\n"
|
||||
" beq %1,3f\n"
|
||||
" mov %4,%1\n"
|
||||
"2: stl_c %1,0(%2)\n"
|
||||
" beq %1,4f\n"
|
||||
"3: .subsection 2\n"
|
||||
"4: br 1b\n"
|
||||
" .previous\n"
|
||||
" .section __ex_table,\"a\"\n"
|
||||
" .long 1b-.\n"
|
||||
" lda $31,3b-1b(%0)\n"
|
||||
" .long 2b-.\n"
|
||||
" lda $31,3b-2b(%0)\n"
|
||||
" .previous\n"
|
||||
: "=&r"(prev), "=&r"(cmp)
|
||||
: "r"(uaddr), "r"((long)oldval), "r"(newval)
|
||||
: "memory");
|
||||
|
||||
return prev;
|
||||
}
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _ASM_ALPHA_FUTEX_H */
|
||||
|
|
|
@ -1,7 +1,9 @@
|
|||
#ifndef __ALPHA_PERCPU_H
|
||||
#define __ALPHA_PERCPU_H
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/threads.h>
|
||||
#include <linux/percpu-defs.h>
|
||||
|
||||
/*
|
||||
* Determine the real variable name from the name visible in the
|
||||
|
@ -73,6 +75,28 @@ extern unsigned long __per_cpu_offset[NR_CPUS];
|
|||
|
||||
#endif /* SMP */
|
||||
|
||||
#include <asm-generic/percpu.h>
|
||||
#ifdef CONFIG_SMP
|
||||
#define PER_CPU_BASE_SECTION ".data.percpu"
|
||||
#else
|
||||
#define PER_CPU_BASE_SECTION ".data"
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
|
||||
#ifdef MODULE
|
||||
#define PER_CPU_SHARED_ALIGNED_SECTION ""
|
||||
#else
|
||||
#define PER_CPU_SHARED_ALIGNED_SECTION ".shared_aligned"
|
||||
#endif
|
||||
#define PER_CPU_FIRST_SECTION ".first"
|
||||
|
||||
#else
|
||||
|
||||
#define PER_CPU_SHARED_ALIGNED_SECTION ""
|
||||
#define PER_CPU_FIRST_SECTION ""
|
||||
|
||||
#endif
|
||||
|
||||
#define PER_CPU_ATTRIBUTES
|
||||
|
||||
#endif /* __ALPHA_PERCPU_H */
|
||||
|
|
|
@ -507,5 +507,7 @@ struct exception_table_entry
|
|||
(pc) + (_fixup)->fixup.bits.nextinsn; \
|
||||
})
|
||||
|
||||
#define ARCH_HAS_SORT_EXTABLE
|
||||
#define ARCH_HAS_SEARCH_EXTABLE
|
||||
|
||||
#endif /* __ALPHA_UACCESS_H */
|
||||
|
|
|
@ -8,7 +8,7 @@ EXTRA_CFLAGS := -Werror -Wno-sign-compare
|
|||
|
||||
obj-y := entry.o traps.o process.o init_task.o osf_sys.o irq.o \
|
||||
irq_alpha.o signal.o setup.o ptrace.o time.o \
|
||||
alpha_ksyms.o systbls.o err_common.o io.o binfmt_loader.o
|
||||
alpha_ksyms.o systbls.o err_common.o io.o
|
||||
|
||||
obj-$(CONFIG_VGA_HOSE) += console.o
|
||||
obj-$(CONFIG_SMP) += smp.o
|
||||
|
@ -43,6 +43,10 @@ else
|
|||
# Misc support
|
||||
obj-$(CONFIG_ALPHA_SRM) += srmcons.o
|
||||
|
||||
ifdef CONFIG_BINFMT_AOUT
|
||||
obj-y += binfmt_loader.o
|
||||
endif
|
||||
|
||||
# Core logic support
|
||||
obj-$(CONFIG_ALPHA_APECS) += core_apecs.o
|
||||
obj-$(CONFIG_ALPHA_CIA) += core_cia.o
|
||||
|
|
|
@ -46,6 +46,6 @@ static struct linux_binfmt loader_format = {
|
|||
|
||||
static int __init init_loader_binfmt(void)
|
||||
{
|
||||
return register_binfmt(&loader_format);
|
||||
return insert_binfmt(&loader_format);
|
||||
}
|
||||
arch_initcall(init_loader_binfmt);
|
||||
|
|
|
@ -229,7 +229,7 @@ ev6_process_logout_frame(struct el_common *mchk_header, int print)
|
|||
}
|
||||
|
||||
void
|
||||
ev6_machine_check(u64 vector, u64 la_ptr)
|
||||
ev6_machine_check(unsigned long vector, unsigned long la_ptr)
|
||||
{
|
||||
struct el_common *mchk_header = (struct el_common *)la_ptr;
|
||||
|
||||
|
|
|
@ -117,7 +117,7 @@ ev7_collect_logout_frame_subpackets(struct el_subpacket *el_ptr,
|
|||
}
|
||||
|
||||
void
|
||||
ev7_machine_check(u64 vector, u64 la_ptr)
|
||||
ev7_machine_check(unsigned long vector, unsigned long la_ptr)
|
||||
{
|
||||
struct el_subpacket *el_ptr = (struct el_subpacket *)la_ptr;
|
||||
char *saved_err_prefix = err_print_prefix;
|
||||
|
@ -246,7 +246,7 @@ ev7_process_pal_subpacket(struct el_subpacket *header)
|
|||
|
||||
switch(header->type) {
|
||||
case EL_TYPE__PAL__LOGOUT_FRAME:
|
||||
printk("%s*** MCHK occurred on LPID %ld (RBOX %llx)\n",
|
||||
printk("%s*** MCHK occurred on LPID %lld (RBOX %llx)\n",
|
||||
err_print_prefix,
|
||||
packet->by_type.logout.whami,
|
||||
packet->by_type.logout.rbox_whami);
|
||||
|
|
|
@ -60,26 +60,26 @@ extern struct ev7_lf_subpackets *
|
|||
ev7_collect_logout_frame_subpackets(struct el_subpacket *,
|
||||
struct ev7_lf_subpackets *);
|
||||
extern void ev7_register_error_handlers(void);
|
||||
extern void ev7_machine_check(u64, u64);
|
||||
extern void ev7_machine_check(unsigned long, unsigned long);
|
||||
|
||||
/*
|
||||
* err_ev6.c
|
||||
*/
|
||||
extern void ev6_register_error_handlers(void);
|
||||
extern int ev6_process_logout_frame(struct el_common *, int);
|
||||
extern void ev6_machine_check(u64, u64);
|
||||
extern void ev6_machine_check(unsigned long, unsigned long);
|
||||
|
||||
/*
|
||||
* err_marvel.c
|
||||
*/
|
||||
extern void marvel_machine_check(u64, u64);
|
||||
extern void marvel_machine_check(unsigned long, unsigned long);
|
||||
extern void marvel_register_error_handlers(void);
|
||||
|
||||
/*
|
||||
* err_titan.c
|
||||
*/
|
||||
extern int titan_process_logout_frame(struct el_common *, int);
|
||||
extern void titan_machine_check(u64, u64);
|
||||
extern void titan_machine_check(unsigned long, unsigned long);
|
||||
extern void titan_register_error_handlers(void);
|
||||
extern int privateer_process_logout_frame(struct el_common *, int);
|
||||
extern void privateer_machine_check(u64, u64);
|
||||
extern void privateer_machine_check(unsigned long, unsigned long);
|
||||
|
|
|
@ -1042,7 +1042,7 @@ marvel_process_logout_frame(struct ev7_lf_subpackets *lf_subpackets, int print)
|
|||
}
|
||||
|
||||
void
|
||||
marvel_machine_check(u64 vector, u64 la_ptr)
|
||||
marvel_machine_check(unsigned long vector, unsigned long la_ptr)
|
||||
{
|
||||
struct el_subpacket *el_ptr = (struct el_subpacket *)la_ptr;
|
||||
int (*process_frame)(struct ev7_lf_subpackets *, int) = NULL;
|
||||
|
|
|
@ -380,7 +380,7 @@ titan_process_logout_frame(struct el_common *mchk_header, int print)
|
|||
}
|
||||
|
||||
void
|
||||
titan_machine_check(u64 vector, u64 la_ptr)
|
||||
titan_machine_check(unsigned long vector, unsigned long la_ptr)
|
||||
{
|
||||
struct el_common *mchk_header = (struct el_common *)la_ptr;
|
||||
struct el_TITAN_sysdata_mcheck *tmchk =
|
||||
|
@ -702,7 +702,7 @@ privateer_process_logout_frame(struct el_common *mchk_header, int print)
|
|||
}
|
||||
|
||||
void
|
||||
privateer_machine_check(u64 vector, u64 la_ptr)
|
||||
privateer_machine_check(unsigned long vector, unsigned long la_ptr)
|
||||
{
|
||||
struct el_common *mchk_header = (struct el_common *)la_ptr;
|
||||
struct el_TITAN_sysdata_mcheck *tmchk =
|
||||
|
|
|
@ -7,10 +7,11 @@
|
|||
* the kernel global pointer and jump to the kernel entry-point.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/asm-offsets.h>
|
||||
|
||||
.section .text.head, "ax"
|
||||
__HEAD
|
||||
.globl swapper_pg_dir
|
||||
.globl _stext
|
||||
swapper_pg_dir=SWAPPER_PGD
|
||||
|
|
|
@ -36,7 +36,6 @@ extern void cia_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
|
|||
extern struct pci_ops irongate_pci_ops;
|
||||
extern int irongate_pci_clr_err(void);
|
||||
extern void irongate_init_arch(void);
|
||||
extern void irongate_machine_check(u64, u64);
|
||||
#define irongate_pci_tbi ((void *)0)
|
||||
|
||||
/* core_lca.c */
|
||||
|
@ -49,7 +48,7 @@ extern void lca_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
|
|||
extern struct pci_ops marvel_pci_ops;
|
||||
extern void marvel_init_arch(void);
|
||||
extern void marvel_kill_arch(int);
|
||||
extern void marvel_machine_check(u64, u64);
|
||||
extern void marvel_machine_check(unsigned long, unsigned long);
|
||||
extern void marvel_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
|
||||
extern int marvel_pa_to_nid(unsigned long);
|
||||
extern int marvel_cpuid_to_nid(int);
|
||||
|
@ -86,7 +85,7 @@ extern void t2_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
|
|||
extern struct pci_ops titan_pci_ops;
|
||||
extern void titan_init_arch(void);
|
||||
extern void titan_kill_arch(int);
|
||||
extern void titan_machine_check(u64, u64);
|
||||
extern void titan_machine_check(unsigned long, unsigned long);
|
||||
extern void titan_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
|
||||
extern struct _alpha_agp_info *titan_agp_info(void);
|
||||
|
||||
|
|
|
@ -16,7 +16,7 @@ SECTIONS
|
|||
|
||||
_text = .; /* Text and read-only data */
|
||||
.text : {
|
||||
*(.text.head)
|
||||
HEAD_TEXT
|
||||
TEXT_TEXT
|
||||
SCHED_TEXT
|
||||
LOCK_TEXT
|
||||
|
|
|
@ -3,11 +3,49 @@
|
|||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/sort.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
||||
static inline unsigned long ex_to_addr(const struct exception_table_entry *x)
|
||||
{
|
||||
return (unsigned long)&x->insn + x->insn;
|
||||
}
|
||||
|
||||
static void swap_ex(void *a, void *b, int size)
|
||||
{
|
||||
struct exception_table_entry *ex_a = a, *ex_b = b;
|
||||
unsigned long addr_a = ex_to_addr(ex_a), addr_b = ex_to_addr(ex_b);
|
||||
unsigned int t = ex_a->fixup.unit;
|
||||
|
||||
ex_a->fixup.unit = ex_b->fixup.unit;
|
||||
ex_b->fixup.unit = t;
|
||||
ex_a->insn = (int)(addr_b - (unsigned long)&ex_a->insn);
|
||||
ex_b->insn = (int)(addr_a - (unsigned long)&ex_b->insn);
|
||||
}
|
||||
|
||||
/*
|
||||
* The exception table needs to be sorted so that the binary
|
||||
* search that we use to find entries in it works properly.
|
||||
* This is used both for the kernel exception table and for
|
||||
* the exception tables of modules that get loaded.
|
||||
*/
|
||||
static int cmp_ex(const void *a, const void *b)
|
||||
{
|
||||
const struct exception_table_entry *x = a, *y = b;
|
||||
|
||||
/* avoid overflow */
|
||||
if (ex_to_addr(x) > ex_to_addr(y))
|
||||
return 1;
|
||||
if (ex_to_addr(x) < ex_to_addr(y))
|
||||
return -1;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void sort_extable(struct exception_table_entry *start,
|
||||
struct exception_table_entry *finish)
|
||||
{
|
||||
sort(start, finish - start, sizeof(struct exception_table_entry),
|
||||
cmp_ex, swap_ex);
|
||||
}
|
||||
|
||||
const struct exception_table_entry *
|
||||
|
@ -20,7 +58,7 @@ search_extable(const struct exception_table_entry *first,
|
|||
unsigned long mid_value;
|
||||
|
||||
mid = (last - first) / 2 + first;
|
||||
mid_value = (unsigned long)&mid->insn + mid->insn;
|
||||
mid_value = ex_to_addr(mid);
|
||||
if (mid_value == value)
|
||||
return mid;
|
||||
else if (mid_value < value)
|
||||
|
|
|
@ -273,6 +273,7 @@ config ARCH_EP93XX
|
|||
select HAVE_CLK
|
||||
select COMMON_CLKDEV
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
help
|
||||
This enables support for the Cirrus EP93xx series of CPUs.
|
||||
|
||||
|
@ -454,6 +455,7 @@ config ARCH_MXC
|
|||
select ARCH_MTD_XIP
|
||||
select GENERIC_GPIO
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select HAVE_CLK
|
||||
help
|
||||
Support for Freescale MXC/iMX-based family of processors
|
||||
|
||||
|
@ -486,8 +488,6 @@ config ARCH_PXA
|
|||
select HAVE_CLK
|
||||
select COMMON_CLKDEV
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select HAVE_CLK
|
||||
select COMMON_CLKDEV
|
||||
select GENERIC_TIME
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select TICK_ONESHOT
|
||||
|
@ -585,6 +585,8 @@ config ARCH_DAVINCI
|
|||
select ARCH_REQUIRE_GPIOLIB
|
||||
select HAVE_CLK
|
||||
select ZONE_DMA
|
||||
select HAVE_IDE
|
||||
select COMMON_CLKDEV
|
||||
help
|
||||
Support for TI's DaVinci platform.
|
||||
|
||||
|
@ -740,6 +742,56 @@ if !MMU
|
|||
source "arch/arm/Kconfig-nommu"
|
||||
endif
|
||||
|
||||
config ARM_ERRATA_411920
|
||||
bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
|
||||
depends on CPU_V6 && !SMP
|
||||
help
|
||||
Invalidation of the Instruction Cache operation can
|
||||
fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
|
||||
It does not affect the MPCore. This option enables the ARM Ltd.
|
||||
recommended workaround.
|
||||
|
||||
config ARM_ERRATA_430973
|
||||
bool "ARM errata: Stale prediction on replaced interworking branch"
|
||||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 430973 Cortex-A8
|
||||
(r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
|
||||
interworking branch is replaced with another code sequence at the
|
||||
same virtual address, whether due to self-modifying code or virtual
|
||||
to physical address re-mapping, Cortex-A8 does not recover from the
|
||||
stale interworking branch prediction. This results in Cortex-A8
|
||||
executing the new code sequence in the incorrect ARM or Thumb state.
|
||||
The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
|
||||
and also flushes the branch target cache at every context switch.
|
||||
Note that setting specific bits in the ACTLR register may not be
|
||||
available in non-secure mode.
|
||||
|
||||
config ARM_ERRATA_458693
|
||||
bool "ARM errata: Processor deadlock when a false hazard is created"
|
||||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 458693 Cortex-A8 (r2p0)
|
||||
erratum. For very specific sequences of memory operations, it is
|
||||
possible for a hazard condition intended for a cache line to instead
|
||||
be incorrectly associated with a different cache line. This false
|
||||
hazard might then cause a processor deadlock. The workaround enables
|
||||
the L1 caching of the NEON accesses and disables the PLD instruction
|
||||
in the ACTLR register. Note that setting specific bits in the ACTLR
|
||||
register may not be available in non-secure mode.
|
||||
|
||||
config ARM_ERRATA_460075
|
||||
bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
|
||||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 460075 Cortex-A8 (r2p0)
|
||||
erratum. Any asynchronous access to the L2 cache may encounter a
|
||||
situation in which recent store transactions to the L2 cache are lost
|
||||
and overwritten with stale memory contents from external memory. The
|
||||
workaround disables the write-allocate mode for the L2 cache via the
|
||||
ACTLR register. Note that setting specific bits in the ACTLR register
|
||||
may not be available in non-secure mode.
|
||||
|
||||
endmenu
|
||||
|
||||
source "arch/arm/common/Kconfig"
|
||||
|
@ -925,10 +977,9 @@ config OABI_COMPAT
|
|||
UNPREDICTABLE (in fact it can be predicted that it won't work
|
||||
at all). If in doubt say Y.
|
||||
|
||||
config ARCH_FLATMEM_HAS_HOLES
|
||||
config ARCH_HAS_HOLES_MEMORYMODEL
|
||||
bool
|
||||
default y
|
||||
depends on FLATMEM
|
||||
default n
|
||||
|
||||
# Discontigmem is deprecated
|
||||
config ARCH_DISCONTIGMEM_ENABLE
|
||||
|
@ -1171,12 +1222,6 @@ config CPU_FREQ_IMX
|
|||
|
||||
If in doubt, say N.
|
||||
|
||||
config CPU_FREQ_PXA
|
||||
bool
|
||||
depends on CPU_FREQ && ARCH_PXA && PXA25x
|
||||
default y
|
||||
select CPU_FREQ_DEFAULT_GOV_USERSPACE
|
||||
|
||||
endif
|
||||
|
||||
source "drivers/cpuidle/Kconfig"
|
||||
|
|
|
@ -253,9 +253,9 @@ void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
void gic_raise_softirq(cpumask_t cpumask, unsigned int irq)
|
||||
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq)
|
||||
{
|
||||
unsigned long map = *cpus_addr(cpumask);
|
||||
unsigned long map = *cpus_addr(*mask);
|
||||
|
||||
/* this always happens on GIC0 */
|
||||
writel(map << 16 | irq, gic_data[0].dist_base + GIC_DIST_SOFTINT);
|
||||
|
|
1784
arch/arm/configs/davinci_all_defconfig
Normal file
1784
arch/arm/configs/davinci_all_defconfig
Normal file
File diff suppressed because it is too large
Load diff
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.29-rc5
|
||||
# Tue Mar 3 21:45:57 2009
|
||||
# Linux kernel version: 2.6.30-rc4
|
||||
# Mon May 4 11:58:57 2009
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
|
@ -66,20 +66,20 @@ CONFIG_NAMESPACES=y
|
|||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_ANON_INODES=y
|
||||
# CONFIG_EMBEDDED is not set
|
||||
CONFIG_UID16=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
# CONFIG_KALLSYMS_ALL is not set
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_HOTPLUG=y
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_TIMERFD=y
|
||||
|
@ -89,6 +89,7 @@ CONFIG_AIO=y
|
|||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_PCI_QUIRKS=y
|
||||
CONFIG_SLUB_DEBUG=y
|
||||
CONFIG_COMPAT_BRK=y
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
# CONFIG_SLOB is not set
|
||||
|
@ -101,6 +102,7 @@ CONFIG_KPROBES=y
|
|||
CONFIG_KRETPROBES=y
|
||||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_SLABINFO=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
|
@ -113,7 +115,6 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
|
@ -142,6 +143,7 @@ CONFIG_DEFAULT_IOSCHED="cfq"
|
|||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_EP93XX is not set
|
||||
# CONFIG_ARCH_GEMINI is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_NETX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
|
@ -162,6 +164,7 @@ CONFIG_ARCH_KIRKWOOD=y
|
|||
# CONFIG_ARCH_ORION5X is not set
|
||||
# CONFIG_ARCH_PNX4008 is not set
|
||||
# CONFIG_ARCH_PXA is not set
|
||||
# CONFIG_ARCH_MMP is not set
|
||||
# CONFIG_ARCH_RPC is not set
|
||||
# CONFIG_ARCH_SA1100 is not set
|
||||
# CONFIG_ARCH_S3C2410 is not set
|
||||
|
@ -217,6 +220,7 @@ CONFIG_PCI_SYSCALL=y
|
|||
CONFIG_PCI_LEGACY=y
|
||||
# CONFIG_PCI_DEBUG is not set
|
||||
# CONFIG_PCI_STUB is not set
|
||||
# CONFIG_PCI_IOV is not set
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
|
@ -237,6 +241,7 @@ CONFIG_AEABI=y
|
|||
CONFIG_ARCH_FLATMEM_HAS_HOLES=y
|
||||
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
|
||||
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
|
||||
# CONFIG_HIGHMEM is not set
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
|
@ -249,6 +254,8 @@ CONFIG_SPLIT_PTLOCK_CPUS=4096
|
|||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_UNEVICTABLE_LRU=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
|
||||
#
|
||||
|
@ -293,7 +300,6 @@ CONFIG_NET=y
|
|||
#
|
||||
# Networking options
|
||||
#
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_PACKET_MMAP=y
|
||||
CONFIG_UNIX=y
|
||||
|
@ -324,7 +330,7 @@ CONFIG_IP_PNP_BOOTP=y
|
|||
CONFIG_INET_XFRM_MODE_TRANSPORT=y
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=y
|
||||
CONFIG_INET_XFRM_MODE_BEET=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_INET_LRO=y
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
|
@ -357,6 +363,7 @@ CONFIG_NET_DSA_MV88E6123_61_65=y
|
|||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
|
@ -365,20 +372,20 @@ CONFIG_NET_DSA_MV88E6123_61_65=y
|
|||
#
|
||||
CONFIG_NET_PKTGEN=m
|
||||
# CONFIG_NET_TCPPROBE is not set
|
||||
# CONFIG_NET_DROP_MONITOR is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_CAN is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
# CONFIG_PHONET is not set
|
||||
CONFIG_WIRELESS=y
|
||||
CONFIG_CFG80211=y
|
||||
# CONFIG_CFG80211_REG_DEBUG is not set
|
||||
# CONFIG_NL80211 is not set
|
||||
CONFIG_WIRELESS_OLD_REGULATORY=y
|
||||
CONFIG_WIRELESS_EXT=y
|
||||
CONFIG_WIRELESS_EXT_SYSFS=y
|
||||
CONFIG_LIB80211=y
|
||||
# CONFIG_LIB80211_DEBUG is not set
|
||||
CONFIG_MAC80211=y
|
||||
|
||||
#
|
||||
|
@ -513,7 +520,6 @@ CONFIG_MTD_NAND_ORION=y
|
|||
# LPDDR flash memory drivers
|
||||
#
|
||||
# CONFIG_MTD_LPDDR is not set
|
||||
# CONFIG_MTD_QINFO_PROBE is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
|
@ -592,8 +598,10 @@ CONFIG_SCSI_LOWLEVEL=y
|
|||
# CONFIG_MEGARAID_NEWGEN is not set
|
||||
# CONFIG_MEGARAID_LEGACY is not set
|
||||
# CONFIG_MEGARAID_SAS is not set
|
||||
# CONFIG_SCSI_MPT2SAS is not set
|
||||
# CONFIG_SCSI_HPTIOP is not set
|
||||
# CONFIG_LIBFC is not set
|
||||
# CONFIG_LIBFCOE is not set
|
||||
# CONFIG_FCOE is not set
|
||||
# CONFIG_SCSI_DMX3191D is not set
|
||||
# CONFIG_SCSI_FUTURE_DOMAIN is not set
|
||||
|
@ -614,6 +622,7 @@ CONFIG_SCSI_LOWLEVEL=y
|
|||
# CONFIG_SCSI_DEBUG is not set
|
||||
# CONFIG_SCSI_SRP is not set
|
||||
# CONFIG_SCSI_DH is not set
|
||||
# CONFIG_SCSI_OSD_INITIATOR is not set
|
||||
CONFIG_ATA=y
|
||||
# CONFIG_ATA_NONSTANDARD is not set
|
||||
CONFIG_SATA_PMP=y
|
||||
|
@ -687,6 +696,7 @@ CONFIG_SATA_MV=y
|
|||
# CONFIG_IEEE1394 is not set
|
||||
# CONFIG_I2O is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
|
@ -724,8 +734,10 @@ CONFIG_MII=y
|
|||
# CONFIG_SMC91X is not set
|
||||
# CONFIG_DM9000 is not set
|
||||
# CONFIG_ENC28J60 is not set
|
||||
# CONFIG_ETHOC is not set
|
||||
# CONFIG_SMC911X is not set
|
||||
# CONFIG_SMSC911X is not set
|
||||
# CONFIG_DNET is not set
|
||||
# CONFIG_NET_TULIP is not set
|
||||
# CONFIG_HP100 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
|
@ -763,6 +775,7 @@ CONFIG_NETDEV_1000=y
|
|||
# CONFIG_E1000E is not set
|
||||
# CONFIG_IP1000 is not set
|
||||
# CONFIG_IGB is not set
|
||||
# CONFIG_IGBVF is not set
|
||||
# CONFIG_NS83820 is not set
|
||||
# CONFIG_HAMACHI is not set
|
||||
# CONFIG_YELLOWFIN is not set
|
||||
|
@ -777,6 +790,7 @@ CONFIG_MV643XX_ETH=y
|
|||
# CONFIG_QLA3XXX is not set
|
||||
# CONFIG_ATL1 is not set
|
||||
# CONFIG_ATL1E is not set
|
||||
# CONFIG_ATL1C is not set
|
||||
# CONFIG_JME is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
# CONFIG_TR is not set
|
||||
|
@ -789,10 +803,11 @@ CONFIG_WLAN_80211=y
|
|||
CONFIG_LIBERTAS=y
|
||||
# CONFIG_LIBERTAS_USB is not set
|
||||
CONFIG_LIBERTAS_SDIO=y
|
||||
# CONFIG_LIBERTAS_SPI is not set
|
||||
# CONFIG_LIBERTAS_DEBUG is not set
|
||||
# CONFIG_LIBERTAS_THINFIRM is not set
|
||||
# CONFIG_HERMES is not set
|
||||
# CONFIG_ATMEL is not set
|
||||
# CONFIG_AT76C50X_USB is not set
|
||||
# CONFIG_PRISM54 is not set
|
||||
# CONFIG_USB_ZD1201 is not set
|
||||
# CONFIG_USB_NET_RNDIS_WLAN is not set
|
||||
|
@ -800,20 +815,20 @@ CONFIG_LIBERTAS_SDIO=y
|
|||
# CONFIG_RTL8187 is not set
|
||||
# CONFIG_ADM8211 is not set
|
||||
# CONFIG_MAC80211_HWSIM is not set
|
||||
# CONFIG_MWL8K is not set
|
||||
# CONFIG_P54_COMMON is not set
|
||||
# CONFIG_ATH5K is not set
|
||||
# CONFIG_ATH9K is not set
|
||||
# CONFIG_AR9170_USB is not set
|
||||
# CONFIG_IPW2100 is not set
|
||||
# CONFIG_IPW2200 is not set
|
||||
# CONFIG_IWLCORE is not set
|
||||
# CONFIG_IWLWIFI_LEDS is not set
|
||||
# CONFIG_IWLAGN is not set
|
||||
# CONFIG_IWL3945 is not set
|
||||
# CONFIG_IWLWIFI is not set
|
||||
# CONFIG_HOSTAP is not set
|
||||
# CONFIG_B43 is not set
|
||||
# CONFIG_B43LEGACY is not set
|
||||
# CONFIG_ZD1211RW is not set
|
||||
# CONFIG_RT2X00 is not set
|
||||
# CONFIG_HERMES is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
|
@ -908,6 +923,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=2
|
|||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
# CONFIG_SERIAL_MAX3100 is not set
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_JSM is not set
|
||||
|
@ -982,7 +998,6 @@ CONFIG_I2C_MV64XXX=y
|
|||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_PCF8575 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_MAX6875 is not set
|
||||
# CONFIG_SENSORS_TSL2550 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
|
@ -1082,15 +1097,17 @@ CONFIG_USB_HID=y
|
|||
#
|
||||
# Special HID drivers
|
||||
#
|
||||
CONFIG_HID_COMPAT=y
|
||||
CONFIG_HID_A4TECH=y
|
||||
CONFIG_HID_APPLE=y
|
||||
CONFIG_HID_BELKIN=y
|
||||
CONFIG_HID_CHERRY=y
|
||||
CONFIG_HID_CHICONY=y
|
||||
CONFIG_HID_CYPRESS=y
|
||||
# CONFIG_DRAGONRISE_FF is not set
|
||||
CONFIG_HID_EZKEY=y
|
||||
CONFIG_HID_KYE=y
|
||||
CONFIG_HID_GYRATION=y
|
||||
CONFIG_HID_KENSINGTON=y
|
||||
CONFIG_HID_LOGITECH=y
|
||||
# CONFIG_LOGITECH_FF is not set
|
||||
# CONFIG_LOGIRUMBLEPAD2_FF is not set
|
||||
|
@ -1152,11 +1169,11 @@ CONFIG_USB_PRINTER=m
|
|||
# CONFIG_USB_TMC is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed;
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
|
||||
#
|
||||
|
||||
#
|
||||
# see USB_STORAGE Help for more information
|
||||
# also be needed; see USB_STORAGE Help for more info
|
||||
#
|
||||
CONFIG_USB_STORAGE=y
|
||||
# CONFIG_USB_STORAGE_DEBUG is not set
|
||||
|
@ -1198,7 +1215,6 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
|
|||
# CONFIG_USB_LED is not set
|
||||
# CONFIG_USB_CYPRESS_CY7C63 is not set
|
||||
# CONFIG_USB_CYTHERM is not set
|
||||
# CONFIG_USB_PHIDGET is not set
|
||||
# CONFIG_USB_IDMOUSE is not set
|
||||
# CONFIG_USB_FTDI_ELAN is not set
|
||||
# CONFIG_USB_APPLEDISPLAY is not set
|
||||
|
@ -1215,6 +1231,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
|
|||
# OTG and related infrastructure
|
||||
#
|
||||
# CONFIG_USB_GPIO_VBUS is not set
|
||||
# CONFIG_NOP_USB_XCEIV is not set
|
||||
# CONFIG_UWB is not set
|
||||
CONFIG_MMC=y
|
||||
# CONFIG_MMC_DEBUG is not set
|
||||
|
@ -1245,7 +1262,11 @@ CONFIG_LEDS_CLASS=y
|
|||
#
|
||||
# CONFIG_LEDS_PCA9532 is not set
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_GPIO_PLATFORM=y
|
||||
# CONFIG_LEDS_LP5521 is not set
|
||||
# CONFIG_LEDS_PCA955X is not set
|
||||
# CONFIG_LEDS_DAC124S085 is not set
|
||||
# CONFIG_LEDS_BD2802 is not set
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
|
@ -1255,6 +1276,10 @@ CONFIG_LEDS_TRIGGER_TIMER=y
|
|||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
|
||||
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
||||
|
||||
#
|
||||
# iptables trigger is under Netfilter config (LED target)
|
||||
#
|
||||
CONFIG_RTC_LIB=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_HCTOSYS=y
|
||||
|
@ -1329,7 +1354,9 @@ CONFIG_DMA_ENGINE=y
|
|||
# DMA Clients
|
||||
#
|
||||
# CONFIG_NET_DMA is not set
|
||||
# CONFIG_ASYNC_TX_DMA is not set
|
||||
# CONFIG_DMATEST is not set
|
||||
# CONFIG_AUXDISPLAY is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
# CONFIG_UIO is not set
|
||||
# CONFIG_STAGING is not set
|
||||
|
@ -1341,6 +1368,7 @@ CONFIG_EXT2_FS=y
|
|||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
# CONFIG_EXT2_FS_XIP is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
# CONFIG_EXT4_FS is not set
|
||||
CONFIG_JBD=y
|
||||
|
@ -1360,6 +1388,11 @@ CONFIG_INOTIFY_USER=y
|
|||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# Caches
|
||||
#
|
||||
# CONFIG_FSCACHE is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
|
@ -1419,6 +1452,7 @@ CONFIG_CRAMFS=y
|
|||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
# CONFIG_NILFS2_FS is not set
|
||||
CONFIG_NETWORK_FILESYSTEMS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
|
@ -1430,7 +1464,6 @@ CONFIG_LOCKD=y
|
|||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_NFS_COMMON=y
|
||||
CONFIG_SUNRPC=y
|
||||
# CONFIG_SUNRPC_REGISTER_V4 is not set
|
||||
# CONFIG_RPCSEC_GSS_KRB5 is not set
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
|
@ -1502,6 +1535,9 @@ CONFIG_DEBUG_KERNEL=y
|
|||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
|
||||
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
|
||||
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
|
@ -1538,10 +1574,12 @@ CONFIG_DEBUG_MEMORY_INIT=y
|
|||
# CONFIG_FAULT_INJECTION is not set
|
||||
# CONFIG_LATENCYTOP is not set
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
# CONFIG_PAGE_POISONING is not set
|
||||
CONFIG_NOP_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_RING_BUFFER=y
|
||||
CONFIG_TRACING=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
|
||||
#
|
||||
# Tracers
|
||||
|
@ -1551,11 +1589,15 @@ CONFIG_TRACING=y
|
|||
# CONFIG_PREEMPT_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_EVENT_TRACER is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_FTRACE_STARTUP_TEST is not set
|
||||
# CONFIG_DYNAMIC_PRINTK_DEBUG is not set
|
||||
# CONFIG_DYNAMIC_DEBUG is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_KGDB is not set
|
||||
|
@ -1587,10 +1629,12 @@ CONFIG_CRYPTO_BLKCIPHER2=y
|
|||
CONFIG_CRYPTO_HASH=y
|
||||
CONFIG_CRYPTO_HASH2=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_PCOMP=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
CONFIG_CRYPTO_MANAGER2=y
|
||||
# CONFIG_CRYPTO_GF128MUL is not set
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
CONFIG_CRYPTO_WORKQUEUE=y
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
# CONFIG_CRYPTO_AUTHENC is not set
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
|
@ -1659,6 +1703,7 @@ CONFIG_CRYPTO_ARC4=y
|
|||
# Compression
|
||||
#
|
||||
# CONFIG_CRYPTO_DEFLATE is not set
|
||||
# CONFIG_CRYPTO_ZLIB is not set
|
||||
# CONFIG_CRYPTO_LZO is not set
|
||||
|
||||
#
|
||||
|
@ -1667,6 +1712,7 @@ CONFIG_CRYPTO_ARC4=y
|
|||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
CONFIG_CRYPTO_HW=y
|
||||
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
|
||||
CONFIG_BINARY_PRINTF=y
|
||||
|
||||
#
|
||||
# Library routines
|
||||
|
@ -1682,7 +1728,7 @@ CONFIG_CRC32=y
|
|||
CONFIG_LIBCRC32C=y
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_NLATTR=y
|
||||
|
|
File diff suppressed because it is too large
Load diff
|
@ -197,7 +197,7 @@ CONFIG_MXC_PWM=y
|
|||
#
|
||||
CONFIG_CPU_32=y
|
||||
CONFIG_CPU_V6=y
|
||||
CONFIG_CPU_32v6K=y
|
||||
# CONFIG_CPU_32v6K is not set
|
||||
CONFIG_CPU_32v6=y
|
||||
CONFIG_CPU_ABRT_EV6=y
|
||||
CONFIG_CPU_PABRT_NOIFAR=y
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.27-rc4
|
||||
# Fri Aug 22 12:38:51 2008
|
||||
# Linux kernel version: 2.6.30-rc4
|
||||
# Mon May 4 14:07:25 2009
|
||||
#
|
||||
CONFIG_ARM=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
|
@ -22,8 +22,6 @@ CONFIG_RWSEM_GENERIC_SPINLOCK=y
|
|||
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_ARCH_SUPPORTS_AOUT=y
|
||||
CONFIG_ZONE_DMA=y
|
||||
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
|
||||
CONFIG_VECTORS_BASE=0xffff0000
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
@ -44,10 +42,19 @@ CONFIG_SYSVIPC_SYSCTL=y
|
|||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
|
||||
#
|
||||
# RCU Subsystem
|
||||
#
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
# CONFIG_TREE_RCU is not set
|
||||
# CONFIG_PREEMPT_RCU is not set
|
||||
# CONFIG_TREE_RCU_TRACE is not set
|
||||
# CONFIG_PREEMPT_RCU_TRACE is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
# CONFIG_CGROUPS is not set
|
||||
# CONFIG_GROUP_SCHED is not set
|
||||
# CONFIG_CGROUPS is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
# CONFIG_RELAY is not set
|
||||
|
@ -55,48 +62,45 @@ CONFIG_SYSFS_DEPRECATED_V2=y
|
|||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_UID16=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
CONFIG_KALLSYMS=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
# CONFIG_KALLSYMS_EXTRA_PASS is not set
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_HOTPLUG=y
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_COMPAT_BRK=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
CONFIG_ANON_INODES=y
|
||||
CONFIG_EPOLL=y
|
||||
CONFIG_SIGNALFD=y
|
||||
CONFIG_TIMERFD=y
|
||||
CONFIG_EVENTFD=y
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_AIO=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_PCI_QUIRKS=y
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
CONFIG_COMPAT_BRK=y
|
||||
# CONFIG_SLAB is not set
|
||||
CONFIG_SLUB=y
|
||||
# CONFIG_SLOB is not set
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_TRACEPOINTS=y
|
||||
# CONFIG_MARKERS is not set
|
||||
CONFIG_OPROFILE=y
|
||||
CONFIG_HAVE_OPROFILE=y
|
||||
CONFIG_KPROBES=y
|
||||
# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set
|
||||
CONFIG_KRETPROBES=y
|
||||
# CONFIG_HAVE_IOREMAP_PROT is not set
|
||||
CONFIG_HAVE_KPROBES=y
|
||||
CONFIG_HAVE_KRETPROBES=y
|
||||
# CONFIG_HAVE_ARCH_TRACEHOOK is not set
|
||||
# CONFIG_HAVE_DMA_ATTRS is not set
|
||||
# CONFIG_USE_GENERIC_SMP_HELPERS is not set
|
||||
# CONFIG_HAVE_CLK is not set
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
# CONFIG_SLOW_WORK is not set
|
||||
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_MODULE_FORCE_LOAD is not set
|
||||
|
@ -104,11 +108,8 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
CONFIG_KMOD=y
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_BLK_DEV_INTEGRITY is not set
|
||||
|
||||
|
@ -124,7 +125,7 @@ CONFIG_IOSCHED_CFQ=y
|
|||
CONFIG_DEFAULT_CFQ=y
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="cfq"
|
||||
CONFIG_CLASSIC_RCU=y
|
||||
# CONFIG_FREEZER is not set
|
||||
|
||||
#
|
||||
# System Type
|
||||
|
@ -134,10 +135,10 @@ CONFIG_CLASSIC_RCU=y
|
|||
# CONFIG_ARCH_REALVIEW is not set
|
||||
# CONFIG_ARCH_VERSATILE is not set
|
||||
# CONFIG_ARCH_AT91 is not set
|
||||
# CONFIG_ARCH_CLPS7500 is not set
|
||||
# CONFIG_ARCH_CLPS711X is not set
|
||||
# CONFIG_ARCH_EBSA110 is not set
|
||||
# CONFIG_ARCH_EP93XX is not set
|
||||
# CONFIG_ARCH_GEMINI is not set
|
||||
# CONFIG_ARCH_FOOTBRIDGE is not set
|
||||
# CONFIG_ARCH_NETX is not set
|
||||
# CONFIG_ARCH_H720X is not set
|
||||
|
@ -158,14 +159,17 @@ CONFIG_CLASSIC_RCU=y
|
|||
CONFIG_ARCH_ORION5X=y
|
||||
# CONFIG_ARCH_PNX4008 is not set
|
||||
# CONFIG_ARCH_PXA is not set
|
||||
# CONFIG_ARCH_MMP is not set
|
||||
# CONFIG_ARCH_RPC is not set
|
||||
# CONFIG_ARCH_SA1100 is not set
|
||||
# CONFIG_ARCH_S3C2410 is not set
|
||||
# CONFIG_ARCH_S3C64XX is not set
|
||||
# CONFIG_ARCH_SHARK is not set
|
||||
# CONFIG_ARCH_LH7A40X is not set
|
||||
# CONFIG_ARCH_DAVINCI is not set
|
||||
# CONFIG_ARCH_OMAP is not set
|
||||
# CONFIG_ARCH_MSM7X00A is not set
|
||||
# CONFIG_ARCH_MSM is not set
|
||||
# CONFIG_ARCH_W90X900 is not set
|
||||
|
||||
#
|
||||
# Orion Implementations
|
||||
|
@ -175,6 +179,7 @@ CONFIG_MACH_RD88F5182=y
|
|||
CONFIG_MACH_KUROBOX_PRO=y
|
||||
CONFIG_MACH_DNS323=y
|
||||
CONFIG_MACH_TS209=y
|
||||
CONFIG_MACH_TERASTATION_PRO2=y
|
||||
CONFIG_MACH_LINKSTATION_PRO=y
|
||||
CONFIG_MACH_LINKSTATION_MINI=y
|
||||
CONFIG_MACH_TS409=y
|
||||
|
@ -187,14 +192,6 @@ CONFIG_MACH_WNR854T=y
|
|||
CONFIG_MACH_RD88F5181L_GE=y
|
||||
CONFIG_MACH_RD88F5181L_FXO=y
|
||||
CONFIG_MACH_RD88F6183AP_GE=y
|
||||
|
||||
#
|
||||
# Boot options
|
||||
#
|
||||
|
||||
#
|
||||
# Power management
|
||||
#
|
||||
CONFIG_PLAT_ORION=y
|
||||
|
||||
#
|
||||
|
@ -228,6 +225,8 @@ CONFIG_PCI_SYSCALL=y
|
|||
# CONFIG_ARCH_SUPPORTS_MSI is not set
|
||||
CONFIG_PCI_LEGACY=y
|
||||
# CONFIG_PCI_DEBUG is not set
|
||||
# CONFIG_PCI_STUB is not set
|
||||
# CONFIG_PCI_IOV is not set
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
|
@ -237,25 +236,32 @@ CONFIG_TICK_ONESHOT=y
|
|||
CONFIG_NO_HZ=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
|
||||
CONFIG_VMSPLIT_3G=y
|
||||
# CONFIG_VMSPLIT_2G is not set
|
||||
# CONFIG_VMSPLIT_1G is not set
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_HZ=100
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_OABI_COMPAT=y
|
||||
# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set
|
||||
CONFIG_ARCH_FLATMEM_HAS_HOLES=y
|
||||
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
|
||||
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
|
||||
# CONFIG_HIGHMEM is not set
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
|
||||
CONFIG_PAGEFLAGS_EXTENDED=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4096
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=1
|
||||
CONFIG_BOUNCE=y
|
||||
# CONFIG_PHYS_ADDR_T_64BIT is not set
|
||||
CONFIG_ZONE_DMA_FLAG=0
|
||||
CONFIG_VIRT_TO_BUS=y
|
||||
CONFIG_UNEVICTABLE_LRU=y
|
||||
CONFIG_HAVE_MLOCK=y
|
||||
CONFIG_HAVE_MLOCKED_PAGE_BIT=y
|
||||
CONFIG_LEDS=y
|
||||
CONFIG_LEDS_CPU=y
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
|
@ -269,6 +275,11 @@ CONFIG_CMDLINE=""
|
|||
# CONFIG_XIP_KERNEL is not set
|
||||
# CONFIG_KEXEC is not set
|
||||
|
||||
#
|
||||
# CPU Power Management
|
||||
#
|
||||
# CONFIG_CPU_IDLE is not set
|
||||
|
||||
#
|
||||
# Floating point emulation
|
||||
#
|
||||
|
@ -285,13 +296,18 @@ CONFIG_VFP=y
|
|||
# Userspace binary formats
|
||||
#
|
||||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
CONFIG_HAVE_AOUT=y
|
||||
# CONFIG_BINFMT_AOUT is not set
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
|
||||
#
|
||||
# Power management options
|
||||
#
|
||||
# CONFIG_PM is not set
|
||||
CONFIG_PM=y
|
||||
# CONFIG_PM_DEBUG is not set
|
||||
# CONFIG_SUSPEND is not set
|
||||
# CONFIG_APM_EMULATION is not set
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_NET=y
|
||||
|
||||
|
@ -328,7 +344,7 @@ CONFIG_IP_PNP_BOOTP=y
|
|||
CONFIG_INET_XFRM_MODE_TRANSPORT=y
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=y
|
||||
CONFIG_INET_XFRM_MODE_BEET=y
|
||||
# CONFIG_INET_LRO is not set
|
||||
CONFIG_INET_LRO=y
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
|
@ -343,6 +359,15 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_TAG_DSA=y
|
||||
CONFIG_NET_DSA_TAG_EDSA=y
|
||||
# CONFIG_NET_DSA_TAG_TRAILER is not set
|
||||
CONFIG_NET_DSA_MV88E6XXX=y
|
||||
# CONFIG_NET_DSA_MV88E6060 is not set
|
||||
CONFIG_NET_DSA_MV88E6XXX_NEED_PPU=y
|
||||
CONFIG_NET_DSA_MV88E6131=y
|
||||
CONFIG_NET_DSA_MV88E6123_61_65=y
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
|
@ -352,27 +377,29 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
# CONFIG_PHONET is not set
|
||||
# CONFIG_NET_SCHED is not set
|
||||
# CONFIG_DCB is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
CONFIG_NET_PKTGEN=m
|
||||
# CONFIG_NET_TCPPROBE is not set
|
||||
# CONFIG_NET_DROP_MONITOR is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_CAN is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_AF_RXRPC is not set
|
||||
|
||||
#
|
||||
# Wireless
|
||||
#
|
||||
CONFIG_WIRELESS=y
|
||||
# CONFIG_CFG80211 is not set
|
||||
# CONFIG_WIRELESS_OLD_REGULATORY is not set
|
||||
CONFIG_WIRELESS_EXT=y
|
||||
CONFIG_WIRELESS_EXT_SYSFS=y
|
||||
# CONFIG_LIB80211 is not set
|
||||
# CONFIG_MAC80211 is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
# CONFIG_WIMAX is not set
|
||||
# CONFIG_RFKILL is not set
|
||||
# CONFIG_NET_9P is not set
|
||||
|
||||
|
@ -397,6 +424,7 @@ CONFIG_MTD=y
|
|||
# CONFIG_MTD_DEBUG is not set
|
||||
# CONFIG_MTD_CONCAT is not set
|
||||
CONFIG_MTD_PARTITIONS=y
|
||||
# CONFIG_MTD_TESTS is not set
|
||||
# CONFIG_MTD_REDBOOT_PARTS is not set
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
# CONFIG_MTD_AFS_PARTS is not set
|
||||
|
@ -450,9 +478,7 @@ CONFIG_MTD_CFI_UTIL=y
|
|||
#
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_START=0x0
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x0
|
||||
CONFIG_MTD_PHYSMAP_BANKWIDTH=0
|
||||
# CONFIG_MTD_PHYSMAP_COMPAT is not set
|
||||
# CONFIG_MTD_ARM_INTEGRATOR is not set
|
||||
# CONFIG_MTD_IMPA7 is not set
|
||||
# CONFIG_MTD_INTEL_VR_NOR is not set
|
||||
|
@ -477,6 +503,7 @@ CONFIG_MTD_NAND=y
|
|||
CONFIG_MTD_NAND_VERIFY_WRITE=y
|
||||
# CONFIG_MTD_NAND_ECC_SMC is not set
|
||||
# CONFIG_MTD_NAND_MUSEUM_IDS is not set
|
||||
# CONFIG_MTD_NAND_GPIO is not set
|
||||
CONFIG_MTD_NAND_IDS=y
|
||||
# CONFIG_MTD_NAND_DISKONCHIP is not set
|
||||
# CONFIG_MTD_NAND_CAFE is not set
|
||||
|
@ -486,6 +513,11 @@ CONFIG_MTD_NAND_PLATFORM=y
|
|||
CONFIG_MTD_NAND_ORION=y
|
||||
# CONFIG_MTD_ONENAND is not set
|
||||
|
||||
#
|
||||
# LPDDR flash memory drivers
|
||||
#
|
||||
# CONFIG_MTD_LPDDR is not set
|
||||
|
||||
#
|
||||
# UBI - Unsorted block images
|
||||
#
|
||||
|
@ -507,11 +539,20 @@ CONFIG_BLK_DEV_LOOP=y
|
|||
# CONFIG_ATA_OVER_ETH is not set
|
||||
CONFIG_MISC_DEVICES=y
|
||||
# CONFIG_PHANTOM is not set
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
# CONFIG_SGI_IOC4 is not set
|
||||
# CONFIG_TIFM_CORE is not set
|
||||
# CONFIG_ICS932S401 is not set
|
||||
# CONFIG_ENCLOSURE_SERVICES is not set
|
||||
# CONFIG_HP_ILO is not set
|
||||
# CONFIG_ISL29003 is not set
|
||||
# CONFIG_C2PORT is not set
|
||||
|
||||
#
|
||||
# EEPROM support
|
||||
#
|
||||
# CONFIG_EEPROM_AT24 is not set
|
||||
# CONFIG_EEPROM_LEGACY is not set
|
||||
# CONFIG_EEPROM_93CX6 is not set
|
||||
CONFIG_HAVE_IDE=y
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
|
@ -569,7 +610,11 @@ CONFIG_SCSI_LOWLEVEL=y
|
|||
# CONFIG_MEGARAID_NEWGEN is not set
|
||||
# CONFIG_MEGARAID_LEGACY is not set
|
||||
# CONFIG_MEGARAID_SAS is not set
|
||||
# CONFIG_SCSI_MPT2SAS is not set
|
||||
# CONFIG_SCSI_HPTIOP is not set
|
||||
# CONFIG_LIBFC is not set
|
||||
# CONFIG_LIBFCOE is not set
|
||||
# CONFIG_FCOE is not set
|
||||
# CONFIG_SCSI_DMX3191D is not set
|
||||
# CONFIG_SCSI_FUTURE_DOMAIN is not set
|
||||
# CONFIG_SCSI_IPS is not set
|
||||
|
@ -589,6 +634,7 @@ CONFIG_SCSI_LOWLEVEL=y
|
|||
# CONFIG_SCSI_DEBUG is not set
|
||||
# CONFIG_SCSI_SRP is not set
|
||||
# CONFIG_SCSI_DH is not set
|
||||
# CONFIG_SCSI_OSD_INITIATOR is not set
|
||||
CONFIG_ATA=y
|
||||
# CONFIG_ATA_NONSTANDARD is not set
|
||||
CONFIG_SATA_PMP=y
|
||||
|
@ -663,6 +709,7 @@ CONFIG_SATA_MV=y
|
|||
# CONFIG_IEEE1394 is not set
|
||||
# CONFIG_I2O is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_COMPAT_NET_DEV_OPS=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_MACVLAN is not set
|
||||
|
@ -670,7 +717,26 @@ CONFIG_NETDEVICES=y
|
|||
# CONFIG_TUN is not set
|
||||
# CONFIG_VETH is not set
|
||||
# CONFIG_ARCNET is not set
|
||||
# CONFIG_PHYLIB is not set
|
||||
CONFIG_PHYLIB=y
|
||||
|
||||
#
|
||||
# MII PHY device drivers
|
||||
#
|
||||
CONFIG_MARVELL_PHY=y
|
||||
# CONFIG_DAVICOM_PHY is not set
|
||||
# CONFIG_QSEMI_PHY is not set
|
||||
# CONFIG_LXT_PHY is not set
|
||||
# CONFIG_CICADA_PHY is not set
|
||||
# CONFIG_VITESSE_PHY is not set
|
||||
# CONFIG_SMSC_PHY is not set
|
||||
# CONFIG_BROADCOM_PHY is not set
|
||||
# CONFIG_ICPLUS_PHY is not set
|
||||
# CONFIG_REALTEK_PHY is not set
|
||||
# CONFIG_NATIONAL_PHY is not set
|
||||
# CONFIG_STE10XP is not set
|
||||
# CONFIG_LSI_ET1011C_PHY is not set
|
||||
# CONFIG_FIXED_PHY is not set
|
||||
# CONFIG_MDIO_BITBANG is not set
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
# CONFIG_AX88796 is not set
|
||||
|
@ -680,19 +746,25 @@ CONFIG_MII=y
|
|||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
# CONFIG_SMC91X is not set
|
||||
# CONFIG_DM9000 is not set
|
||||
# CONFIG_ETHOC is not set
|
||||
# CONFIG_SMC911X is not set
|
||||
# CONFIG_SMSC911X is not set
|
||||
# CONFIG_DNET is not set
|
||||
# CONFIG_NET_TULIP is not set
|
||||
# CONFIG_HP100 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_ZMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_RGMII is not set
|
||||
# CONFIG_IBM_NEW_EMAC_TAH is not set
|
||||
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
|
||||
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
|
||||
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
|
||||
CONFIG_NET_PCI=y
|
||||
# CONFIG_PCNET32 is not set
|
||||
# CONFIG_AMD8111_ETH is not set
|
||||
# CONFIG_ADAPTEC_STARFIRE is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_FORCEDETH is not set
|
||||
# CONFIG_EEPRO100 is not set
|
||||
# CONFIG_E100 is not set
|
||||
# CONFIG_FEALNX is not set
|
||||
# CONFIG_NATSEMI is not set
|
||||
|
@ -702,10 +774,12 @@ CONFIG_NET_PCI=y
|
|||
# CONFIG_R6040 is not set
|
||||
# CONFIG_SIS900 is not set
|
||||
# CONFIG_EPIC100 is not set
|
||||
# CONFIG_SMSC9420 is not set
|
||||
# CONFIG_SUNDANCE is not set
|
||||
# CONFIG_TLAN is not set
|
||||
# CONFIG_VIA_RHINE is not set
|
||||
# CONFIG_SC92031 is not set
|
||||
# CONFIG_ATL2 is not set
|
||||
CONFIG_NETDEV_1000=y
|
||||
# CONFIG_ACENIC is not set
|
||||
# CONFIG_DL2K is not set
|
||||
|
@ -713,6 +787,7 @@ CONFIG_NETDEV_1000=y
|
|||
# CONFIG_E1000E is not set
|
||||
# CONFIG_IP1000 is not set
|
||||
# CONFIG_IGB is not set
|
||||
# CONFIG_IGBVF is not set
|
||||
# CONFIG_NS83820 is not set
|
||||
# CONFIG_HAMACHI is not set
|
||||
# CONFIG_YELLOWFIN is not set
|
||||
|
@ -727,6 +802,8 @@ CONFIG_MV643XX_ETH=y
|
|||
# CONFIG_QLA3XXX is not set
|
||||
# CONFIG_ATL1 is not set
|
||||
# CONFIG_ATL1E is not set
|
||||
# CONFIG_ATL1C is not set
|
||||
# CONFIG_JME is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
# CONFIG_TR is not set
|
||||
|
||||
|
@ -735,7 +812,10 @@ CONFIG_MV643XX_ETH=y
|
|||
#
|
||||
# CONFIG_WLAN_PRE80211 is not set
|
||||
# CONFIG_WLAN_80211 is not set
|
||||
# CONFIG_IWLWIFI_LEDS is not set
|
||||
|
||||
#
|
||||
# Enable WiMAX (Networking options) to see the WiMAX drivers
|
||||
#
|
||||
|
||||
#
|
||||
# USB Network Adapters
|
||||
|
@ -819,11 +899,11 @@ CONFIG_SERIAL_CORE=y
|
|||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
# CONFIG_SERIAL_JSM is not set
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=16
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_NVRAM is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_APPLICOM is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
@ -886,12 +966,9 @@ CONFIG_I2C_MV64XXX=y
|
|||
# Miscellaneous I2C Chip support
|
||||
#
|
||||
# CONFIG_DS1682 is not set
|
||||
# CONFIG_EEPROM_AT24 is not set
|
||||
# CONFIG_EEPROM_LEGACY is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_PCF8575 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_MAX6875 is not set
|
||||
# CONFIG_SENSORS_TSL2550 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
|
@ -911,14 +988,17 @@ CONFIG_HWMON=y
|
|||
# CONFIG_SENSORS_ADM1029 is not set
|
||||
# CONFIG_SENSORS_ADM1031 is not set
|
||||
# CONFIG_SENSORS_ADM9240 is not set
|
||||
# CONFIG_SENSORS_ADT7462 is not set
|
||||
# CONFIG_SENSORS_ADT7470 is not set
|
||||
# CONFIG_SENSORS_ADT7473 is not set
|
||||
# CONFIG_SENSORS_ADT7475 is not set
|
||||
# CONFIG_SENSORS_ATXP1 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_I5K_AMB is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_F71882FG is not set
|
||||
# CONFIG_SENSORS_F75375S is not set
|
||||
# CONFIG_SENSORS_G760A is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
|
@ -933,10 +1013,15 @@ CONFIG_SENSORS_LM75=y
|
|||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_LM92 is not set
|
||||
# CONFIG_SENSORS_LM93 is not set
|
||||
# CONFIG_SENSORS_LTC4215 is not set
|
||||
# CONFIG_SENSORS_LTC4245 is not set
|
||||
# CONFIG_SENSORS_LM95241 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_MAX6650 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_SHT15 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_DME1737 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
|
@ -956,12 +1041,14 @@ CONFIG_SENSORS_LM75=y
|
|||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
# CONFIG_THERMAL is not set
|
||||
# CONFIG_THERMAL_HWMON is not set
|
||||
# CONFIG_WATCHDOG is not set
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
|
||||
#
|
||||
# Sonics Silicon Backplane
|
||||
#
|
||||
CONFIG_SSB_POSSIBLE=y
|
||||
# CONFIG_SSB is not set
|
||||
|
||||
#
|
||||
|
@ -970,9 +1057,12 @@ CONFIG_SSB_POSSIBLE=y
|
|||
# CONFIG_MFD_CORE is not set
|
||||
# CONFIG_MFD_SM501 is not set
|
||||
# CONFIG_HTC_PASIC3 is not set
|
||||
# CONFIG_TWL4030_CORE is not set
|
||||
# CONFIG_MFD_TMIO is not set
|
||||
# CONFIG_MFD_T7L66XB is not set
|
||||
# CONFIG_MFD_TC6387XB is not set
|
||||
# CONFIG_PMIC_DA903X is not set
|
||||
# CONFIG_MFD_WM8400 is not set
|
||||
# CONFIG_MFD_WM8350_I2C is not set
|
||||
# CONFIG_MFD_PCF50633 is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
|
@ -1013,9 +1103,36 @@ CONFIG_HID=y
|
|||
# USB Input Devices
|
||||
#
|
||||
CONFIG_USB_HID=y
|
||||
# CONFIG_USB_HIDINPUT_POWERBOOK is not set
|
||||
# CONFIG_HID_FF is not set
|
||||
# CONFIG_HID_PID is not set
|
||||
# CONFIG_USB_HIDDEV is not set
|
||||
|
||||
#
|
||||
# Special HID drivers
|
||||
#
|
||||
# CONFIG_HID_A4TECH is not set
|
||||
# CONFIG_HID_APPLE is not set
|
||||
# CONFIG_HID_BELKIN is not set
|
||||
# CONFIG_HID_CHERRY is not set
|
||||
# CONFIG_HID_CHICONY is not set
|
||||
# CONFIG_HID_CYPRESS is not set
|
||||
# CONFIG_DRAGONRISE_FF is not set
|
||||
# CONFIG_HID_EZKEY is not set
|
||||
# CONFIG_HID_KYE is not set
|
||||
# CONFIG_HID_GYRATION is not set
|
||||
# CONFIG_HID_KENSINGTON is not set
|
||||
# CONFIG_HID_LOGITECH is not set
|
||||
# CONFIG_HID_MICROSOFT is not set
|
||||
# CONFIG_HID_MONTEREY is not set
|
||||
# CONFIG_HID_NTRIG is not set
|
||||
# CONFIG_HID_PANTHERLORD is not set
|
||||
# CONFIG_HID_PETALYNX is not set
|
||||
# CONFIG_HID_SAMSUNG is not set
|
||||
# CONFIG_HID_SONY is not set
|
||||
# CONFIG_HID_SUNPLUS is not set
|
||||
# CONFIG_GREENASIA_FF is not set
|
||||
# CONFIG_HID_TOPSEED is not set
|
||||
# CONFIG_THRUSTMASTER_FF is not set
|
||||
# CONFIG_ZEROPLUS_FF is not set
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USB_ARCH_HAS_HCD=y
|
||||
CONFIG_USB_ARCH_HAS_OHCI=y
|
||||
|
@ -1030,10 +1147,13 @@ CONFIG_USB=y
|
|||
CONFIG_USB_DEVICEFS=y
|
||||
CONFIG_USB_DEVICE_CLASS=y
|
||||
# CONFIG_USB_DYNAMIC_MINORS is not set
|
||||
# CONFIG_USB_SUSPEND is not set
|
||||
# CONFIG_USB_OTG is not set
|
||||
# CONFIG_USB_OTG_WHITELIST is not set
|
||||
# CONFIG_USB_OTG_BLACKLIST_HUB is not set
|
||||
# CONFIG_USB_MON is not set
|
||||
# CONFIG_USB_WUSB is not set
|
||||
# CONFIG_USB_WUSB_CBAF is not set
|
||||
|
||||
#
|
||||
# USB Host Controller Drivers
|
||||
|
@ -1042,12 +1162,15 @@ CONFIG_USB_DEVICE_CLASS=y
|
|||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_ROOT_HUB_TT=y
|
||||
CONFIG_USB_EHCI_TT_NEWSCHED=y
|
||||
# CONFIG_USB_OXU210HP_HCD is not set
|
||||
# CONFIG_USB_ISP116X_HCD is not set
|
||||
# CONFIG_USB_ISP1760_HCD is not set
|
||||
# CONFIG_USB_OHCI_HCD is not set
|
||||
# CONFIG_USB_UHCI_HCD is not set
|
||||
# CONFIG_USB_SL811_HCD is not set
|
||||
# CONFIG_USB_R8A66597_HCD is not set
|
||||
# CONFIG_USB_WHCI_HCD is not set
|
||||
# CONFIG_USB_HWA_HCD is not set
|
||||
|
||||
#
|
||||
# USB Device Class drivers
|
||||
|
@ -1055,20 +1178,20 @@ CONFIG_USB_EHCI_TT_NEWSCHED=y
|
|||
# CONFIG_USB_ACM is not set
|
||||
CONFIG_USB_PRINTER=y
|
||||
# CONFIG_USB_WDM is not set
|
||||
# CONFIG_USB_TMC is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may
|
||||
#
|
||||
|
||||
#
|
||||
# may also be needed; see USB_STORAGE Help for more information
|
||||
# also be needed; see USB_STORAGE Help for more info
|
||||
#
|
||||
CONFIG_USB_STORAGE=y
|
||||
# CONFIG_USB_STORAGE_DEBUG is not set
|
||||
CONFIG_USB_STORAGE_DATAFAB=y
|
||||
CONFIG_USB_STORAGE_FREECOM=y
|
||||
# CONFIG_USB_STORAGE_ISD200 is not set
|
||||
CONFIG_USB_STORAGE_DPCM=y
|
||||
# CONFIG_USB_STORAGE_USBAT is not set
|
||||
CONFIG_USB_STORAGE_SDDR09=y
|
||||
CONFIG_USB_STORAGE_SDDR55=y
|
||||
|
@ -1076,7 +1199,6 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
|
|||
# CONFIG_USB_STORAGE_ALAUDA is not set
|
||||
# CONFIG_USB_STORAGE_ONETOUCH is not set
|
||||
# CONFIG_USB_STORAGE_KARMA is not set
|
||||
# CONFIG_USB_STORAGE_SIERRA is not set
|
||||
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
|
||||
# CONFIG_USB_LIBUSUAL is not set
|
||||
|
||||
|
@ -1097,6 +1219,7 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
|
|||
# CONFIG_USB_EMI62 is not set
|
||||
# CONFIG_USB_EMI26 is not set
|
||||
# CONFIG_USB_ADUTUX is not set
|
||||
# CONFIG_USB_SEVSEG is not set
|
||||
# CONFIG_USB_RIO500 is not set
|
||||
# CONFIG_USB_LEGOTOWER is not set
|
||||
# CONFIG_USB_LCD is not set
|
||||
|
@ -1104,7 +1227,6 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
|
|||
# CONFIG_USB_LED is not set
|
||||
# CONFIG_USB_CYPRESS_CY7C63 is not set
|
||||
# CONFIG_USB_CYTHERM is not set
|
||||
# CONFIG_USB_PHIDGET is not set
|
||||
# CONFIG_USB_IDMOUSE is not set
|
||||
# CONFIG_USB_FTDI_ELAN is not set
|
||||
# CONFIG_USB_APPLEDISPLAY is not set
|
||||
|
@ -1114,8 +1236,18 @@ CONFIG_USB_STORAGE_JUMPSHOT=y
|
|||
# CONFIG_USB_IOWARRIOR is not set
|
||||
# CONFIG_USB_TEST is not set
|
||||
# CONFIG_USB_ISIGHTFW is not set
|
||||
# CONFIG_USB_VST is not set
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# OTG and related infrastructure
|
||||
#
|
||||
# CONFIG_USB_GPIO_VBUS is not set
|
||||
# CONFIG_NOP_USB_XCEIV is not set
|
||||
# CONFIG_UWB is not set
|
||||
# CONFIG_MMC is not set
|
||||
# CONFIG_MEMSTICK is not set
|
||||
# CONFIG_ACCESSIBILITY is not set
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
|
||||
|
@ -1124,7 +1256,10 @@ CONFIG_LEDS_CLASS=y
|
|||
#
|
||||
# CONFIG_LEDS_PCA9532 is not set
|
||||
CONFIG_LEDS_GPIO=y
|
||||
CONFIG_LEDS_GPIO_PLATFORM=y
|
||||
# CONFIG_LEDS_LP5521 is not set
|
||||
# CONFIG_LEDS_PCA955X is not set
|
||||
# CONFIG_LEDS_BD2802 is not set
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
|
@ -1132,7 +1267,12 @@ CONFIG_LEDS_GPIO=y
|
|||
CONFIG_LEDS_TRIGGERS=y
|
||||
CONFIG_LEDS_TRIGGER_TIMER=y
|
||||
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
|
||||
# CONFIG_LEDS_TRIGGER_BACKLIGHT is not set
|
||||
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
|
||||
|
||||
#
|
||||
# iptables trigger is under Netfilter config (LED target)
|
||||
#
|
||||
CONFIG_RTC_LIB=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_HCTOSYS=y
|
||||
|
@ -1164,6 +1304,7 @@ CONFIG_RTC_DRV_M41T80=y
|
|||
# CONFIG_RTC_DRV_M41T80_WDT is not set
|
||||
CONFIG_RTC_DRV_S35390A=y
|
||||
# CONFIG_RTC_DRV_FM3130 is not set
|
||||
# CONFIG_RTC_DRV_RX8581 is not set
|
||||
|
||||
#
|
||||
# SPI RTC drivers
|
||||
|
@ -1173,12 +1314,15 @@ CONFIG_RTC_DRV_S35390A=y
|
|||
# Platform RTC drivers
|
||||
#
|
||||
# CONFIG_RTC_DRV_CMOS is not set
|
||||
# CONFIG_RTC_DRV_DS1286 is not set
|
||||
# CONFIG_RTC_DRV_DS1511 is not set
|
||||
# CONFIG_RTC_DRV_DS1553 is not set
|
||||
# CONFIG_RTC_DRV_DS1742 is not set
|
||||
# CONFIG_RTC_DRV_STK17TA8 is not set
|
||||
CONFIG_RTC_DRV_M48T86=y
|
||||
# CONFIG_RTC_DRV_M48T35 is not set
|
||||
# CONFIG_RTC_DRV_M48T59 is not set
|
||||
# CONFIG_RTC_DRV_BQ4802 is not set
|
||||
# CONFIG_RTC_DRV_V3020 is not set
|
||||
|
||||
#
|
||||
|
@ -1196,16 +1340,12 @@ CONFIG_DMA_ENGINE=y
|
|||
# DMA Clients
|
||||
#
|
||||
# CONFIG_NET_DMA is not set
|
||||
# CONFIG_ASYNC_TX_DMA is not set
|
||||
# CONFIG_DMATEST is not set
|
||||
|
||||
#
|
||||
# Voltage and Current regulators
|
||||
#
|
||||
# CONFIG_AUXDISPLAY is not set
|
||||
# CONFIG_REGULATOR is not set
|
||||
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
|
||||
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
|
||||
# CONFIG_REGULATOR_BQ24022 is not set
|
||||
# CONFIG_UIO is not set
|
||||
# CONFIG_STAGING is not set
|
||||
|
||||
#
|
||||
# File systems
|
||||
|
@ -1214,14 +1354,25 @@ CONFIG_EXT2_FS=y
|
|||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
# CONFIG_EXT2_FS_XIP is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
CONFIG_EXT4_FS=m
|
||||
# CONFIG_EXT4DEV_COMPAT is not set
|
||||
CONFIG_EXT4_FS_XATTR=y
|
||||
# CONFIG_EXT4_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT4_FS_SECURITY is not set
|
||||
CONFIG_JBD=y
|
||||
# CONFIG_JBD_DEBUG is not set
|
||||
CONFIG_JBD2=m
|
||||
# CONFIG_JBD2_DEBUG is not set
|
||||
CONFIG_FS_MBCACHE=m
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
CONFIG_FILE_LOCKING=y
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_BTRFS_FS is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
|
@ -1230,6 +1381,11 @@ CONFIG_INOTIFY_USER=y
|
|||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# Caches
|
||||
#
|
||||
# CONFIG_FSCACHE is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
|
@ -1254,15 +1410,13 @@ CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
|
|||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_SYSFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_POSIX_ACL is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
CONFIG_MISC_FILESYSTEMS=y
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
|
@ -1282,6 +1436,7 @@ CONFIG_JFFS2_ZLIB=y
|
|||
CONFIG_JFFS2_RTIME=y
|
||||
# CONFIG_JFFS2_RUBIN is not set
|
||||
CONFIG_CRAMFS=y
|
||||
# CONFIG_SQUASHFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_OMFS_FS is not set
|
||||
|
@ -1290,6 +1445,7 @@ CONFIG_CRAMFS=y
|
|||
# CONFIG_ROMFS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
# CONFIG_NILFS2_FS is not set
|
||||
CONFIG_NETWORK_FILESYSTEMS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
|
@ -1381,13 +1537,16 @@ CONFIG_ENABLE_MUST_CHECK=y
|
|||
CONFIG_FRAME_WARN=1024
|
||||
CONFIG_MAGIC_SYSRQ=y
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
CONFIG_DEBUG_FS=y
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
# CONFIG_DEBUG_SHIRQ is not set
|
||||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set
|
||||
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0
|
||||
CONFIG_DETECT_HUNG_TASK=y
|
||||
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
|
||||
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
|
||||
CONFIG_SCHED_DEBUG=y
|
||||
CONFIG_SCHEDSTATS=y
|
||||
# CONFIG_TIMER_STATS is not set
|
||||
|
@ -1411,25 +1570,46 @@ CONFIG_DEBUG_INFO=y
|
|||
# CONFIG_DEBUG_MEMORY_INIT is not set
|
||||
# CONFIG_DEBUG_LIST is not set
|
||||
# CONFIG_DEBUG_SG is not set
|
||||
# CONFIG_DEBUG_NOTIFIERS is not set
|
||||
CONFIG_FRAME_POINTER=y
|
||||
# CONFIG_BOOT_PRINTK_DELAY is not set
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
# CONFIG_KPROBES_SANITY_TEST is not set
|
||||
# CONFIG_BACKTRACE_SELF_TEST is not set
|
||||
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
|
||||
# CONFIG_LKDTM is not set
|
||||
# CONFIG_FAULT_INJECTION is not set
|
||||
CONFIG_LATENCYTOP=y
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_HAVE_FTRACE=y
|
||||
CONFIG_HAVE_DYNAMIC_FTRACE=y
|
||||
# CONFIG_FTRACE is not set
|
||||
# CONFIG_PAGE_POISONING is not set
|
||||
CONFIG_NOP_TRACER=y
|
||||
CONFIG_HAVE_FUNCTION_TRACER=y
|
||||
CONFIG_RING_BUFFER=y
|
||||
CONFIG_TRACING=y
|
||||
CONFIG_TRACING_SUPPORT=y
|
||||
|
||||
#
|
||||
# Tracers
|
||||
#
|
||||
# CONFIG_FUNCTION_TRACER is not set
|
||||
# CONFIG_IRQSOFF_TRACER is not set
|
||||
# CONFIG_PREEMPT_TRACER is not set
|
||||
# CONFIG_SCHED_TRACER is not set
|
||||
# CONFIG_CONTEXT_SWITCH_TRACER is not set
|
||||
# CONFIG_EVENT_TRACER is not set
|
||||
# CONFIG_BOOT_TRACER is not set
|
||||
# CONFIG_TRACE_BRANCH_PROFILING is not set
|
||||
# CONFIG_STACK_TRACER is not set
|
||||
# CONFIG_KMEMTRACE is not set
|
||||
# CONFIG_WORKQUEUE_TRACER is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_FTRACE_STARTUP_TEST is not set
|
||||
# CONFIG_DYNAMIC_DEBUG is not set
|
||||
# CONFIG_SAMPLES is not set
|
||||
CONFIG_HAVE_ARCH_KGDB=y
|
||||
# CONFIG_KGDB is not set
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_DEBUG_USER=y
|
||||
CONFIG_DEBUG_ERRORS=y
|
||||
# CONFIG_DEBUG_STACK_USAGE is not set
|
||||
|
@ -1441,18 +1621,27 @@ CONFIG_DEBUG_LL=y
|
|||
#
|
||||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
# CONFIG_SECURITYFS is not set
|
||||
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
|
||||
CONFIG_ASYNC_CORE=y
|
||||
CONFIG_CRYPTO=y
|
||||
|
||||
#
|
||||
# Crypto core or helper
|
||||
#
|
||||
# CONFIG_CRYPTO_FIPS is not set
|
||||
CONFIG_CRYPTO_ALGAPI=m
|
||||
CONFIG_CRYPTO_ALGAPI2=m
|
||||
CONFIG_CRYPTO_AEAD2=m
|
||||
CONFIG_CRYPTO_BLKCIPHER=m
|
||||
CONFIG_CRYPTO_BLKCIPHER2=m
|
||||
CONFIG_CRYPTO_HASH2=m
|
||||
CONFIG_CRYPTO_RNG2=m
|
||||
CONFIG_CRYPTO_PCOMP=m
|
||||
CONFIG_CRYPTO_MANAGER=m
|
||||
CONFIG_CRYPTO_MANAGER2=m
|
||||
# CONFIG_CRYPTO_GF128MUL is not set
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
CONFIG_CRYPTO_WORKQUEUE=m
|
||||
# CONFIG_CRYPTO_CRYPTD is not set
|
||||
# CONFIG_CRYPTO_AUTHENC is not set
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
|
@ -1521,18 +1710,24 @@ CONFIG_CRYPTO_PCBC=m
|
|||
# Compression
|
||||
#
|
||||
# CONFIG_CRYPTO_DEFLATE is not set
|
||||
# CONFIG_CRYPTO_ZLIB is not set
|
||||
# CONFIG_CRYPTO_LZO is not set
|
||||
|
||||
#
|
||||
# Random Number Generation
|
||||
#
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
CONFIG_CRYPTO_HW=y
|
||||
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
|
||||
CONFIG_BINARY_PRINTF=y
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_GENERIC_FIND_FIRST_BIT is not set
|
||||
# CONFIG_GENERIC_FIND_NEXT_BIT is not set
|
||||
CONFIG_GENERIC_FIND_LAST_BIT=y
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
CONFIG_CRC16=m
|
||||
CONFIG_CRC_T10DIF=y
|
||||
CONFIG_CRC_ITU_T=m
|
||||
CONFIG_CRC32=y
|
||||
|
@ -1540,7 +1735,7 @@ CONFIG_CRC32=y
|
|||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
CONFIG_ZLIB_DEFLATE=y
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_NLATTR=y
|
||||
|
|
|
@ -298,7 +298,6 @@ CONFIG_CPU_FREQ_GOV_POWERSAVE=m
|
|||
CONFIG_CPU_FREQ_GOV_USERSPACE=m
|
||||
CONFIG_CPU_FREQ_GOV_ONDEMAND=m
|
||||
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=m
|
||||
CONFIG_CPU_FREQ_PXA=y
|
||||
|
||||
#
|
||||
# Floating point emulation
|
||||
|
|
|
@ -114,3 +114,16 @@
|
|||
.align 3; \
|
||||
.long 9999b,9001f; \
|
||||
.previous
|
||||
|
||||
/*
|
||||
* SMP data memory barrier
|
||||
*/
|
||||
.macro smp_dmb
|
||||
#ifdef CONFIG_SMP
|
||||
#if __LINUX_ARM_ARCH__ >= 7
|
||||
dmb
|
||||
#elif __LINUX_ARM_ARCH__ == 6
|
||||
mcr p15, 0, r0, c7, c10, 5 @ dmb
|
||||
#endif
|
||||
#endif
|
||||
.endm
|
||||
|
|
|
@ -44,11 +44,29 @@ static inline void atomic_set(atomic_t *v, int i)
|
|||
: "cc");
|
||||
}
|
||||
|
||||
static inline void atomic_add(int i, atomic_t *v)
|
||||
{
|
||||
unsigned long tmp;
|
||||
int result;
|
||||
|
||||
__asm__ __volatile__("@ atomic_add\n"
|
||||
"1: ldrex %0, [%2]\n"
|
||||
" add %0, %0, %3\n"
|
||||
" strex %1, %0, [%2]\n"
|
||||
" teq %1, #0\n"
|
||||
" bne 1b"
|
||||
: "=&r" (result), "=&r" (tmp)
|
||||
: "r" (&v->counter), "Ir" (i)
|
||||
: "cc");
|
||||
}
|
||||
|
||||
static inline int atomic_add_return(int i, atomic_t *v)
|
||||
{
|
||||
unsigned long tmp;
|
||||
int result;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__("@ atomic_add_return\n"
|
||||
"1: ldrex %0, [%2]\n"
|
||||
" add %0, %0, %3\n"
|
||||
|
@ -59,14 +77,34 @@ static inline int atomic_add_return(int i, atomic_t *v)
|
|||
: "r" (&v->counter), "Ir" (i)
|
||||
: "cc");
|
||||
|
||||
smp_mb();
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static inline void atomic_sub(int i, atomic_t *v)
|
||||
{
|
||||
unsigned long tmp;
|
||||
int result;
|
||||
|
||||
__asm__ __volatile__("@ atomic_sub\n"
|
||||
"1: ldrex %0, [%2]\n"
|
||||
" sub %0, %0, %3\n"
|
||||
" strex %1, %0, [%2]\n"
|
||||
" teq %1, #0\n"
|
||||
" bne 1b"
|
||||
: "=&r" (result), "=&r" (tmp)
|
||||
: "r" (&v->counter), "Ir" (i)
|
||||
: "cc");
|
||||
}
|
||||
|
||||
static inline int atomic_sub_return(int i, atomic_t *v)
|
||||
{
|
||||
unsigned long tmp;
|
||||
int result;
|
||||
|
||||
smp_mb();
|
||||
|
||||
__asm__ __volatile__("@ atomic_sub_return\n"
|
||||
"1: ldrex %0, [%2]\n"
|
||||
" sub %0, %0, %3\n"
|
||||
|
@ -77,6 +115,8 @@ static inline int atomic_sub_return(int i, atomic_t *v)
|
|||
: "r" (&v->counter), "Ir" (i)
|
||||
: "cc");
|
||||
|
||||
smp_mb();
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
|
@ -84,6 +124,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
|
|||
{
|
||||
unsigned long oldval, res;
|
||||
|
||||
smp_mb();
|
||||
|
||||
do {
|
||||
__asm__ __volatile__("@ atomic_cmpxchg\n"
|
||||
"ldrex %1, [%2]\n"
|
||||
|
@ -95,6 +137,8 @@ static inline int atomic_cmpxchg(atomic_t *ptr, int old, int new)
|
|||
: "cc");
|
||||
} while (res);
|
||||
|
||||
smp_mb();
|
||||
|
||||
return oldval;
|
||||
}
|
||||
|
||||
|
@ -135,6 +179,7 @@ static inline int atomic_add_return(int i, atomic_t *v)
|
|||
|
||||
return val;
|
||||
}
|
||||
#define atomic_add(i, v) (void) atomic_add_return(i, v)
|
||||
|
||||
static inline int atomic_sub_return(int i, atomic_t *v)
|
||||
{
|
||||
|
@ -148,6 +193,7 @@ static inline int atomic_sub_return(int i, atomic_t *v)
|
|||
|
||||
return val;
|
||||
}
|
||||
#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
|
||||
|
||||
static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
|
||||
{
|
||||
|
@ -187,10 +233,8 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
|
|||
}
|
||||
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
|
||||
|
||||
#define atomic_add(i, v) (void) atomic_add_return(i, v)
|
||||
#define atomic_inc(v) (void) atomic_add_return(1, v)
|
||||
#define atomic_sub(i, v) (void) atomic_sub_return(i, v)
|
||||
#define atomic_dec(v) (void) atomic_sub_return(1, v)
|
||||
#define atomic_inc(v) atomic_add(1, v)
|
||||
#define atomic_dec(v) atomic_sub(1, v)
|
||||
|
||||
#define atomic_inc_and_test(v) (atomic_add_return(1, v) == 0)
|
||||
#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
|
||||
|
@ -200,11 +244,10 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
|
|||
|
||||
#define atomic_add_negative(i,v) (atomic_add_return(i, v) < 0)
|
||||
|
||||
/* Atomic operations are already serializing on ARM */
|
||||
#define smp_mb__before_atomic_dec() barrier()
|
||||
#define smp_mb__after_atomic_dec() barrier()
|
||||
#define smp_mb__before_atomic_inc() barrier()
|
||||
#define smp_mb__after_atomic_inc() barrier()
|
||||
#define smp_mb__before_atomic_dec() smp_mb()
|
||||
#define smp_mb__after_atomic_dec() smp_mb()
|
||||
#define smp_mb__before_atomic_inc() smp_mb()
|
||||
#define smp_mb__after_atomic_inc() smp_mb()
|
||||
|
||||
#include <asm-generic/atomic.h>
|
||||
#endif
|
||||
|
|
|
@ -7,4 +7,20 @@
|
|||
#define L1_CACHE_SHIFT 5
|
||||
#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
|
||||
|
||||
/*
|
||||
* Memory returned by kmalloc() may be used for DMA, so we must make
|
||||
* sure that all such allocations are cache aligned. Otherwise,
|
||||
* unrelated code may cause parts of the buffer to be read into the
|
||||
* cache before the transfer is done, causing old data to be seen by
|
||||
* the CPU.
|
||||
*/
|
||||
#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
|
||||
|
||||
/*
|
||||
* With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
|
||||
*/
|
||||
#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
|
||||
#define ARCH_SLAB_MINALIGN 8
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -45,13 +45,15 @@ typedef struct user_fp elf_fpregset_t;
|
|||
#define EF_ARM_HASENTRY 0x00000002 /* All */
|
||||
#define EF_ARM_RELEXEC 0x00000001 /* All */
|
||||
|
||||
#define R_ARM_NONE 0
|
||||
#define R_ARM_PC24 1
|
||||
#define R_ARM_ABS32 2
|
||||
#define R_ARM_CALL 28
|
||||
#define R_ARM_JUMP24 29
|
||||
#define R_ARM_V4BX 40
|
||||
#define R_ARM_PREL31 42
|
||||
#define R_ARM_NONE 0
|
||||
#define R_ARM_PC24 1
|
||||
#define R_ARM_ABS32 2
|
||||
#define R_ARM_CALL 28
|
||||
#define R_ARM_JUMP24 29
|
||||
#define R_ARM_V4BX 40
|
||||
#define R_ARM_PREL31 42
|
||||
#define R_ARM_MOVW_ABS_NC 43
|
||||
#define R_ARM_MOVT_ABS 44
|
||||
|
||||
/*
|
||||
* These are used to set parameters in the core dumps.
|
||||
|
|
|
@ -5,9 +5,6 @@
|
|||
#ifndef __ARM_FLAT_H__
|
||||
#define __ARM_FLAT_H__
|
||||
|
||||
/* An odd number of words will be pushed after this alignment, so
|
||||
deliberately misalign the value. */
|
||||
#define flat_stack_align(sp) sp = (void *)(((unsigned long)(sp) - 4) | 4)
|
||||
#define flat_argvp_envp_on_stack() 1
|
||||
#define flat_old_ram_flag(flags) (flags)
|
||||
#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);
|
||||
void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
|
||||
void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
|
||||
void gic_raise_softirq(cpumask_t cpumask, unsigned int irq);
|
||||
void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -202,13 +202,6 @@ typedef struct page *pgtable_t;
|
|||
(((current->personality & READ_IMPLIES_EXEC) ? VM_EXEC : 0) | \
|
||||
VM_READ | VM_WRITE | VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
|
||||
|
||||
/*
|
||||
* With EABI on ARMv5 and above we must have 64-bit aligned slab pointers.
|
||||
*/
|
||||
#if defined(CONFIG_AEABI) && (__LINUX_ARM_ARCH__ >= 5)
|
||||
#define ARCH_SLAB_MINALIGN 8
|
||||
#endif
|
||||
|
||||
#include <asm-generic/page.h>
|
||||
|
||||
#endif
|
||||
|
|
|
@ -53,17 +53,12 @@ extern void smp_store_cpu_info(unsigned int cpuid);
|
|||
/*
|
||||
* Raise an IPI cross call on CPUs in callmap.
|
||||
*/
|
||||
extern void smp_cross_call(cpumask_t callmap);
|
||||
|
||||
/*
|
||||
* Broadcast a timer interrupt to the other CPUs.
|
||||
*/
|
||||
extern void smp_send_timer(void);
|
||||
extern void smp_cross_call(const struct cpumask *mask);
|
||||
|
||||
/*
|
||||
* Broadcast a clock event to other CPUs.
|
||||
*/
|
||||
extern void smp_timer_broadcast(cpumask_t mask);
|
||||
extern void smp_timer_broadcast(const struct cpumask *mask);
|
||||
|
||||
/*
|
||||
* Boot a secondary CPU, and assign it the specified idle task.
|
||||
|
@ -102,7 +97,8 @@ extern int platform_cpu_kill(unsigned int cpu);
|
|||
extern void platform_cpu_enable(unsigned int cpu);
|
||||
|
||||
extern void arch_send_call_function_single_ipi(int cpu);
|
||||
extern void arch_send_call_function_ipi(cpumask_t mask);
|
||||
extern void arch_send_call_function_ipi_mask(const struct cpumask *mask);
|
||||
#define arch_send_call_function_ipi_mask arch_send_call_function_ipi_mask
|
||||
|
||||
/*
|
||||
* Local timer interrupt handling function (can be IPI'ed).
|
||||
|
|
|
@ -248,6 +248,8 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
|
|||
unsigned int tmp;
|
||||
#endif
|
||||
|
||||
smp_mb();
|
||||
|
||||
switch (size) {
|
||||
#if __LINUX_ARM_ARCH__ >= 6
|
||||
case 1:
|
||||
|
@ -307,6 +309,7 @@ static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size
|
|||
__bad_xchg(ptr, size), ret = 0;
|
||||
break;
|
||||
}
|
||||
smp_mb();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -316,6 +319,12 @@ extern void enable_hlt(void);
|
|||
|
||||
#include <asm-generic/cmpxchg-local.h>
|
||||
|
||||
#if __LINUX_ARM_ARCH__ < 6
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#error "SMP is not supported on this platform"
|
||||
#endif
|
||||
|
||||
/*
|
||||
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
|
||||
* them available.
|
||||
|
@ -329,6 +338,173 @@ extern void enable_hlt(void);
|
|||
#include <asm-generic/cmpxchg.h>
|
||||
#endif
|
||||
|
||||
#else /* __LINUX_ARM_ARCH__ >= 6 */
|
||||
|
||||
extern void __bad_cmpxchg(volatile void *ptr, int size);
|
||||
|
||||
/*
|
||||
* cmpxchg only support 32-bits operands on ARMv6.
|
||||
*/
|
||||
|
||||
static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
|
||||
unsigned long new, int size)
|
||||
{
|
||||
unsigned long oldval, res;
|
||||
|
||||
switch (size) {
|
||||
#ifdef CONFIG_CPU_32v6K
|
||||
case 1:
|
||||
do {
|
||||
asm volatile("@ __cmpxchg1\n"
|
||||
" ldrexb %1, [%2]\n"
|
||||
" mov %0, #0\n"
|
||||
" teq %1, %3\n"
|
||||
" strexbeq %0, %4, [%2]\n"
|
||||
: "=&r" (res), "=&r" (oldval)
|
||||
: "r" (ptr), "Ir" (old), "r" (new)
|
||||
: "memory", "cc");
|
||||
} while (res);
|
||||
break;
|
||||
case 2:
|
||||
do {
|
||||
asm volatile("@ __cmpxchg1\n"
|
||||
" ldrexh %1, [%2]\n"
|
||||
" mov %0, #0\n"
|
||||
" teq %1, %3\n"
|
||||
" strexheq %0, %4, [%2]\n"
|
||||
: "=&r" (res), "=&r" (oldval)
|
||||
: "r" (ptr), "Ir" (old), "r" (new)
|
||||
: "memory", "cc");
|
||||
} while (res);
|
||||
break;
|
||||
#endif /* CONFIG_CPU_32v6K */
|
||||
case 4:
|
||||
do {
|
||||
asm volatile("@ __cmpxchg4\n"
|
||||
" ldrex %1, [%2]\n"
|
||||
" mov %0, #0\n"
|
||||
" teq %1, %3\n"
|
||||
" strexeq %0, %4, [%2]\n"
|
||||
: "=&r" (res), "=&r" (oldval)
|
||||
: "r" (ptr), "Ir" (old), "r" (new)
|
||||
: "memory", "cc");
|
||||
} while (res);
|
||||
break;
|
||||
default:
|
||||
__bad_cmpxchg(ptr, size);
|
||||
oldval = 0;
|
||||
}
|
||||
|
||||
return oldval;
|
||||
}
|
||||
|
||||
static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
|
||||
unsigned long new, int size)
|
||||
{
|
||||
unsigned long ret;
|
||||
|
||||
smp_mb();
|
||||
ret = __cmpxchg(ptr, old, new, size);
|
||||
smp_mb();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define cmpxchg(ptr,o,n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg_mb((ptr), \
|
||||
(unsigned long)(o), \
|
||||
(unsigned long)(n), \
|
||||
sizeof(*(ptr))))
|
||||
|
||||
static inline unsigned long __cmpxchg_local(volatile void *ptr,
|
||||
unsigned long old,
|
||||
unsigned long new, int size)
|
||||
{
|
||||
unsigned long ret;
|
||||
|
||||
switch (size) {
|
||||
#ifndef CONFIG_CPU_32v6K
|
||||
case 1:
|
||||
case 2:
|
||||
ret = __cmpxchg_local_generic(ptr, old, new, size);
|
||||
break;
|
||||
#endif /* !CONFIG_CPU_32v6K */
|
||||
default:
|
||||
ret = __cmpxchg(ptr, old, new, size);
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define cmpxchg_local(ptr,o,n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg_local((ptr), \
|
||||
(unsigned long)(o), \
|
||||
(unsigned long)(n), \
|
||||
sizeof(*(ptr))))
|
||||
|
||||
#ifdef CONFIG_CPU_32v6K
|
||||
|
||||
/*
|
||||
* Note : ARMv7-M (currently unsupported by Linux) does not support
|
||||
* ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should
|
||||
* not be allowed to use __cmpxchg64.
|
||||
*/
|
||||
static inline unsigned long long __cmpxchg64(volatile void *ptr,
|
||||
unsigned long long old,
|
||||
unsigned long long new)
|
||||
{
|
||||
register unsigned long long oldval asm("r0");
|
||||
register unsigned long long __old asm("r2") = old;
|
||||
register unsigned long long __new asm("r4") = new;
|
||||
unsigned long res;
|
||||
|
||||
do {
|
||||
asm volatile(
|
||||
" @ __cmpxchg8\n"
|
||||
" ldrexd %1, %H1, [%2]\n"
|
||||
" mov %0, #0\n"
|
||||
" teq %1, %3\n"
|
||||
" teqeq %H1, %H3\n"
|
||||
" strexdeq %0, %4, %H4, [%2]\n"
|
||||
: "=&r" (res), "=&r" (oldval)
|
||||
: "r" (ptr), "Ir" (__old), "r" (__new)
|
||||
: "memory", "cc");
|
||||
} while (res);
|
||||
|
||||
return oldval;
|
||||
}
|
||||
|
||||
static inline unsigned long long __cmpxchg64_mb(volatile void *ptr,
|
||||
unsigned long long old,
|
||||
unsigned long long new)
|
||||
{
|
||||
unsigned long long ret;
|
||||
|
||||
smp_mb();
|
||||
ret = __cmpxchg64(ptr, old, new);
|
||||
smp_mb();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
#define cmpxchg64(ptr,o,n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg64_mb((ptr), \
|
||||
(unsigned long long)(o), \
|
||||
(unsigned long long)(n)))
|
||||
|
||||
#define cmpxchg64_local(ptr,o,n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg64((ptr), \
|
||||
(unsigned long long)(o), \
|
||||
(unsigned long long)(n)))
|
||||
|
||||
#else /* !CONFIG_CPU_32v6K */
|
||||
|
||||
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
|
||||
|
||||
#endif /* CONFIG_CPU_32v6K */
|
||||
|
||||
#endif /* __LINUX_ARM_ARCH__ >= 6 */
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#define arch_align_stack(x) (x)
|
||||
|
|
|
@ -387,6 +387,8 @@
|
|||
#define __NR_dup3 (__NR_SYSCALL_BASE+358)
|
||||
#define __NR_pipe2 (__NR_SYSCALL_BASE+359)
|
||||
#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360)
|
||||
#define __NR_preadv (__NR_SYSCALL_BASE+361)
|
||||
#define __NR_pwritev (__NR_SYSCALL_BASE+362)
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
|
|
|
@ -370,6 +370,8 @@
|
|||
CALL(sys_dup3)
|
||||
CALL(sys_pipe2)
|
||||
/* 360 */ CALL(sys_inotify_init1)
|
||||
CALL(sys_preadv)
|
||||
CALL(sys_pwritev)
|
||||
#ifndef syscalls_counted
|
||||
.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
|
||||
#define syscalls_counted
|
||||
|
|
|
@ -78,6 +78,15 @@ int arm_elf_read_implies_exec(const struct elf32_hdr *x, int executable_stack)
|
|||
return 1;
|
||||
if (cpu_architecture() < CPU_ARCH_ARMv6)
|
||||
return 1;
|
||||
#if !defined(CONFIG_AEABI) || defined(CONFIG_OABI_COMPAT)
|
||||
/*
|
||||
* If we have support for OABI programs, we can never allow NX
|
||||
* support - our signal syscall restart mechanism relies upon
|
||||
* being able to execute code placed on the user stack.
|
||||
*/
|
||||
return 1;
|
||||
#else
|
||||
return 0;
|
||||
#endif
|
||||
}
|
||||
EXPORT_SYMBOL(arm_elf_read_implies_exec);
|
||||
|
|
|
@ -815,10 +815,7 @@ __kuser_helper_start:
|
|||
*/
|
||||
|
||||
__kuser_memory_barrier: @ 0xffff0fa0
|
||||
|
||||
#if __LINUX_ARM_ARCH__ >= 6 && defined(CONFIG_SMP)
|
||||
mcr p15, 0, r0, c7, c10, 5 @ dmb
|
||||
#endif
|
||||
smp_dmb
|
||||
usr_ret lr
|
||||
|
||||
.align 5
|
||||
|
|
|
@ -169,6 +169,21 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
|
|||
*(u32 *)loc = offset & 0x7fffffff;
|
||||
break;
|
||||
|
||||
case R_ARM_MOVW_ABS_NC:
|
||||
case R_ARM_MOVT_ABS:
|
||||
offset = *(u32 *)loc;
|
||||
offset = ((offset & 0xf0000) >> 4) | (offset & 0xfff);
|
||||
offset = (offset ^ 0x8000) - 0x8000;
|
||||
|
||||
offset += sym->st_value;
|
||||
if (ELF32_R_TYPE(rel->r_info) == R_ARM_MOVT_ABS)
|
||||
offset >>= 16;
|
||||
|
||||
*(u32 *)loc &= 0xfff0f000;
|
||||
*(u32 *)loc |= ((offset & 0xf000) << 4) |
|
||||
(offset & 0x0fff);
|
||||
break;
|
||||
|
||||
default:
|
||||
printk(KERN_ERR "%s: unknown relocation: %u\n",
|
||||
module->name, ELF32_R_TYPE(rel->r_info));
|
||||
|
|
|
@ -326,14 +326,14 @@ void __init smp_prepare_boot_cpu(void)
|
|||
per_cpu(cpu_data, cpu).idle = current;
|
||||
}
|
||||
|
||||
static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
|
||||
static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg)
|
||||
{
|
||||
unsigned long flags;
|
||||
unsigned int cpu;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
for_each_cpu_mask(cpu, callmap) {
|
||||
for_each_cpu(cpu, mask) {
|
||||
struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
|
||||
|
||||
spin_lock(&ipi->lock);
|
||||
|
@ -344,19 +344,19 @@ static void send_ipi_message(cpumask_t callmap, enum ipi_msg_type msg)
|
|||
/*
|
||||
* Call the platform specific cross-CPU call function.
|
||||
*/
|
||||
smp_cross_call(callmap);
|
||||
smp_cross_call(mask);
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
void arch_send_call_function_ipi(cpumask_t mask)
|
||||
void arch_send_call_function_ipi_mask(const struct cpumask *mask)
|
||||
{
|
||||
send_ipi_message(mask, IPI_CALL_FUNC);
|
||||
}
|
||||
|
||||
void arch_send_call_function_single_ipi(int cpu)
|
||||
{
|
||||
send_ipi_message(cpumask_of_cpu(cpu), IPI_CALL_FUNC_SINGLE);
|
||||
send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
|
||||
}
|
||||
|
||||
void show_ipi_list(struct seq_file *p)
|
||||
|
@ -498,17 +498,10 @@ asmlinkage void __exception do_IPI(struct pt_regs *regs)
|
|||
|
||||
void smp_send_reschedule(int cpu)
|
||||
{
|
||||
send_ipi_message(cpumask_of_cpu(cpu), IPI_RESCHEDULE);
|
||||
send_ipi_message(cpumask_of(cpu), IPI_RESCHEDULE);
|
||||
}
|
||||
|
||||
void smp_send_timer(void)
|
||||
{
|
||||
cpumask_t mask = cpu_online_map;
|
||||
cpu_clear(smp_processor_id(), mask);
|
||||
send_ipi_message(mask, IPI_TIMER);
|
||||
}
|
||||
|
||||
void smp_timer_broadcast(cpumask_t mask)
|
||||
void smp_timer_broadcast(const struct cpumask *mask)
|
||||
{
|
||||
send_ipi_message(mask, IPI_TIMER);
|
||||
}
|
||||
|
@ -517,7 +510,7 @@ void smp_send_stop(void)
|
|||
{
|
||||
cpumask_t mask = cpu_online_map;
|
||||
cpu_clear(smp_processor_id(), mask);
|
||||
send_ipi_message(mask, IPI_CPU_STOP);
|
||||
send_ipi_message(&mask, IPI_CPU_STOP);
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -528,20 +521,17 @@ int setup_profiling_timer(unsigned int multiplier)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
static int
|
||||
on_each_cpu_mask(void (*func)(void *), void *info, int wait, cpumask_t mask)
|
||||
static void
|
||||
on_each_cpu_mask(void (*func)(void *), void *info, int wait,
|
||||
const struct cpumask *mask)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
preempt_disable();
|
||||
|
||||
ret = smp_call_function_mask(mask, func, info, wait);
|
||||
if (cpu_isset(smp_processor_id(), mask))
|
||||
smp_call_function_many(mask, func, info, wait);
|
||||
if (cpumask_test_cpu(smp_processor_id(), mask))
|
||||
func(info);
|
||||
|
||||
preempt_enable();
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**********************************************************************/
|
||||
|
@ -602,20 +592,17 @@ void flush_tlb_all(void)
|
|||
|
||||
void flush_tlb_mm(struct mm_struct *mm)
|
||||
{
|
||||
cpumask_t mask = mm->cpu_vm_mask;
|
||||
|
||||
on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, mask);
|
||||
on_each_cpu_mask(ipi_flush_tlb_mm, mm, 1, &mm->cpu_vm_mask);
|
||||
}
|
||||
|
||||
void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
|
||||
{
|
||||
cpumask_t mask = vma->vm_mm->cpu_vm_mask;
|
||||
struct tlb_args ta;
|
||||
|
||||
ta.ta_vma = vma;
|
||||
ta.ta_start = uaddr;
|
||||
|
||||
on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, mask);
|
||||
on_each_cpu_mask(ipi_flush_tlb_page, &ta, 1, &vma->vm_mm->cpu_vm_mask);
|
||||
}
|
||||
|
||||
void flush_tlb_kernel_page(unsigned long kaddr)
|
||||
|
@ -630,14 +617,13 @@ void flush_tlb_kernel_page(unsigned long kaddr)
|
|||
void flush_tlb_range(struct vm_area_struct *vma,
|
||||
unsigned long start, unsigned long end)
|
||||
{
|
||||
cpumask_t mask = vma->vm_mm->cpu_vm_mask;
|
||||
struct tlb_args ta;
|
||||
|
||||
ta.ta_vma = vma;
|
||||
ta.ta_start = start;
|
||||
ta.ta_end = end;
|
||||
|
||||
on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, mask);
|
||||
on_each_cpu_mask(ipi_flush_tlb_range, &ta, 1, &vma->vm_mm->cpu_vm_mask);
|
||||
}
|
||||
|
||||
void flush_tlb_kernel_range(unsigned long start, unsigned long end)
|
||||
|
|
|
@ -18,12 +18,14 @@
|
|||
mov r2, #1
|
||||
add r1, r1, r0, lsr #3 @ Get byte offset
|
||||
mov r3, r2, lsl r3 @ create mask
|
||||
smp_dmb
|
||||
1: ldrexb r2, [r1]
|
||||
ands r0, r2, r3 @ save old value of bit
|
||||
\instr r2, r2, r3 @ toggle bit
|
||||
strexb ip, r2, [r1]
|
||||
cmp ip, #0
|
||||
bne 1b
|
||||
smp_dmb
|
||||
cmp r0, #0
|
||||
movne r0, #1
|
||||
2: mov pc, lr
|
||||
|
|
|
@ -4,19 +4,56 @@ menu "TI DaVinci Implementations"
|
|||
|
||||
comment "DaVinci Core Type"
|
||||
|
||||
config ARCH_DAVINCI644x
|
||||
default y
|
||||
config ARCH_DAVINCI_DM644x
|
||||
bool "DaVinci 644x based system"
|
||||
|
||||
comment "DaVinci Board Type"
|
||||
|
||||
config MACH_DAVINCI_EVM
|
||||
bool "TI DaVinci EVM"
|
||||
bool "TI DM644x EVM"
|
||||
default y
|
||||
depends on ARCH_DAVINCI644x
|
||||
depends on ARCH_DAVINCI_DM644x
|
||||
help
|
||||
Configure this option to specify the whether the board used
|
||||
for development is a DaVinci EVM
|
||||
for development is a DM644x EVM
|
||||
|
||||
|
||||
config DAVINCI_MUX
|
||||
bool "DAVINCI multiplexing support"
|
||||
depends on ARCH_DAVINCI
|
||||
default y
|
||||
help
|
||||
Pin multiplexing support for DAVINCI boards. If your bootloader
|
||||
sets the multiplexing correctly, say N. Otherwise, or if unsure,
|
||||
say Y.
|
||||
|
||||
config DAVINCI_MUX_DEBUG
|
||||
bool "Multiplexing debug output"
|
||||
depends on DAVINCI_MUX
|
||||
help
|
||||
Makes the multiplexing functions print out a lot of debug info.
|
||||
This is useful if you want to find out the correct values of the
|
||||
multiplexing registers.
|
||||
|
||||
config DAVINCI_MUX_WARNINGS
|
||||
bool "Warn about pins the bootloader didn't set up"
|
||||
depends on DAVINCI_MUX
|
||||
help
|
||||
Choose Y here to warn whenever driver initialization logic needs
|
||||
to change the pin multiplexing setup. When there are no warnings
|
||||
printed, it's safe to deselect DAVINCI_MUX for your product.
|
||||
|
||||
config DAVINCI_RESET_CLOCKS
|
||||
bool "Reset unused clocks during boot"
|
||||
depends on ARCH_DAVINCI
|
||||
help
|
||||
Say Y if you want to reset unused clocks during boot.
|
||||
This option saves power, but assumes all drivers are
|
||||
using the clock framework. Broken drivers that do not
|
||||
yet use clock framework may not work with this option.
|
||||
If you are booting from another operating system, you
|
||||
probably do not want this option enabled until your
|
||||
device drivers work properly.
|
||||
|
||||
endmenu
|
||||
|
||||
|
|
|
@ -5,7 +5,12 @@
|
|||
|
||||
# Common objects
|
||||
obj-y := time.o irq.o clock.o serial.o io.o id.o psc.o \
|
||||
gpio.o mux.o devices.o usb.o
|
||||
gpio.o devices.o dma.o usb.o
|
||||
|
||||
obj-$(CONFIG_DAVINCI_MUX) += mux.o
|
||||
|
||||
# Chip specific
|
||||
obj-$(CONFIG_ARCH_DAVINCI_DM644x) += dm644x.o
|
||||
|
||||
# Board specific
|
||||
obj-$(CONFIG_MACH_DAVINCI_EVM) += board-evm.o
|
||||
obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o
|
||||
|
|
|
@ -15,15 +15,20 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/leds.h>
|
||||
#include <linux/memory.h>
|
||||
#include <linux/etherdevice.h>
|
||||
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c/pcf857x.h>
|
||||
#include <linux/i2c/at24.h>
|
||||
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/phy.h>
|
||||
#include <linux/clk.h>
|
||||
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
@ -32,25 +37,34 @@
|
|||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/flash.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/dm644x.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/i2c.h>
|
||||
#include <mach/serial.h>
|
||||
#include <mach/mux.h>
|
||||
#include <mach/psc.h>
|
||||
#include <mach/nand.h>
|
||||
|
||||
/* other misc. init functions */
|
||||
void __init davinci_psc_init(void);
|
||||
void __init davinci_irq_init(void);
|
||||
void __init davinci_map_common_io(void);
|
||||
void __init davinci_init_common_hw(void);
|
||||
#define DM644X_EVM_PHY_MASK (0x2)
|
||||
#define DM644X_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || \
|
||||
defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
#define DAVINCI_CFC_ATA_BASE 0x01C66000
|
||||
|
||||
#define DAVINCI_ASYNC_EMIF_CONTROL_BASE 0x01e00000
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE 0x04000000
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE 0x06000000
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE 0x08000000
|
||||
|
||||
#define LXT971_PHY_ID (0x001378e2)
|
||||
#define LXT971_PHY_MASK (0xfffffff0)
|
||||
|
||||
static struct mtd_partition davinci_evm_norflash_partitions[] = {
|
||||
/* bootloader (U-Boot, etc) in first 4 sectors */
|
||||
/* bootloader (UBL, U-Boot, etc) in first 5 sectors */
|
||||
{
|
||||
.name = "bootloader",
|
||||
.offset = 0,
|
||||
.size = 4 * SZ_64K,
|
||||
.size = 5 * SZ_64K,
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
},
|
||||
/* bootloader params in the next 1 sectors */
|
||||
|
@ -100,10 +114,89 @@ static struct platform_device davinci_evm_norflash_device = {
|
|||
.resource = &davinci_evm_norflash_resource,
|
||||
};
|
||||
|
||||
#endif
|
||||
/* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
|
||||
* It may used instead of the (default) NOR chip to boot, using TI's
|
||||
* tools to install the secondary boot loader (UBL) and U-Boot.
|
||||
*/
|
||||
struct mtd_partition davinci_evm_nandflash_partition[] = {
|
||||
/* Bootloader layout depends on whose u-boot is installed, but we
|
||||
* can hide all the details.
|
||||
* - block 0 for u-boot environment ... in mainline u-boot
|
||||
* - block 1 for UBL (plus up to four backup copies in blocks 2..5)
|
||||
* - blocks 6...? for u-boot
|
||||
* - blocks 16..23 for u-boot environment ... in TI's u-boot
|
||||
*/
|
||||
{
|
||||
.name = "bootloader",
|
||||
.offset = 0,
|
||||
.size = SZ_256K + SZ_128K,
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
},
|
||||
/* Kernel */
|
||||
{
|
||||
.name = "kernel",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = SZ_4M,
|
||||
.mask_flags = 0,
|
||||
},
|
||||
/* File system (older GIT kernels started this on the 5MB mark) */
|
||||
{
|
||||
.name = "filesystem",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = MTDPART_SIZ_FULL,
|
||||
.mask_flags = 0,
|
||||
}
|
||||
/* A few blocks at end hold a flash BBT ... created by TI's CCS
|
||||
* using flashwriter_nand.out, but ignored by TI's versions of
|
||||
* Linux and u-boot. We boot faster by using them.
|
||||
*/
|
||||
};
|
||||
|
||||
#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
|
||||
defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
|
||||
static struct davinci_nand_pdata davinci_evm_nandflash_data = {
|
||||
.parts = davinci_evm_nandflash_partition,
|
||||
.nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
|
||||
.ecc_mode = NAND_ECC_HW,
|
||||
.options = NAND_USE_FLASH_BBT,
|
||||
};
|
||||
|
||||
static struct resource davinci_evm_nandflash_resource[] = {
|
||||
{
|
||||
.start = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE,
|
||||
.end = DAVINCI_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = DAVINCI_ASYNC_EMIF_CONTROL_BASE,
|
||||
.end = DAVINCI_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device davinci_evm_nandflash_device = {
|
||||
.name = "davinci_nand",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &davinci_evm_nandflash_data,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
|
||||
.resource = davinci_evm_nandflash_resource,
|
||||
};
|
||||
|
||||
static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device davinci_fb_device = {
|
||||
.name = "davincifb",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &davinci_fb_dma_mask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
},
|
||||
.num_resources = 0,
|
||||
};
|
||||
|
||||
static struct platform_device rtc_dev = {
|
||||
.name = "rtc_davinci_evm",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static struct resource ide_resources[] = {
|
||||
{
|
||||
|
@ -131,8 +224,6 @@ static struct platform_device ide_dev = {
|
|||
},
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
||||
/*
|
||||
|
@ -311,7 +402,9 @@ evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
|
|||
gpio_request(gpio + 7, "nCF_SEL");
|
||||
gpio_direction_output(gpio + 7, 1);
|
||||
|
||||
/* irlml6401 sustains over 3A, switches 5V in under 8 msec */
|
||||
/* irlml6401 switches over 1A, in under 8 msec;
|
||||
* now it can be managed by nDRV_VBUS ...
|
||||
*/
|
||||
setup_usb(500, 8);
|
||||
|
||||
return 0;
|
||||
|
@ -343,13 +436,119 @@ static struct pcf857x_platform_data pcf_data_u35 = {
|
|||
* - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
|
||||
* - ... newer boards may have more
|
||||
*/
|
||||
static struct memory_accessor *at24_mem_acc;
|
||||
|
||||
static void at24_setup(struct memory_accessor *mem_acc, void *context)
|
||||
{
|
||||
DECLARE_MAC_BUF(mac_str);
|
||||
char mac_addr[6];
|
||||
|
||||
at24_mem_acc = mem_acc;
|
||||
|
||||
/* Read MAC addr from EEPROM */
|
||||
if (at24_mem_acc->read(at24_mem_acc, mac_addr, 0x7f00, 6) == 6) {
|
||||
printk(KERN_INFO "Read MAC addr from EEPROM: %s\n",
|
||||
print_mac(mac_str, mac_addr));
|
||||
}
|
||||
}
|
||||
|
||||
static struct at24_platform_data eeprom_info = {
|
||||
.byte_len = (256*1024) / 8,
|
||||
.page_size = 64,
|
||||
.flags = AT24_FLAG_ADDR16,
|
||||
.setup = at24_setup,
|
||||
};
|
||||
|
||||
int dm6446evm_eeprom_read(void *buf, off_t off, size_t count)
|
||||
{
|
||||
if (at24_mem_acc)
|
||||
return at24_mem_acc->read(at24_mem_acc, buf, off, count);
|
||||
return -ENODEV;
|
||||
}
|
||||
EXPORT_SYMBOL(dm6446evm_eeprom_read);
|
||||
|
||||
int dm6446evm_eeprom_write(void *buf, off_t off, size_t count)
|
||||
{
|
||||
if (at24_mem_acc)
|
||||
return at24_mem_acc->write(at24_mem_acc, buf, off, count);
|
||||
return -ENODEV;
|
||||
}
|
||||
EXPORT_SYMBOL(dm6446evm_eeprom_write);
|
||||
|
||||
/*
|
||||
* MSP430 supports RTC, card detection, input from IR remote, and
|
||||
* a bit more. It triggers interrupts on GPIO(7) from pressing
|
||||
* buttons on the IR remote, and for card detect switches.
|
||||
*/
|
||||
static struct i2c_client *dm6446evm_msp;
|
||||
|
||||
static int dm6446evm_msp_probe(struct i2c_client *client,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
dm6446evm_msp = client;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dm6446evm_msp_remove(struct i2c_client *client)
|
||||
{
|
||||
dm6446evm_msp = NULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct i2c_device_id dm6446evm_msp_ids[] = {
|
||||
{ "dm6446evm_msp", 0, },
|
||||
{ /* end of list */ },
|
||||
};
|
||||
|
||||
static struct i2c_driver dm6446evm_msp_driver = {
|
||||
.driver.name = "dm6446evm_msp",
|
||||
.id_table = dm6446evm_msp_ids,
|
||||
.probe = dm6446evm_msp_probe,
|
||||
.remove = dm6446evm_msp_remove,
|
||||
};
|
||||
|
||||
static int dm6444evm_msp430_get_pins(void)
|
||||
{
|
||||
static const char txbuf[2] = { 2, 4, };
|
||||
char buf[4];
|
||||
struct i2c_msg msg[2] = {
|
||||
{
|
||||
.addr = dm6446evm_msp->addr,
|
||||
.flags = 0,
|
||||
.len = 2,
|
||||
.buf = (void __force *)txbuf,
|
||||
},
|
||||
{
|
||||
.addr = dm6446evm_msp->addr,
|
||||
.flags = I2C_M_RD,
|
||||
.len = 4,
|
||||
.buf = buf,
|
||||
},
|
||||
};
|
||||
int status;
|
||||
|
||||
if (!dm6446evm_msp)
|
||||
return -ENXIO;
|
||||
|
||||
/* Command 4 == get input state, returns port 2 and port3 data
|
||||
* S Addr W [A] len=2 [A] cmd=4 [A]
|
||||
* RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
|
||||
*/
|
||||
status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
|
||||
if (status < 0)
|
||||
return status;
|
||||
|
||||
dev_dbg(&dm6446evm_msp->dev,
|
||||
"PINS: %02x %02x %02x %02x\n",
|
||||
buf[0], buf[1], buf[2], buf[3]);
|
||||
|
||||
return (buf[3] << 8) | buf[2];
|
||||
}
|
||||
|
||||
static struct i2c_board_info __initdata i2c_info[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("dm6446evm_msp", 0x23),
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("pcf8574", 0x38),
|
||||
.platform_data = &pcf_data_u2,
|
||||
|
@ -368,7 +567,6 @@ static struct i2c_board_info __initdata i2c_info[] = {
|
|||
},
|
||||
/* ALSO:
|
||||
* - tvl320aic33 audio codec (0x1b)
|
||||
* - msp430 microcontroller (0x23)
|
||||
* - tvp5146 video decoder (0x5d)
|
||||
*/
|
||||
};
|
||||
|
@ -384,51 +582,109 @@ static struct davinci_i2c_platform_data i2c_pdata = {
|
|||
static void __init evm_init_i2c(void)
|
||||
{
|
||||
davinci_init_i2c(&i2c_pdata);
|
||||
i2c_add_driver(&dm6446evm_msp_driver);
|
||||
i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
|
||||
}
|
||||
|
||||
static struct platform_device *davinci_evm_devices[] __initdata = {
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || \
|
||||
defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
&davinci_evm_norflash_device,
|
||||
#endif
|
||||
#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
|
||||
defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
|
||||
&ide_dev,
|
||||
#endif
|
||||
&davinci_fb_device,
|
||||
&rtc_dev,
|
||||
};
|
||||
|
||||
static struct davinci_uart_config uart_config __initdata = {
|
||||
.enabled_uarts = (1 << 0),
|
||||
};
|
||||
|
||||
static void __init
|
||||
davinci_evm_map_io(void)
|
||||
{
|
||||
davinci_map_common_io();
|
||||
dm644x_init();
|
||||
}
|
||||
|
||||
static __init void davinci_evm_init(void)
|
||||
static int davinci_phy_fixup(struct phy_device *phydev)
|
||||
{
|
||||
davinci_psc_init();
|
||||
unsigned int control;
|
||||
/* CRITICAL: Fix for increasing PHY signal drive strength for
|
||||
* TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
|
||||
* signal strength was low causing TX to fail randomly. The
|
||||
* fix is to Set bit 11 (Increased MII drive strength) of PHY
|
||||
* register 26 (Digital Config register) on this phy. */
|
||||
control = phy_read(phydev, 26);
|
||||
phy_write(phydev, 26, (control | 0x800));
|
||||
return 0;
|
||||
}
|
||||
|
||||
#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
|
||||
defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
|
||||
#define HAS_ATA 1
|
||||
#else
|
||||
#define HAS_ATA 0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || \
|
||||
defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
printk(KERN_WARNING "WARNING: both IDE and NOR flash are enabled, "
|
||||
"but share pins.\n\t Disable IDE for NOR support.\n");
|
||||
#define HAS_NOR 1
|
||||
#else
|
||||
#define HAS_NOR 0
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_NAND_DAVINCI) || \
|
||||
defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
|
||||
#define HAS_NAND 1
|
||||
#else
|
||||
#define HAS_NAND 0
|
||||
#endif
|
||||
|
||||
static __init void davinci_evm_init(void)
|
||||
{
|
||||
struct clk *aemif_clk;
|
||||
|
||||
aemif_clk = clk_get(NULL, "aemif");
|
||||
clk_enable(aemif_clk);
|
||||
|
||||
if (HAS_ATA) {
|
||||
if (HAS_NAND || HAS_NOR)
|
||||
pr_warning("WARNING: both IDE and Flash are "
|
||||
"enabled, but they share AEMIF pins.\n"
|
||||
"\tDisable IDE for NAND/NOR support.\n");
|
||||
davinci_cfg_reg(DM644X_HPIEN_DISABLE);
|
||||
davinci_cfg_reg(DM644X_ATAEN);
|
||||
davinci_cfg_reg(DM644X_HDIREN);
|
||||
platform_device_register(&ide_dev);
|
||||
} else if (HAS_NAND || HAS_NOR) {
|
||||
davinci_cfg_reg(DM644X_HPIEN_DISABLE);
|
||||
davinci_cfg_reg(DM644X_ATAEN_DISABLE);
|
||||
|
||||
/* only one device will be jumpered and detected */
|
||||
if (HAS_NAND) {
|
||||
platform_device_register(&davinci_evm_nandflash_device);
|
||||
evm_leds[7].default_trigger = "nand-disk";
|
||||
if (HAS_NOR)
|
||||
pr_warning("WARNING: both NAND and NOR flash "
|
||||
"are enabled; disable one of them.\n");
|
||||
} else if (HAS_NOR)
|
||||
platform_device_register(&davinci_evm_norflash_device);
|
||||
}
|
||||
|
||||
platform_add_devices(davinci_evm_devices,
|
||||
ARRAY_SIZE(davinci_evm_devices));
|
||||
evm_init_i2c();
|
||||
|
||||
davinci_serial_init(&uart_config);
|
||||
|
||||
/* Register the fixup for PHY on DaVinci */
|
||||
phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
|
||||
davinci_phy_fixup);
|
||||
|
||||
}
|
||||
|
||||
static __init void davinci_evm_irq_init(void)
|
||||
{
|
||||
davinci_init_common_hw();
|
||||
davinci_irq_init();
|
||||
}
|
||||
|
||||
MACHINE_START(DAVINCI_EVM, "DaVinci EVM")
|
||||
MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
|
||||
/* Maintainer: MontaVista Software <source@mvista.com> */
|
||||
.phys_io = IO_PHYS,
|
||||
.io_pg_offst = (__IO_ADDRESS(IO_PHYS) >> 18) & 0xfffc,
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* TI DaVinci clock config file
|
||||
* Clock and PLL control for DaVinci devices
|
||||
*
|
||||
* Copyright (C) 2006 Texas Instruments.
|
||||
* Copyright (C) 2006-2007 Texas Instruments.
|
||||
* Copyright (C) 2008-2009 Deep Root Systems, LLC
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
@ -13,6 +14,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
@ -21,98 +23,50 @@
|
|||
#include <mach/hardware.h>
|
||||
|
||||
#include <mach/psc.h>
|
||||
#include <mach/cputype.h>
|
||||
#include "clock.h"
|
||||
|
||||
/* PLL/Reset register offsets */
|
||||
#define PLLM 0x110
|
||||
|
||||
static LIST_HEAD(clocks);
|
||||
static DEFINE_MUTEX(clocks_mutex);
|
||||
static DEFINE_SPINLOCK(clockfw_lock);
|
||||
|
||||
static unsigned int commonrate;
|
||||
static unsigned int armrate;
|
||||
static unsigned int fixedrate = 27000000; /* 27 MHZ */
|
||||
|
||||
extern void davinci_psc_config(unsigned int domain, unsigned int id, char enable);
|
||||
|
||||
/*
|
||||
* Returns a clock. Note that we first try to use device id on the bus
|
||||
* and clock name. If this fails, we try to use clock name only.
|
||||
*/
|
||||
struct clk *clk_get(struct device *dev, const char *id)
|
||||
static unsigned psc_domain(struct clk *clk)
|
||||
{
|
||||
struct clk *p, *clk = ERR_PTR(-ENOENT);
|
||||
int idno;
|
||||
|
||||
if (dev == NULL || dev->bus != &platform_bus_type)
|
||||
idno = -1;
|
||||
else
|
||||
idno = to_platform_device(dev)->id;
|
||||
|
||||
mutex_lock(&clocks_mutex);
|
||||
|
||||
list_for_each_entry(p, &clocks, node) {
|
||||
if (p->id == idno &&
|
||||
strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
|
||||
clk = p;
|
||||
goto found;
|
||||
}
|
||||
}
|
||||
|
||||
list_for_each_entry(p, &clocks, node) {
|
||||
if (strcmp(id, p->name) == 0 && try_module_get(p->owner)) {
|
||||
clk = p;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
found:
|
||||
mutex_unlock(&clocks_mutex);
|
||||
|
||||
return clk;
|
||||
return (clk->flags & PSC_DSP)
|
||||
? DAVINCI_GPSC_DSPDOMAIN
|
||||
: DAVINCI_GPSC_ARMDOMAIN;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get);
|
||||
|
||||
void clk_put(struct clk *clk)
|
||||
static void __clk_enable(struct clk *clk)
|
||||
{
|
||||
if (clk && !IS_ERR(clk))
|
||||
module_put(clk->owner);
|
||||
}
|
||||
EXPORT_SYMBOL(clk_put);
|
||||
|
||||
static int __clk_enable(struct clk *clk)
|
||||
{
|
||||
if (clk->flags & ALWAYS_ENABLED)
|
||||
return 0;
|
||||
|
||||
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, clk->lpsc, 1);
|
||||
return 0;
|
||||
if (clk->parent)
|
||||
__clk_enable(clk->parent);
|
||||
if (clk->usecount++ == 0 && (clk->flags & CLK_PSC))
|
||||
davinci_psc_config(psc_domain(clk), clk->lpsc, 1);
|
||||
}
|
||||
|
||||
static void __clk_disable(struct clk *clk)
|
||||
{
|
||||
if (clk->usecount)
|
||||
if (WARN_ON(clk->usecount == 0))
|
||||
return;
|
||||
|
||||
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, clk->lpsc, 0);
|
||||
if (--clk->usecount == 0 && !(clk->flags & CLK_PLL))
|
||||
davinci_psc_config(psc_domain(clk), clk->lpsc, 0);
|
||||
if (clk->parent)
|
||||
__clk_disable(clk->parent);
|
||||
}
|
||||
|
||||
int clk_enable(struct clk *clk)
|
||||
{
|
||||
unsigned long flags;
|
||||
int ret = 0;
|
||||
|
||||
if (clk == NULL || IS_ERR(clk))
|
||||
return -EINVAL;
|
||||
|
||||
if (clk->usecount++ == 0) {
|
||||
spin_lock_irqsave(&clockfw_lock, flags);
|
||||
ret = __clk_enable(clk);
|
||||
spin_unlock_irqrestore(&clockfw_lock, flags);
|
||||
}
|
||||
spin_lock_irqsave(&clockfw_lock, flags);
|
||||
__clk_enable(clk);
|
||||
spin_unlock_irqrestore(&clockfw_lock, flags);
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_enable);
|
||||
|
||||
|
@ -123,11 +77,9 @@ void clk_disable(struct clk *clk)
|
|||
if (clk == NULL || IS_ERR(clk))
|
||||
return;
|
||||
|
||||
if (clk->usecount > 0 && !(--clk->usecount)) {
|
||||
spin_lock_irqsave(&clockfw_lock, flags);
|
||||
__clk_disable(clk);
|
||||
spin_unlock_irqrestore(&clockfw_lock, flags);
|
||||
}
|
||||
spin_lock_irqsave(&clockfw_lock, flags);
|
||||
__clk_disable(clk);
|
||||
spin_unlock_irqrestore(&clockfw_lock, flags);
|
||||
}
|
||||
EXPORT_SYMBOL(clk_disable);
|
||||
|
||||
|
@ -136,7 +88,7 @@ unsigned long clk_get_rate(struct clk *clk)
|
|||
if (clk == NULL || IS_ERR(clk))
|
||||
return -EINVAL;
|
||||
|
||||
return *(clk->rate);
|
||||
return clk->rate;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_get_rate);
|
||||
|
||||
|
@ -145,7 +97,7 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
|
|||
if (clk == NULL || IS_ERR(clk))
|
||||
return -EINVAL;
|
||||
|
||||
return *(clk->rate);
|
||||
return clk->rate;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_round_rate);
|
||||
|
||||
|
@ -164,10 +116,23 @@ int clk_register(struct clk *clk)
|
|||
if (clk == NULL || IS_ERR(clk))
|
||||
return -EINVAL;
|
||||
|
||||
if (WARN(clk->parent && !clk->parent->rate,
|
||||
"CLK: %s parent %s has no rate!\n",
|
||||
clk->name, clk->parent->name))
|
||||
return -EINVAL;
|
||||
|
||||
mutex_lock(&clocks_mutex);
|
||||
list_add(&clk->node, &clocks);
|
||||
list_add_tail(&clk->node, &clocks);
|
||||
mutex_unlock(&clocks_mutex);
|
||||
|
||||
/* If rate is already set, use it */
|
||||
if (clk->rate)
|
||||
return 0;
|
||||
|
||||
/* Otherwise, default to parent rate */
|
||||
if (clk->parent)
|
||||
clk->rate = clk->parent->rate;
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(clk_register);
|
||||
|
@ -183,84 +148,150 @@ void clk_unregister(struct clk *clk)
|
|||
}
|
||||
EXPORT_SYMBOL(clk_unregister);
|
||||
|
||||
static struct clk davinci_clks[] = {
|
||||
{
|
||||
.name = "ARMCLK",
|
||||
.rate = &armrate,
|
||||
.lpsc = -1,
|
||||
.flags = ALWAYS_ENABLED,
|
||||
},
|
||||
{
|
||||
.name = "UART",
|
||||
.rate = &fixedrate,
|
||||
.lpsc = DAVINCI_LPSC_UART0,
|
||||
},
|
||||
{
|
||||
.name = "EMACCLK",
|
||||
.rate = &commonrate,
|
||||
.lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
|
||||
},
|
||||
{
|
||||
.name = "I2CCLK",
|
||||
.rate = &fixedrate,
|
||||
.lpsc = DAVINCI_LPSC_I2C,
|
||||
},
|
||||
{
|
||||
.name = "IDECLK",
|
||||
.rate = &commonrate,
|
||||
.lpsc = DAVINCI_LPSC_ATA,
|
||||
},
|
||||
{
|
||||
.name = "McBSPCLK",
|
||||
.rate = &commonrate,
|
||||
.lpsc = DAVINCI_LPSC_McBSP,
|
||||
},
|
||||
{
|
||||
.name = "MMCSDCLK",
|
||||
.rate = &commonrate,
|
||||
.lpsc = DAVINCI_LPSC_MMC_SD,
|
||||
},
|
||||
{
|
||||
.name = "SPICLK",
|
||||
.rate = &commonrate,
|
||||
.lpsc = DAVINCI_LPSC_SPI,
|
||||
},
|
||||
{
|
||||
.name = "gpio",
|
||||
.rate = &commonrate,
|
||||
.lpsc = DAVINCI_LPSC_GPIO,
|
||||
},
|
||||
{
|
||||
.name = "usb",
|
||||
.rate = &commonrate,
|
||||
.lpsc = DAVINCI_LPSC_USB,
|
||||
},
|
||||
{
|
||||
.name = "AEMIFCLK",
|
||||
.rate = &commonrate,
|
||||
.lpsc = DAVINCI_LPSC_AEMIF,
|
||||
.usecount = 1,
|
||||
}
|
||||
};
|
||||
|
||||
int __init davinci_clk_init(void)
|
||||
#ifdef CONFIG_DAVINCI_RESET_CLOCKS
|
||||
/*
|
||||
* Disable any unused clocks left on by the bootloader
|
||||
*/
|
||||
static int __init clk_disable_unused(void)
|
||||
{
|
||||
struct clk *clkp;
|
||||
int count = 0;
|
||||
u32 pll_mult;
|
||||
struct clk *ck;
|
||||
|
||||
pll_mult = davinci_readl(DAVINCI_PLL_CNTRL0_BASE + PLLM);
|
||||
commonrate = ((pll_mult + 1) * 27000000) / 6;
|
||||
armrate = ((pll_mult + 1) * 27000000) / 2;
|
||||
spin_lock_irq(&clockfw_lock);
|
||||
list_for_each_entry(ck, &clocks, node) {
|
||||
if (ck->usecount > 0)
|
||||
continue;
|
||||
if (!(ck->flags & CLK_PSC))
|
||||
continue;
|
||||
|
||||
for (clkp = davinci_clks; count < ARRAY_SIZE(davinci_clks);
|
||||
count++, clkp++) {
|
||||
clk_register(clkp);
|
||||
/* ignore if in Disabled or SwRstDisable states */
|
||||
if (!davinci_psc_is_clk_active(ck->lpsc))
|
||||
continue;
|
||||
|
||||
/* Turn on clocks that have been enabled in the
|
||||
* table above */
|
||||
if (clkp->usecount)
|
||||
clk_enable(clkp);
|
||||
pr_info("Clocks: disable unused %s\n", ck->name);
|
||||
davinci_psc_config(psc_domain(ck), ck->lpsc, 0);
|
||||
}
|
||||
spin_unlock_irq(&clockfw_lock);
|
||||
|
||||
return 0;
|
||||
}
|
||||
late_initcall(clk_disable_unused);
|
||||
#endif
|
||||
|
||||
static void clk_sysclk_recalc(struct clk *clk)
|
||||
{
|
||||
u32 v, plldiv;
|
||||
struct pll_data *pll;
|
||||
|
||||
/* If this is the PLL base clock, no more calculations needed */
|
||||
if (clk->pll_data)
|
||||
return;
|
||||
|
||||
if (WARN_ON(!clk->parent))
|
||||
return;
|
||||
|
||||
clk->rate = clk->parent->rate;
|
||||
|
||||
/* Otherwise, the parent must be a PLL */
|
||||
if (WARN_ON(!clk->parent->pll_data))
|
||||
return;
|
||||
|
||||
pll = clk->parent->pll_data;
|
||||
|
||||
/* If pre-PLL, source clock is before the multiplier and divider(s) */
|
||||
if (clk->flags & PRE_PLL)
|
||||
clk->rate = pll->input_rate;
|
||||
|
||||
if (!clk->div_reg)
|
||||
return;
|
||||
|
||||
v = __raw_readl(pll->base + clk->div_reg);
|
||||
if (v & PLLDIV_EN) {
|
||||
plldiv = (v & PLLDIV_RATIO_MASK) + 1;
|
||||
if (plldiv)
|
||||
clk->rate /= plldiv;
|
||||
}
|
||||
}
|
||||
|
||||
static void __init clk_pll_init(struct clk *clk)
|
||||
{
|
||||
u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
|
||||
u8 bypass;
|
||||
struct pll_data *pll = clk->pll_data;
|
||||
|
||||
pll->base = IO_ADDRESS(pll->phys_base);
|
||||
ctrl = __raw_readl(pll->base + PLLCTL);
|
||||
clk->rate = pll->input_rate = clk->parent->rate;
|
||||
|
||||
if (ctrl & PLLCTL_PLLEN) {
|
||||
bypass = 0;
|
||||
mult = __raw_readl(pll->base + PLLM);
|
||||
mult = (mult & PLLM_PLLM_MASK) + 1;
|
||||
} else
|
||||
bypass = 1;
|
||||
|
||||
if (pll->flags & PLL_HAS_PREDIV) {
|
||||
prediv = __raw_readl(pll->base + PREDIV);
|
||||
if (prediv & PLLDIV_EN)
|
||||
prediv = (prediv & PLLDIV_RATIO_MASK) + 1;
|
||||
else
|
||||
prediv = 1;
|
||||
}
|
||||
|
||||
/* pre-divider is fixed, but (some?) chips won't report that */
|
||||
if (cpu_is_davinci_dm355() && pll->num == 1)
|
||||
prediv = 8;
|
||||
|
||||
if (pll->flags & PLL_HAS_POSTDIV) {
|
||||
postdiv = __raw_readl(pll->base + POSTDIV);
|
||||
if (postdiv & PLLDIV_EN)
|
||||
postdiv = (postdiv & PLLDIV_RATIO_MASK) + 1;
|
||||
else
|
||||
postdiv = 1;
|
||||
}
|
||||
|
||||
if (!bypass) {
|
||||
clk->rate /= prediv;
|
||||
clk->rate *= mult;
|
||||
clk->rate /= postdiv;
|
||||
}
|
||||
|
||||
pr_debug("PLL%d: input = %lu MHz [ ",
|
||||
pll->num, clk->parent->rate / 1000000);
|
||||
if (bypass)
|
||||
pr_debug("bypass ");
|
||||
if (prediv > 1)
|
||||
pr_debug("/ %d ", prediv);
|
||||
if (mult > 1)
|
||||
pr_debug("* %d ", mult);
|
||||
if (postdiv > 1)
|
||||
pr_debug("/ %d ", postdiv);
|
||||
pr_debug("] --> %lu MHz output.\n", clk->rate / 1000000);
|
||||
}
|
||||
|
||||
int __init davinci_clk_init(struct davinci_clk *clocks)
|
||||
{
|
||||
struct davinci_clk *c;
|
||||
struct clk *clk;
|
||||
|
||||
for (c = clocks; c->lk.clk; c++) {
|
||||
clk = c->lk.clk;
|
||||
|
||||
if (clk->pll_data)
|
||||
clk_pll_init(clk);
|
||||
|
||||
/* Calculate rates for PLL-derived clocks */
|
||||
else if (clk->flags & CLK_PLL)
|
||||
clk_sysclk_recalc(clk);
|
||||
|
||||
if (clk->lpsc)
|
||||
clk->flags |= CLK_PSC;
|
||||
|
||||
clkdev_add(&c->lk);
|
||||
clk_register(clk);
|
||||
|
||||
/* Turn on clocks that Linux doesn't otherwise manage */
|
||||
if (clk->flags & ALWAYS_ENABLED)
|
||||
clk_enable(clk);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -285,12 +316,52 @@ static void davinci_ck_stop(struct seq_file *m, void *v)
|
|||
{
|
||||
}
|
||||
|
||||
#define CLKNAME_MAX 10 /* longest clock name */
|
||||
#define NEST_DELTA 2
|
||||
#define NEST_MAX 4
|
||||
|
||||
static void
|
||||
dump_clock(struct seq_file *s, unsigned nest, struct clk *parent)
|
||||
{
|
||||
char *state;
|
||||
char buf[CLKNAME_MAX + NEST_DELTA * NEST_MAX];
|
||||
struct clk *clk;
|
||||
unsigned i;
|
||||
|
||||
if (parent->flags & CLK_PLL)
|
||||
state = "pll";
|
||||
else if (parent->flags & CLK_PSC)
|
||||
state = "psc";
|
||||
else
|
||||
state = "";
|
||||
|
||||
/* <nest spaces> name <pad to end> */
|
||||
memset(buf, ' ', sizeof(buf) - 1);
|
||||
buf[sizeof(buf) - 1] = 0;
|
||||
i = strlen(parent->name);
|
||||
memcpy(buf + nest, parent->name,
|
||||
min(i, (unsigned)(sizeof(buf) - 1 - nest)));
|
||||
|
||||
seq_printf(s, "%s users=%2d %-3s %9ld Hz\n",
|
||||
buf, parent->usecount, state, clk_get_rate(parent));
|
||||
/* REVISIT show device associations too */
|
||||
|
||||
/* cost is now small, but not linear... */
|
||||
list_for_each_entry(clk, &clocks, node) {
|
||||
if (clk->parent == parent)
|
||||
dump_clock(s, nest + NEST_DELTA, clk);
|
||||
}
|
||||
}
|
||||
|
||||
static int davinci_ck_show(struct seq_file *m, void *v)
|
||||
{
|
||||
struct clk *cp;
|
||||
|
||||
list_for_each_entry(cp, &clocks, node)
|
||||
seq_printf(m,"%s %d %d\n", cp->name, *(cp->rate), cp->usecount);
|
||||
/* Show clock tree; we know the main oscillator is first.
|
||||
* We trust nonzero usecounts equate to PSC enables...
|
||||
*/
|
||||
mutex_lock(&clocks_mutex);
|
||||
if (!list_empty(&clocks))
|
||||
dump_clock(m, 0, list_first_entry(&clocks, struct clk, node));
|
||||
mutex_unlock(&clocks_mutex);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -321,4 +392,4 @@ static int __init davinci_ck_proc_init(void)
|
|||
|
||||
}
|
||||
__initcall(davinci_ck_proc_init);
|
||||
#endif /* CONFIG_DEBUG_PROC_FS */
|
||||
#endif /* CONFIG_DEBUG_PROC_FS */
|
||||
|
|
|
@ -1,7 +1,8 @@
|
|||
/*
|
||||
* TI DaVinci clock definitions
|
||||
*
|
||||
* Copyright (C) 2006 Texas Instruments.
|
||||
* Copyright (C) 2006-2007 Texas Instruments.
|
||||
* Copyright (C) 2008-2009 Deep Root Systems, LLC
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
|
@ -11,23 +12,85 @@
|
|||
#ifndef __ARCH_ARM_DAVINCI_CLOCK_H
|
||||
#define __ARCH_ARM_DAVINCI_CLOCK_H
|
||||
|
||||
#include <linux/list.h>
|
||||
#include <asm/clkdev.h>
|
||||
|
||||
#define DAVINCI_PLL1_BASE 0x01c40800
|
||||
#define DAVINCI_PLL2_BASE 0x01c40c00
|
||||
#define MAX_PLL 2
|
||||
|
||||
/* PLL/Reset register offsets */
|
||||
#define PLLCTL 0x100
|
||||
#define PLLCTL_PLLEN BIT(0)
|
||||
#define PLLCTL_CLKMODE BIT(8)
|
||||
|
||||
#define PLLM 0x110
|
||||
#define PLLM_PLLM_MASK 0xff
|
||||
|
||||
#define PREDIV 0x114
|
||||
#define PLLDIV1 0x118
|
||||
#define PLLDIV2 0x11c
|
||||
#define PLLDIV3 0x120
|
||||
#define POSTDIV 0x128
|
||||
#define BPDIV 0x12c
|
||||
#define PLLCMD 0x138
|
||||
#define PLLSTAT 0x13c
|
||||
#define PLLALNCTL 0x140
|
||||
#define PLLDCHANGE 0x144
|
||||
#define PLLCKEN 0x148
|
||||
#define PLLCKSTAT 0x14c
|
||||
#define PLLSYSTAT 0x150
|
||||
#define PLLDIV4 0x160
|
||||
#define PLLDIV5 0x164
|
||||
#define PLLDIV6 0x168
|
||||
#define PLLDIV7 0x16c
|
||||
#define PLLDIV8 0x170
|
||||
#define PLLDIV9 0x174
|
||||
#define PLLDIV_EN BIT(15)
|
||||
#define PLLDIV_RATIO_MASK 0x1f
|
||||
|
||||
struct pll_data {
|
||||
u32 phys_base;
|
||||
void __iomem *base;
|
||||
u32 num;
|
||||
u32 flags;
|
||||
u32 input_rate;
|
||||
};
|
||||
#define PLL_HAS_PREDIV 0x01
|
||||
#define PLL_HAS_POSTDIV 0x02
|
||||
|
||||
struct clk {
|
||||
struct list_head node;
|
||||
struct module *owner;
|
||||
const char *name;
|
||||
unsigned int *rate;
|
||||
int id;
|
||||
__s8 usecount;
|
||||
__u8 flags;
|
||||
__u8 lpsc;
|
||||
unsigned long rate;
|
||||
u8 usecount;
|
||||
u8 flags;
|
||||
u8 lpsc;
|
||||
struct clk *parent;
|
||||
struct pll_data *pll_data;
|
||||
u32 div_reg;
|
||||
};
|
||||
|
||||
/* Clock flags */
|
||||
#define RATE_CKCTL 1
|
||||
#define RATE_FIXED 2
|
||||
#define RATE_PROPAGATES 4
|
||||
#define VIRTUAL_CLOCK 8
|
||||
#define ALWAYS_ENABLED 16
|
||||
#define ENABLE_REG_32BIT 32
|
||||
#define ALWAYS_ENABLED BIT(1)
|
||||
#define CLK_PSC BIT(2)
|
||||
#define PSC_DSP BIT(3) /* PSC uses DSP domain, not ARM */
|
||||
#define CLK_PLL BIT(4) /* PLL-derived clock */
|
||||
#define PRE_PLL BIT(5) /* source is before PLL mult/div */
|
||||
|
||||
struct davinci_clk {
|
||||
struct clk_lookup lk;
|
||||
};
|
||||
|
||||
#define CLK(dev, con, ck) \
|
||||
{ \
|
||||
.lk = { \
|
||||
.dev_id = dev, \
|
||||
.con_id = con, \
|
||||
.clk = ck, \
|
||||
}, \
|
||||
}
|
||||
|
||||
int davinci_clk_init(struct davinci_clk *clocks);
|
||||
#endif
|
||||
|
|
|
@ -21,6 +21,10 @@
|
|||
#include <mach/hardware.h>
|
||||
#include <mach/i2c.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/cputype.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
#define DAVINCI_I2C_BASE 0x01C21000
|
||||
|
||||
static struct resource i2c_resources[] = {
|
||||
{
|
||||
|
@ -43,6 +47,9 @@ static struct platform_device davinci_i2c_device = {
|
|||
|
||||
void __init davinci_init_i2c(struct davinci_i2c_platform_data *pdata)
|
||||
{
|
||||
if (cpu_is_davinci_dm644x())
|
||||
davinci_cfg_reg(DM644X_I2C);
|
||||
|
||||
davinci_i2c_device.dev.platform_data = pdata;
|
||||
(void) platform_device_register(&davinci_i2c_device);
|
||||
}
|
||||
|
|
461
arch/arm/mach-davinci/dm644x.c
Normal file
461
arch/arm/mach-davinci/dm644x.c
Normal file
|
@ -0,0 +1,461 @@
|
|||
/*
|
||||
* TI DaVinci DM644x chip specific setup
|
||||
*
|
||||
* Author: Kevin Hilman, Deep Root Systems, LLC
|
||||
*
|
||||
* 2007 (c) Deep Root Systems, LLC. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <mach/dm644x.h>
|
||||
#include <mach/clock.h>
|
||||
#include <mach/cputype.h>
|
||||
#include <mach/edma.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/psc.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
#include "clock.h"
|
||||
#include "mux.h"
|
||||
|
||||
/*
|
||||
* Device specific clocks
|
||||
*/
|
||||
#define DM644X_REF_FREQ 27000000
|
||||
|
||||
static struct pll_data pll1_data = {
|
||||
.num = 1,
|
||||
.phys_base = DAVINCI_PLL1_BASE,
|
||||
};
|
||||
|
||||
static struct pll_data pll2_data = {
|
||||
.num = 2,
|
||||
.phys_base = DAVINCI_PLL2_BASE,
|
||||
};
|
||||
|
||||
static struct clk ref_clk = {
|
||||
.name = "ref_clk",
|
||||
.rate = DM644X_REF_FREQ,
|
||||
};
|
||||
|
||||
static struct clk pll1_clk = {
|
||||
.name = "pll1",
|
||||
.parent = &ref_clk,
|
||||
.pll_data = &pll1_data,
|
||||
.flags = CLK_PLL,
|
||||
};
|
||||
|
||||
static struct clk pll1_sysclk1 = {
|
||||
.name = "pll1_sysclk1",
|
||||
.parent = &pll1_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV1,
|
||||
};
|
||||
|
||||
static struct clk pll1_sysclk2 = {
|
||||
.name = "pll1_sysclk2",
|
||||
.parent = &pll1_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV2,
|
||||
};
|
||||
|
||||
static struct clk pll1_sysclk3 = {
|
||||
.name = "pll1_sysclk3",
|
||||
.parent = &pll1_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV3,
|
||||
};
|
||||
|
||||
static struct clk pll1_sysclk5 = {
|
||||
.name = "pll1_sysclk5",
|
||||
.parent = &pll1_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV5,
|
||||
};
|
||||
|
||||
static struct clk pll1_aux_clk = {
|
||||
.name = "pll1_aux_clk",
|
||||
.parent = &pll1_clk,
|
||||
.flags = CLK_PLL | PRE_PLL,
|
||||
};
|
||||
|
||||
static struct clk pll1_sysclkbp = {
|
||||
.name = "pll1_sysclkbp",
|
||||
.parent = &pll1_clk,
|
||||
.flags = CLK_PLL | PRE_PLL,
|
||||
.div_reg = BPDIV
|
||||
};
|
||||
|
||||
static struct clk pll2_clk = {
|
||||
.name = "pll2",
|
||||
.parent = &ref_clk,
|
||||
.pll_data = &pll2_data,
|
||||
.flags = CLK_PLL,
|
||||
};
|
||||
|
||||
static struct clk pll2_sysclk1 = {
|
||||
.name = "pll2_sysclk1",
|
||||
.parent = &pll2_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV1,
|
||||
};
|
||||
|
||||
static struct clk pll2_sysclk2 = {
|
||||
.name = "pll2_sysclk2",
|
||||
.parent = &pll2_clk,
|
||||
.flags = CLK_PLL,
|
||||
.div_reg = PLLDIV2,
|
||||
};
|
||||
|
||||
static struct clk pll2_sysclkbp = {
|
||||
.name = "pll2_sysclkbp",
|
||||
.parent = &pll2_clk,
|
||||
.flags = CLK_PLL | PRE_PLL,
|
||||
.div_reg = BPDIV
|
||||
};
|
||||
|
||||
static struct clk dsp_clk = {
|
||||
.name = "dsp",
|
||||
.parent = &pll1_sysclk1,
|
||||
.lpsc = DAVINCI_LPSC_GEM,
|
||||
.flags = PSC_DSP,
|
||||
.usecount = 1, /* REVISIT how to disable? */
|
||||
};
|
||||
|
||||
static struct clk arm_clk = {
|
||||
.name = "arm",
|
||||
.parent = &pll1_sysclk2,
|
||||
.lpsc = DAVINCI_LPSC_ARM,
|
||||
.flags = ALWAYS_ENABLED,
|
||||
};
|
||||
|
||||
static struct clk vicp_clk = {
|
||||
.name = "vicp",
|
||||
.parent = &pll1_sysclk2,
|
||||
.lpsc = DAVINCI_LPSC_IMCOP,
|
||||
.flags = PSC_DSP,
|
||||
.usecount = 1, /* REVISIT how to disable? */
|
||||
};
|
||||
|
||||
static struct clk vpss_master_clk = {
|
||||
.name = "vpss_master",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DAVINCI_LPSC_VPSSMSTR,
|
||||
.flags = CLK_PSC,
|
||||
};
|
||||
|
||||
static struct clk vpss_slave_clk = {
|
||||
.name = "vpss_slave",
|
||||
.parent = &pll1_sysclk3,
|
||||
.lpsc = DAVINCI_LPSC_VPSSSLV,
|
||||
};
|
||||
|
||||
static struct clk uart0_clk = {
|
||||
.name = "uart0",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_UART0,
|
||||
};
|
||||
|
||||
static struct clk uart1_clk = {
|
||||
.name = "uart1",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_UART1,
|
||||
};
|
||||
|
||||
static struct clk uart2_clk = {
|
||||
.name = "uart2",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_UART2,
|
||||
};
|
||||
|
||||
static struct clk emac_clk = {
|
||||
.name = "emac",
|
||||
.parent = &pll1_sysclk5,
|
||||
.lpsc = DAVINCI_LPSC_EMAC_WRAPPER,
|
||||
};
|
||||
|
||||
static struct clk i2c_clk = {
|
||||
.name = "i2c",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_I2C,
|
||||
};
|
||||
|
||||
static struct clk ide_clk = {
|
||||
.name = "ide",
|
||||
.parent = &pll1_sysclk5,
|
||||
.lpsc = DAVINCI_LPSC_ATA,
|
||||
};
|
||||
|
||||
static struct clk asp_clk = {
|
||||
.name = "asp0",
|
||||
.parent = &pll1_sysclk5,
|
||||
.lpsc = DAVINCI_LPSC_McBSP,
|
||||
};
|
||||
|
||||
static struct clk mmcsd_clk = {
|
||||
.name = "mmcsd",
|
||||
.parent = &pll1_sysclk5,
|
||||
.lpsc = DAVINCI_LPSC_MMC_SD,
|
||||
};
|
||||
|
||||
static struct clk spi_clk = {
|
||||
.name = "spi",
|
||||
.parent = &pll1_sysclk5,
|
||||
.lpsc = DAVINCI_LPSC_SPI,
|
||||
};
|
||||
|
||||
static struct clk gpio_clk = {
|
||||
.name = "gpio",
|
||||
.parent = &pll1_sysclk5,
|
||||
.lpsc = DAVINCI_LPSC_GPIO,
|
||||
};
|
||||
|
||||
static struct clk usb_clk = {
|
||||
.name = "usb",
|
||||
.parent = &pll1_sysclk5,
|
||||
.lpsc = DAVINCI_LPSC_USB,
|
||||
};
|
||||
|
||||
static struct clk vlynq_clk = {
|
||||
.name = "vlynq",
|
||||
.parent = &pll1_sysclk5,
|
||||
.lpsc = DAVINCI_LPSC_VLYNQ,
|
||||
};
|
||||
|
||||
static struct clk aemif_clk = {
|
||||
.name = "aemif",
|
||||
.parent = &pll1_sysclk5,
|
||||
.lpsc = DAVINCI_LPSC_AEMIF,
|
||||
};
|
||||
|
||||
static struct clk pwm0_clk = {
|
||||
.name = "pwm0",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_PWM0,
|
||||
};
|
||||
|
||||
static struct clk pwm1_clk = {
|
||||
.name = "pwm1",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_PWM1,
|
||||
};
|
||||
|
||||
static struct clk pwm2_clk = {
|
||||
.name = "pwm2",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_PWM2,
|
||||
};
|
||||
|
||||
static struct clk timer0_clk = {
|
||||
.name = "timer0",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_TIMER0,
|
||||
};
|
||||
|
||||
static struct clk timer1_clk = {
|
||||
.name = "timer1",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_TIMER1,
|
||||
};
|
||||
|
||||
static struct clk timer2_clk = {
|
||||
.name = "timer2",
|
||||
.parent = &pll1_aux_clk,
|
||||
.lpsc = DAVINCI_LPSC_TIMER2,
|
||||
.usecount = 1, /* REVISIT: why cant' this be disabled? */
|
||||
};
|
||||
|
||||
struct davinci_clk dm644x_clks[] = {
|
||||
CLK(NULL, "ref", &ref_clk),
|
||||
CLK(NULL, "pll1", &pll1_clk),
|
||||
CLK(NULL, "pll1_sysclk1", &pll1_sysclk1),
|
||||
CLK(NULL, "pll1_sysclk2", &pll1_sysclk2),
|
||||
CLK(NULL, "pll1_sysclk3", &pll1_sysclk3),
|
||||
CLK(NULL, "pll1_sysclk5", &pll1_sysclk5),
|
||||
CLK(NULL, "pll1_aux", &pll1_aux_clk),
|
||||
CLK(NULL, "pll1_sysclkbp", &pll1_sysclkbp),
|
||||
CLK(NULL, "pll2", &pll2_clk),
|
||||
CLK(NULL, "pll2_sysclk1", &pll2_sysclk1),
|
||||
CLK(NULL, "pll2_sysclk2", &pll2_sysclk2),
|
||||
CLK(NULL, "pll2_sysclkbp", &pll2_sysclkbp),
|
||||
CLK(NULL, "dsp", &dsp_clk),
|
||||
CLK(NULL, "arm", &arm_clk),
|
||||
CLK(NULL, "vicp", &vicp_clk),
|
||||
CLK(NULL, "vpss_master", &vpss_master_clk),
|
||||
CLK(NULL, "vpss_slave", &vpss_slave_clk),
|
||||
CLK(NULL, "arm", &arm_clk),
|
||||
CLK(NULL, "uart0", &uart0_clk),
|
||||
CLK(NULL, "uart1", &uart1_clk),
|
||||
CLK(NULL, "uart2", &uart2_clk),
|
||||
CLK("davinci_emac.1", NULL, &emac_clk),
|
||||
CLK("i2c_davinci.1", NULL, &i2c_clk),
|
||||
CLK("palm_bk3710", NULL, &ide_clk),
|
||||
CLK("soc-audio.0", NULL, &asp_clk),
|
||||
CLK("davinci_mmc.0", NULL, &mmcsd_clk),
|
||||
CLK(NULL, "spi", &spi_clk),
|
||||
CLK(NULL, "gpio", &gpio_clk),
|
||||
CLK(NULL, "usb", &usb_clk),
|
||||
CLK(NULL, "vlynq", &vlynq_clk),
|
||||
CLK(NULL, "aemif", &aemif_clk),
|
||||
CLK(NULL, "pwm0", &pwm0_clk),
|
||||
CLK(NULL, "pwm1", &pwm1_clk),
|
||||
CLK(NULL, "pwm2", &pwm2_clk),
|
||||
CLK(NULL, "timer0", &timer0_clk),
|
||||
CLK(NULL, "timer1", &timer1_clk),
|
||||
CLK("watchdog", NULL, &timer2_clk),
|
||||
CLK(NULL, NULL, NULL),
|
||||
};
|
||||
|
||||
#if defined(CONFIG_TI_DAVINCI_EMAC) || defined(CONFIG_TI_DAVINCI_EMAC_MODULE)
|
||||
|
||||
static struct resource dm644x_emac_resources[] = {
|
||||
{
|
||||
.start = DM644X_EMAC_BASE,
|
||||
.end = DM644X_EMAC_BASE + 0x47ff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_EMACINT,
|
||||
.end = IRQ_EMACINT,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device dm644x_emac_device = {
|
||||
.name = "davinci_emac",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(dm644x_emac_resources),
|
||||
.resource = dm644x_emac_resources,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Device specific mux setup
|
||||
*
|
||||
* soc description mux mode mode mux dbg
|
||||
* reg offset mask mode
|
||||
*/
|
||||
static const struct mux_config dm644x_pins[] = {
|
||||
MUX_CFG(DM644X, HDIREN, 0, 16, 1, 1, true)
|
||||
MUX_CFG(DM644X, ATAEN, 0, 17, 1, 1, true)
|
||||
MUX_CFG(DM644X, ATAEN_DISABLE, 0, 17, 1, 0, true)
|
||||
|
||||
MUX_CFG(DM644X, HPIEN_DISABLE, 0, 29, 1, 0, true)
|
||||
|
||||
MUX_CFG(DM644X, AEAW, 0, 0, 31, 31, true)
|
||||
|
||||
MUX_CFG(DM644X, MSTK, 1, 9, 1, 0, false)
|
||||
|
||||
MUX_CFG(DM644X, I2C, 1, 7, 1, 1, false)
|
||||
|
||||
MUX_CFG(DM644X, MCBSP, 1, 10, 1, 1, false)
|
||||
|
||||
MUX_CFG(DM644X, UART1, 1, 1, 1, 1, true)
|
||||
MUX_CFG(DM644X, UART2, 1, 2, 1, 1, true)
|
||||
|
||||
MUX_CFG(DM644X, PWM0, 1, 4, 1, 1, false)
|
||||
|
||||
MUX_CFG(DM644X, PWM1, 1, 5, 1, 1, false)
|
||||
|
||||
MUX_CFG(DM644X, PWM2, 1, 6, 1, 1, false)
|
||||
|
||||
MUX_CFG(DM644X, VLYNQEN, 0, 15, 1, 1, false)
|
||||
MUX_CFG(DM644X, VLSCREN, 0, 14, 1, 1, false)
|
||||
MUX_CFG(DM644X, VLYNQWD, 0, 12, 3, 3, false)
|
||||
|
||||
MUX_CFG(DM644X, EMACEN, 0, 31, 1, 1, true)
|
||||
|
||||
MUX_CFG(DM644X, GPIO3V, 0, 31, 1, 0, true)
|
||||
|
||||
MUX_CFG(DM644X, GPIO0, 0, 24, 1, 0, true)
|
||||
MUX_CFG(DM644X, GPIO3, 0, 25, 1, 0, false)
|
||||
MUX_CFG(DM644X, GPIO43_44, 1, 7, 1, 0, false)
|
||||
MUX_CFG(DM644X, GPIO46_47, 0, 22, 1, 0, true)
|
||||
|
||||
MUX_CFG(DM644X, RGB666, 0, 22, 1, 1, true)
|
||||
|
||||
MUX_CFG(DM644X, LOEEN, 0, 24, 1, 1, true)
|
||||
MUX_CFG(DM644X, LFLDEN, 0, 25, 1, 1, false)
|
||||
};
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
|
||||
static const s8 dma_chan_dm644x_no_event[] = {
|
||||
0, 1, 12, 13, 14,
|
||||
15, 25, 30, 31, 45,
|
||||
46, 47, 55, 56, 57,
|
||||
58, 59, 60, 61, 62,
|
||||
63,
|
||||
-1
|
||||
};
|
||||
|
||||
static struct edma_soc_info dm644x_edma_info = {
|
||||
.n_channel = 64,
|
||||
.n_region = 4,
|
||||
.n_slot = 128,
|
||||
.n_tc = 2,
|
||||
.noevent = dma_chan_dm644x_no_event,
|
||||
};
|
||||
|
||||
static struct resource edma_resources[] = {
|
||||
{
|
||||
.name = "edma_cc",
|
||||
.start = 0x01c00000,
|
||||
.end = 0x01c00000 + SZ_64K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "edma_tc0",
|
||||
.start = 0x01c10000,
|
||||
.end = 0x01c10000 + SZ_1K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.name = "edma_tc1",
|
||||
.start = 0x01c10400,
|
||||
.end = 0x01c10400 + SZ_1K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = IRQ_CCINT0,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_CCERRINT,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
/* not using TC*_ERR */
|
||||
};
|
||||
|
||||
static struct platform_device dm644x_edma_device = {
|
||||
.name = "edma",
|
||||
.id = -1,
|
||||
.dev.platform_data = &dm644x_edma_info,
|
||||
.num_resources = ARRAY_SIZE(edma_resources),
|
||||
.resource = edma_resources,
|
||||
};
|
||||
|
||||
/*----------------------------------------------------------------------*/
|
||||
void __init dm644x_init(void)
|
||||
{
|
||||
davinci_clk_init(dm644x_clks);
|
||||
davinci_mux_register(dm644x_pins, ARRAY_SIZE(dm644x_pins));
|
||||
}
|
||||
|
||||
static int __init dm644x_init_devices(void)
|
||||
{
|
||||
if (!cpu_is_davinci_dm644x())
|
||||
return 0;
|
||||
|
||||
platform_device_register(&dm644x_edma_device);
|
||||
return 0;
|
||||
}
|
||||
postcore_initcall(dm644x_init_devices);
|
1135
arch/arm/mach-davinci/dma.c
Normal file
1135
arch/arm/mach-davinci/dma.c
Normal file
File diff suppressed because it is too large
Load diff
|
@ -20,6 +20,7 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#include <mach/cputype.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/gpio.h>
|
||||
|
@ -36,9 +37,10 @@ struct davinci_gpio {
|
|||
|
||||
static struct davinci_gpio chips[DIV_ROUND_UP(DAVINCI_N_GPIO, 32)];
|
||||
|
||||
static unsigned __initdata ngpio;
|
||||
|
||||
/* create a non-inlined version */
|
||||
static struct gpio_controller *__iomem __init gpio2controller(unsigned gpio)
|
||||
static struct gpio_controller __iomem * __init gpio2controller(unsigned gpio)
|
||||
{
|
||||
return __gpio_to_controller(gpio);
|
||||
}
|
||||
|
@ -114,9 +116,30 @@ static int __init davinci_gpio_setup(void)
|
|||
{
|
||||
int i, base;
|
||||
|
||||
for (i = 0, base = 0;
|
||||
i < ARRAY_SIZE(chips);
|
||||
i++, base += 32) {
|
||||
/* The gpio banks conceptually expose a segmented bitmap,
|
||||
* and "ngpio" is one more than the largest zero-based
|
||||
* bit index that's valid.
|
||||
*/
|
||||
if (cpu_is_davinci_dm355()) { /* or dm335() */
|
||||
ngpio = 104;
|
||||
} else if (cpu_is_davinci_dm644x()) { /* or dm337() */
|
||||
ngpio = 71;
|
||||
} else if (cpu_is_davinci_dm646x()) {
|
||||
/* NOTE: each bank has several "reserved" bits,
|
||||
* unusable as GPIOs. Only 33 of the GPIO numbers
|
||||
* are usable, and we're not rejecting the others.
|
||||
*/
|
||||
ngpio = 43;
|
||||
} else {
|
||||
/* if cpu_is_davinci_dm643x() ngpio = 111 */
|
||||
pr_err("GPIO setup: how many GPIOs?\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (WARN_ON(DAVINCI_N_GPIO < ngpio))
|
||||
ngpio = DAVINCI_N_GPIO;
|
||||
|
||||
for (i = 0, base = 0; base < ngpio; i++, base += 32) {
|
||||
chips[i].chip.label = "DaVinci";
|
||||
|
||||
chips[i].chip.direction_input = davinci_direction_in;
|
||||
|
@ -125,7 +148,7 @@ static int __init davinci_gpio_setup(void)
|
|||
chips[i].chip.set = davinci_gpio_set;
|
||||
|
||||
chips[i].chip.base = base;
|
||||
chips[i].chip.ngpio = DAVINCI_N_GPIO - base;
|
||||
chips[i].chip.ngpio = ngpio - base;
|
||||
if (chips[i].chip.ngpio > 32)
|
||||
chips[i].chip.ngpio = 32;
|
||||
|
||||
|
@ -143,11 +166,11 @@ pure_initcall(davinci_gpio_setup);
|
|||
* We expect irqs will normally be set up as input pins, but they can also be
|
||||
* used as output pins ... which is convenient for testing.
|
||||
*
|
||||
* NOTE: GPIO0..GPIO7 also have direct INTC hookups, which work in addition
|
||||
* to their GPIOBNK0 irq (but with a bit less overhead). But we don't have
|
||||
* a good way to hook those up ...
|
||||
* NOTE: The first few GPIOs also have direct INTC hookups in addition
|
||||
* to their GPIOBNK0 irq, with a bit less overhead but less flexibility
|
||||
* on triggering (e.g. no edge options). We don't try to use those.
|
||||
*
|
||||
* All those INTC hookups (GPIO0..GPIO7 plus five IRQ banks) can also
|
||||
* All those INTC hookups (direct, plus several IRQ banks) can also
|
||||
* serve as EDMA event triggers.
|
||||
*/
|
||||
|
||||
|
@ -235,29 +258,42 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc)
|
|||
}
|
||||
|
||||
/*
|
||||
* NOTE: for suspend/resume, probably best to make a sysdev (and class)
|
||||
* with its suspend/resume calls hooking into the results of the set_wake()
|
||||
* NOTE: for suspend/resume, probably best to make a platform_device with
|
||||
* suspend_late/resume_resume calls hooking into results of the set_wake()
|
||||
* calls ... so if no gpios are wakeup events the clock can be disabled,
|
||||
* with outputs left at previously set levels, and so that VDD3P3V.IOPWDN0
|
||||
* can be set appropriately for GPIOV33 pins.
|
||||
* (dm6446) can be set appropriately for GPIOV33 pins.
|
||||
*/
|
||||
|
||||
static int __init davinci_gpio_irq_setup(void)
|
||||
{
|
||||
unsigned gpio, irq, bank;
|
||||
unsigned bank_irq;
|
||||
struct clk *clk;
|
||||
u32 binten = 0;
|
||||
|
||||
if (cpu_is_davinci_dm355()) { /* or dm335() */
|
||||
bank_irq = IRQ_DM355_GPIOBNK0;
|
||||
} else if (cpu_is_davinci_dm644x()) {
|
||||
bank_irq = IRQ_GPIOBNK0;
|
||||
} else if (cpu_is_davinci_dm646x()) {
|
||||
bank_irq = IRQ_DM646X_GPIOBNK0;
|
||||
} else {
|
||||
printk(KERN_ERR "Don't know first GPIO bank IRQ.\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
clk = clk_get(NULL, "gpio");
|
||||
if (IS_ERR(clk)) {
|
||||
printk(KERN_ERR "Error %ld getting gpio clock?\n",
|
||||
PTR_ERR(clk));
|
||||
return 0;
|
||||
return PTR_ERR(clk);
|
||||
}
|
||||
|
||||
clk_enable(clk);
|
||||
|
||||
for (gpio = 0, irq = gpio_to_irq(0), bank = IRQ_GPIOBNK0;
|
||||
gpio < DAVINCI_N_GPIO; bank++) {
|
||||
for (gpio = 0, irq = gpio_to_irq(0), bank = 0;
|
||||
gpio < ngpio;
|
||||
bank++, bank_irq++) {
|
||||
struct gpio_controller *__iomem g = gpio2controller(gpio);
|
||||
unsigned i;
|
||||
|
||||
|
@ -265,28 +301,28 @@ static int __init davinci_gpio_irq_setup(void)
|
|||
__raw_writel(~0, &g->clr_rising);
|
||||
|
||||
/* set up all irqs in this bank */
|
||||
set_irq_chained_handler(bank, gpio_irq_handler);
|
||||
set_irq_chip_data(bank, g);
|
||||
set_irq_data(bank, (void *)irq);
|
||||
set_irq_chained_handler(bank_irq, gpio_irq_handler);
|
||||
set_irq_chip_data(bank_irq, g);
|
||||
set_irq_data(bank_irq, (void *)irq);
|
||||
|
||||
for (i = 0; i < 16 && gpio < DAVINCI_N_GPIO;
|
||||
i++, irq++, gpio++) {
|
||||
for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) {
|
||||
set_irq_chip(irq, &gpio_irqchip);
|
||||
set_irq_chip_data(irq, g);
|
||||
set_irq_handler(irq, handle_simple_irq);
|
||||
set_irq_flags(irq, IRQF_VALID);
|
||||
}
|
||||
|
||||
binten |= BIT(bank);
|
||||
}
|
||||
|
||||
/* BINTEN -- per-bank interrupt enable. genirq would also let these
|
||||
* bits be set/cleared dynamically.
|
||||
*/
|
||||
__raw_writel(0x1f, (void *__iomem)
|
||||
__raw_writel(binten, (void *__iomem)
|
||||
IO_ADDRESS(DAVINCI_GPIO_BASE + 0x08));
|
||||
|
||||
printk(KERN_INFO "DaVinci: %d gpio irqs\n", irq - gpio_to_irq(0));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
arch_initcall(davinci_gpio_irq_setup);
|
||||
|
|
|
@ -15,7 +15,9 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#define JTAG_ID_BASE 0x01c40028
|
||||
#define JTAG_ID_BASE IO_ADDRESS(0x01c40028)
|
||||
|
||||
static unsigned int davinci_revision;
|
||||
|
||||
struct davinci_id {
|
||||
u8 variant; /* JTAG ID bits 31:28 */
|
||||
|
@ -33,6 +35,20 @@ static struct davinci_id davinci_ids[] __initdata = {
|
|||
.manufacturer = 0x017,
|
||||
.type = 0x64460000,
|
||||
},
|
||||
{
|
||||
/* DM646X */
|
||||
.part_no = 0xb770,
|
||||
.variant = 0x0,
|
||||
.manufacturer = 0x017,
|
||||
.type = 0x64670000,
|
||||
},
|
||||
{
|
||||
/* DM355 */
|
||||
.part_no = 0xb73b,
|
||||
.variant = 0x0,
|
||||
.manufacturer = 0x00f,
|
||||
.type = 0x03550000,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
|
@ -42,7 +58,7 @@ static u16 __init davinci_get_part_no(void)
|
|||
{
|
||||
u32 dev_id, part_no;
|
||||
|
||||
dev_id = davinci_readl(JTAG_ID_BASE);
|
||||
dev_id = __raw_readl(JTAG_ID_BASE);
|
||||
|
||||
part_no = ((dev_id >> 12) & 0xffff);
|
||||
|
||||
|
@ -56,13 +72,19 @@ static u8 __init davinci_get_variant(void)
|
|||
{
|
||||
u32 variant;
|
||||
|
||||
variant = davinci_readl(JTAG_ID_BASE);
|
||||
variant = __raw_readl(JTAG_ID_BASE);
|
||||
|
||||
variant = (variant >> 28) & 0xf;
|
||||
|
||||
return variant;
|
||||
}
|
||||
|
||||
unsigned int davinci_rev(void)
|
||||
{
|
||||
return davinci_revision >> 16;
|
||||
}
|
||||
EXPORT_SYMBOL(davinci_rev);
|
||||
|
||||
void __init davinci_check_revision(void)
|
||||
{
|
||||
int i;
|
||||
|
@ -75,7 +97,7 @@ void __init davinci_check_revision(void)
|
|||
/* First check only the major version in a safe way */
|
||||
for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) {
|
||||
if (part_no == (davinci_ids[i].part_no)) {
|
||||
system_rev = davinci_ids[i].type;
|
||||
davinci_revision = davinci_ids[i].type;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
@ -84,10 +106,11 @@ void __init davinci_check_revision(void)
|
|||
for (i = 0; i < ARRAY_SIZE(davinci_ids); i++) {
|
||||
if (part_no == davinci_ids[i].part_no &&
|
||||
variant == davinci_ids[i].variant) {
|
||||
system_rev = davinci_ids[i].type;
|
||||
davinci_revision = davinci_ids[i].type;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
printk("DaVinci DM%04x variant 0x%x\n", system_rev >> 16, variant);
|
||||
printk(KERN_INFO "DaVinci DM%04x variant 0x%x\n",
|
||||
davinci_rev(), variant);
|
||||
}
|
||||
|
|
25
arch/arm/mach-davinci/include/mach/asp.h
Normal file
25
arch/arm/mach-davinci/include/mach/asp.h
Normal file
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* <mach/asp.h> - DaVinci Audio Serial Port support
|
||||
*/
|
||||
#ifndef __ASM_ARCH_DAVINCI_ASP_H
|
||||
#define __ASM_ARCH_DAVINCI_ASP_H
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
/* Bases of register banks */
|
||||
#define DAVINCI_ASP0_BASE 0x01E02000
|
||||
#define DAVINCI_ASP1_BASE 0x01E04000
|
||||
|
||||
/* EDMA channels */
|
||||
#define DAVINCI_DMA_ASP0_TX 2
|
||||
#define DAVINCI_DMA_ASP0_RX 3
|
||||
#define DAVINCI_DMA_ASP1_TX 8
|
||||
#define DAVINCI_DMA_ASP1_RX 9
|
||||
|
||||
/* Interrupts */
|
||||
#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
|
||||
#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
|
||||
#define DAVINCI_ASP1_RX_INT IRQ_MBRINT
|
||||
#define DAVINCI_ASP1_TX_INT IRQ_MBXINT
|
||||
|
||||
#endif /* __ASM_ARCH_DAVINCI_ASP_H */
|
20
arch/arm/mach-davinci/include/mach/board-dm6446evm.h
Normal file
20
arch/arm/mach-davinci/include/mach/board-dm6446evm.h
Normal file
|
@ -0,0 +1,20 @@
|
|||
/*
|
||||
* DaVinci DM6446 EVM board specific headers
|
||||
*
|
||||
* Author: Kevin Hilman, Deep Root Systems, LLC
|
||||
*
|
||||
* 2007 (c) Deep Root Systems, LLC. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or ifndef.
|
||||
*/
|
||||
|
||||
#ifndef _MACH_DAVINCI_DM6446EVM_H
|
||||
#define _MACH_DAVINCI_DM6446EVM_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
int dm6446evm_eeprom_read(char *buf, off_t off, size_t count);
|
||||
int dm6446evm_eeprom_write(char *buf, off_t off, size_t count);
|
||||
|
||||
#endif
|
13
arch/arm/mach-davinci/include/mach/clkdev.h
Normal file
13
arch/arm/mach-davinci/include/mach/clkdev.h
Normal file
|
@ -0,0 +1,13 @@
|
|||
#ifndef __MACH_CLKDEV_H
|
||||
#define __MACH_CLKDEV_H
|
||||
|
||||
static inline int __clk_get(struct clk *clk)
|
||||
{
|
||||
return 1;
|
||||
}
|
||||
|
||||
static inline void __clk_put(struct clk *clk)
|
||||
{
|
||||
}
|
||||
|
||||
#endif
|
|
@ -17,6 +17,5 @@ struct clk;
|
|||
|
||||
extern int clk_register(struct clk *clk);
|
||||
extern void clk_unregister(struct clk *clk);
|
||||
extern int davinci_clk_init(void);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -16,6 +16,12 @@ struct sys_timer;
|
|||
|
||||
extern struct sys_timer davinci_timer;
|
||||
|
||||
extern void davinci_irq_init(void);
|
||||
extern void davinci_map_common_io(void);
|
||||
|
||||
/* parameters describe VBUS sourcing for host mode */
|
||||
extern void setup_usb(unsigned mA, unsigned potpgt_msec);
|
||||
|
||||
/* parameters describe VBUS sourcing for host mode */
|
||||
extern void setup_usb(unsigned mA, unsigned potpgt_msec);
|
||||
|
||||
|
|
49
arch/arm/mach-davinci/include/mach/cputype.h
Normal file
49
arch/arm/mach-davinci/include/mach/cputype.h
Normal file
|
@ -0,0 +1,49 @@
|
|||
/*
|
||||
* DaVinci CPU type detection
|
||||
*
|
||||
* Author: Kevin Hilman, Deep Root Systems, LLC
|
||||
*
|
||||
* Defines the cpu_is_*() macros for runtime detection of DaVinci
|
||||
* device type. In addtion, if support for a given device is not
|
||||
* compiled in to the kernel, the macros return 0 so that
|
||||
* resulting code can be optimized out.
|
||||
*
|
||||
* 2009 (c) Deep Root Systems, LLC. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*/
|
||||
#ifndef _ASM_ARCH_CPU_H
|
||||
#define _ASM_ARCH_CPU_H
|
||||
|
||||
extern unsigned int davinci_rev(void);
|
||||
|
||||
#define IS_DAVINCI_CPU(type, id) \
|
||||
static inline int is_davinci_dm ##type(void) \
|
||||
{ \
|
||||
return (davinci_rev() == (id)) ? 1 : 0; \
|
||||
}
|
||||
|
||||
IS_DAVINCI_CPU(644x, 0x6446)
|
||||
IS_DAVINCI_CPU(646x, 0x6467)
|
||||
IS_DAVINCI_CPU(355, 0x355)
|
||||
|
||||
#ifdef CONFIG_ARCH_DAVINCI_DM644x
|
||||
#define cpu_is_davinci_dm644x() is_davinci_dm644x()
|
||||
#else
|
||||
#define cpu_is_davinci_dm644x() 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_DAVINCI_DM646x
|
||||
#define cpu_is_davinci_dm646x() is_davinci_dm646x()
|
||||
#else
|
||||
#define cpu_is_davinci_dm646x() 0
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARCH_DAVINCI_DM355
|
||||
#define cpu_is_davinci_dm355() is_davinci_dm355()
|
||||
#else
|
||||
#define cpu_is_davinci_dm355() 0
|
||||
#endif
|
||||
|
||||
#endif
|
37
arch/arm/mach-davinci/include/mach/dm644x.h
Normal file
37
arch/arm/mach-davinci/include/mach/dm644x.h
Normal file
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* This file contains the processor specific definitions
|
||||
* of the TI DM644x.
|
||||
*
|
||||
* Copyright (C) 2008 Texas Instruments.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*
|
||||
*/
|
||||
#ifndef __ASM_ARCH_DM644X_H
|
||||
#define __ASM_ARCH_DM644X_H
|
||||
|
||||
#include <linux/platform_device.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#define DM644X_EMAC_BASE (0x01C80000)
|
||||
#define DM644X_EMAC_CNTRL_OFFSET (0x0000)
|
||||
#define DM644X_EMAC_CNTRL_MOD_OFFSET (0x1000)
|
||||
#define DM644X_EMAC_CNTRL_RAM_OFFSET (0x2000)
|
||||
#define DM644X_EMAC_MDIO_OFFSET (0x4000)
|
||||
#define DM644X_EMAC_CNTRL_RAM_SIZE (0x2000)
|
||||
|
||||
void __init dm644x_init(void);
|
||||
|
||||
#endif /* __ASM_ARCH_DM644X_H */
|
228
arch/arm/mach-davinci/include/mach/edma.h
Normal file
228
arch/arm/mach-davinci/include/mach/edma.h
Normal file
|
@ -0,0 +1,228 @@
|
|||
/*
|
||||
* TI DAVINCI dma definitions
|
||||
*
|
||||
* Copyright (C) 2006-2009 Texas Instruments.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*
|
||||
*/
|
||||
|
||||
/*
|
||||
* This EDMA3 programming framework exposes two basic kinds of resource:
|
||||
*
|
||||
* Channel Triggers transfers, usually from a hardware event but
|
||||
* also manually or by "chaining" from DMA completions.
|
||||
* Each channel is coupled to a Parameter RAM (PaRAM) slot.
|
||||
*
|
||||
* Slot Each PaRAM slot holds a DMA transfer descriptor (PaRAM
|
||||
* "set"), source and destination addresses, a link to a
|
||||
* next PaRAM slot (if any), options for the transfer, and
|
||||
* instructions for updating those addresses. There are
|
||||
* more than twice as many slots as event channels.
|
||||
*
|
||||
* Each PaRAM set describes a sequence of transfers, either for one large
|
||||
* buffer or for several discontiguous smaller buffers. An EDMA transfer
|
||||
* is driven only from a channel, which performs the transfers specified
|
||||
* in its PaRAM slot until there are no more transfers. When that last
|
||||
* transfer completes, the "link" field may be used to reload the channel's
|
||||
* PaRAM slot with a new transfer descriptor.
|
||||
*
|
||||
* The EDMA Channel Controller (CC) maps requests from channels into physical
|
||||
* Transfer Controller (TC) requests when the channel triggers (by hardware
|
||||
* or software events, or by chaining). The two physical DMA channels provided
|
||||
* by the TCs are thus shared by many logical channels.
|
||||
*
|
||||
* DaVinci hardware also has a "QDMA" mechanism which is not currently
|
||||
* supported through this interface. (DSP firmware uses it though.)
|
||||
*/
|
||||
|
||||
#ifndef EDMA_H_
|
||||
#define EDMA_H_
|
||||
|
||||
/* PaRAM slots are laid out like this */
|
||||
struct edmacc_param {
|
||||
unsigned int opt;
|
||||
unsigned int src;
|
||||
unsigned int a_b_cnt;
|
||||
unsigned int dst;
|
||||
unsigned int src_dst_bidx;
|
||||
unsigned int link_bcntrld;
|
||||
unsigned int src_dst_cidx;
|
||||
unsigned int ccnt;
|
||||
};
|
||||
|
||||
#define CCINT0_INTERRUPT 16
|
||||
#define CCERRINT_INTERRUPT 17
|
||||
#define TCERRINT0_INTERRUPT 18
|
||||
#define TCERRINT1_INTERRUPT 19
|
||||
|
||||
/* fields in edmacc_param.opt */
|
||||
#define SAM BIT(0)
|
||||
#define DAM BIT(1)
|
||||
#define SYNCDIM BIT(2)
|
||||
#define STATIC BIT(3)
|
||||
#define EDMA_FWID (0x07 << 8)
|
||||
#define TCCMODE BIT(11)
|
||||
#define EDMA_TCC(t) ((t) << 12)
|
||||
#define TCINTEN BIT(20)
|
||||
#define ITCINTEN BIT(21)
|
||||
#define TCCHEN BIT(22)
|
||||
#define ITCCHEN BIT(23)
|
||||
|
||||
#define TRWORD (0x7<<2)
|
||||
#define PAENTRY (0x1ff<<5)
|
||||
|
||||
/* Drivers should avoid using these symbolic names for dm644x
|
||||
* channels, and use platform_device IORESOURCE_DMA resources
|
||||
* instead. (Other DaVinci chips have different peripherals
|
||||
* and thus have different DMA channel mappings.)
|
||||
*/
|
||||
#define DAVINCI_DMA_MCBSP_TX 2
|
||||
#define DAVINCI_DMA_MCBSP_RX 3
|
||||
#define DAVINCI_DMA_VPSS_HIST 4
|
||||
#define DAVINCI_DMA_VPSS_H3A 5
|
||||
#define DAVINCI_DMA_VPSS_PRVU 6
|
||||
#define DAVINCI_DMA_VPSS_RSZ 7
|
||||
#define DAVINCI_DMA_IMCOP_IMXINT 8
|
||||
#define DAVINCI_DMA_IMCOP_VLCDINT 9
|
||||
#define DAVINCI_DMA_IMCO_PASQINT 10
|
||||
#define DAVINCI_DMA_IMCOP_DSQINT 11
|
||||
#define DAVINCI_DMA_SPI_SPIX 16
|
||||
#define DAVINCI_DMA_SPI_SPIR 17
|
||||
#define DAVINCI_DMA_UART0_URXEVT0 18
|
||||
#define DAVINCI_DMA_UART0_UTXEVT0 19
|
||||
#define DAVINCI_DMA_UART1_URXEVT1 20
|
||||
#define DAVINCI_DMA_UART1_UTXEVT1 21
|
||||
#define DAVINCI_DMA_UART2_URXEVT2 22
|
||||
#define DAVINCI_DMA_UART2_UTXEVT2 23
|
||||
#define DAVINCI_DMA_MEMSTK_MSEVT 24
|
||||
#define DAVINCI_DMA_MMCRXEVT 26
|
||||
#define DAVINCI_DMA_MMCTXEVT 27
|
||||
#define DAVINCI_DMA_I2C_ICREVT 28
|
||||
#define DAVINCI_DMA_I2C_ICXEVT 29
|
||||
#define DAVINCI_DMA_GPIO_GPINT0 32
|
||||
#define DAVINCI_DMA_GPIO_GPINT1 33
|
||||
#define DAVINCI_DMA_GPIO_GPINT2 34
|
||||
#define DAVINCI_DMA_GPIO_GPINT3 35
|
||||
#define DAVINCI_DMA_GPIO_GPINT4 36
|
||||
#define DAVINCI_DMA_GPIO_GPINT5 37
|
||||
#define DAVINCI_DMA_GPIO_GPINT6 38
|
||||
#define DAVINCI_DMA_GPIO_GPINT7 39
|
||||
#define DAVINCI_DMA_GPIO_GPBNKINT0 40
|
||||
#define DAVINCI_DMA_GPIO_GPBNKINT1 41
|
||||
#define DAVINCI_DMA_GPIO_GPBNKINT2 42
|
||||
#define DAVINCI_DMA_GPIO_GPBNKINT3 43
|
||||
#define DAVINCI_DMA_GPIO_GPBNKINT4 44
|
||||
#define DAVINCI_DMA_TIMER0_TINT0 48
|
||||
#define DAVINCI_DMA_TIMER1_TINT1 49
|
||||
#define DAVINCI_DMA_TIMER2_TINT2 50
|
||||
#define DAVINCI_DMA_TIMER3_TINT3 51
|
||||
#define DAVINCI_DMA_PWM0 52
|
||||
#define DAVINCI_DMA_PWM1 53
|
||||
#define DAVINCI_DMA_PWM2 54
|
||||
|
||||
/*ch_status paramater of callback function possible values*/
|
||||
#define DMA_COMPLETE 1
|
||||
#define DMA_CC_ERROR 2
|
||||
#define DMA_TC1_ERROR 3
|
||||
#define DMA_TC2_ERROR 4
|
||||
|
||||
enum address_mode {
|
||||
INCR = 0,
|
||||
FIFO = 1
|
||||
};
|
||||
|
||||
enum fifo_width {
|
||||
W8BIT = 0,
|
||||
W16BIT = 1,
|
||||
W32BIT = 2,
|
||||
W64BIT = 3,
|
||||
W128BIT = 4,
|
||||
W256BIT = 5
|
||||
};
|
||||
|
||||
enum dma_event_q {
|
||||
EVENTQ_0 = 0,
|
||||
EVENTQ_1 = 1,
|
||||
EVENTQ_DEFAULT = -1
|
||||
};
|
||||
|
||||
enum sync_dimension {
|
||||
ASYNC = 0,
|
||||
ABSYNC = 1
|
||||
};
|
||||
|
||||
#define EDMA_CHANNEL_ANY -1 /* for edma_alloc_channel() */
|
||||
#define EDMA_SLOT_ANY -1 /* for edma_alloc_slot() */
|
||||
|
||||
/* alloc/free DMA channels and their dedicated parameter RAM slots */
|
||||
int edma_alloc_channel(int channel,
|
||||
void (*callback)(unsigned channel, u16 ch_status, void *data),
|
||||
void *data, enum dma_event_q);
|
||||
void edma_free_channel(unsigned channel);
|
||||
|
||||
/* alloc/free parameter RAM slots */
|
||||
int edma_alloc_slot(int slot);
|
||||
void edma_free_slot(unsigned slot);
|
||||
|
||||
/* calls that operate on part of a parameter RAM slot */
|
||||
void edma_set_src(unsigned slot, dma_addr_t src_port,
|
||||
enum address_mode mode, enum fifo_width);
|
||||
void edma_set_dest(unsigned slot, dma_addr_t dest_port,
|
||||
enum address_mode mode, enum fifo_width);
|
||||
void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
|
||||
void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
|
||||
void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
|
||||
void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
|
||||
u16 bcnt_rld, enum sync_dimension sync_mode);
|
||||
void edma_link(unsigned from, unsigned to);
|
||||
void edma_unlink(unsigned from);
|
||||
|
||||
/* calls that operate on an entire parameter RAM slot */
|
||||
void edma_write_slot(unsigned slot, const struct edmacc_param *params);
|
||||
void edma_read_slot(unsigned slot, struct edmacc_param *params);
|
||||
|
||||
/* channel control operations */
|
||||
int edma_start(unsigned channel);
|
||||
void edma_stop(unsigned channel);
|
||||
void edma_clean_channel(unsigned channel);
|
||||
void edma_clear_event(unsigned channel);
|
||||
void edma_pause(unsigned channel);
|
||||
void edma_resume(unsigned channel);
|
||||
|
||||
/* UNRELATED TO DMA */
|
||||
int davinci_alloc_iram(unsigned size);
|
||||
void davinci_free_iram(unsigned addr, unsigned size);
|
||||
|
||||
/* platform_data for EDMA driver */
|
||||
struct edma_soc_info {
|
||||
|
||||
/* how many dma resources of each type */
|
||||
unsigned n_channel;
|
||||
unsigned n_region;
|
||||
unsigned n_slot;
|
||||
unsigned n_tc;
|
||||
|
||||
/* list of channels with no even trigger; terminated by "-1" */
|
||||
const s8 *noevent;
|
||||
};
|
||||
|
||||
#endif
|
|
@ -15,9 +15,11 @@
|
|||
|
||||
#include <linux/io.h>
|
||||
#include <asm-generic/gpio.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#define DAVINCI_GPIO_BASE 0x01C67000
|
||||
|
||||
/*
|
||||
* basic gpio routines
|
||||
*
|
||||
|
@ -26,23 +28,18 @@
|
|||
* go through boot loaders.
|
||||
*
|
||||
* the gpio clock will be turned on when gpios are used, and you may also
|
||||
* need to pay attention to PINMUX0 and PINMUX1 to be sure those pins are
|
||||
* need to pay attention to PINMUX registers to be sure those pins are
|
||||
* used as gpios, not with other peripherals.
|
||||
*
|
||||
* On-chip GPIOs are numbered 0..(DAVINCI_N_GPIO-1). For documentation,
|
||||
* and maybe for later updates, code should write GPIO(N) or:
|
||||
* - GPIOV18(N) for 1.8V pins, N in 0..53; same as GPIO(0)..GPIO(53)
|
||||
* - GPIOV33(N) for 3.3V pins, N in 0..17; same as GPIO(54)..GPIO(70)
|
||||
*
|
||||
* For GPIO IRQs use gpio_to_irq(GPIO(N)) or gpio_to_irq(GPIOV33(N)) etc
|
||||
* for now, that's != GPIO(N)
|
||||
* and maybe for later updates, code may write GPIO(N). These may be
|
||||
* all 1.8V signals, all 3.3V ones, or a mix of the two. A given chip
|
||||
* may not support all the GPIOs in that range.
|
||||
*
|
||||
* GPIOs can also be on external chips, numbered after the ones built-in
|
||||
* to the DaVinci chip. For now, they won't be usable as IRQ sources.
|
||||
*/
|
||||
#define GPIO(X) (X) /* 0 <= X <= 70 */
|
||||
#define GPIOV18(X) (X) /* 1.8V i/o; 0 <= X <= 53 */
|
||||
#define GPIOV33(X) ((X)+54) /* 3.3V i/o; 0 <= X <= 17 */
|
||||
#define GPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
|
||||
|
||||
struct gpio_controller {
|
||||
u32 dir;
|
||||
|
@ -71,12 +68,14 @@ __gpio_to_controller(unsigned gpio)
|
|||
{
|
||||
void *__iomem ptr;
|
||||
|
||||
if (gpio < 32)
|
||||
if (gpio < 32 * 1)
|
||||
ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x10);
|
||||
else if (gpio < 64)
|
||||
else if (gpio < 32 * 2)
|
||||
ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x38);
|
||||
else if (gpio < DAVINCI_N_GPIO)
|
||||
else if (gpio < 32 * 3)
|
||||
ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x60);
|
||||
else if (gpio < 32 * 4)
|
||||
ptr = IO_ADDRESS(DAVINCI_GPIO_BASE + 0x88);
|
||||
else
|
||||
ptr = NULL;
|
||||
return ptr;
|
||||
|
|
|
@ -1,9 +1,9 @@
|
|||
/*
|
||||
* Common hardware definitions
|
||||
* Hardware definitions common to all DaVinci family processors
|
||||
*
|
||||
* Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
|
||||
* Author: Kevin Hilman, Deep Root Systems, LLC
|
||||
*
|
||||
* 2007 (c) MontaVista Software, Inc. This file is licensed under
|
||||
* 2007 (c) Deep Root Systems, LLC. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
|
@ -12,41 +12,16 @@
|
|||
#define __ASM_ARCH_HARDWARE_H
|
||||
|
||||
/*
|
||||
* Base register addresses
|
||||
* Before you add anything to ths file:
|
||||
*
|
||||
* This header is for defines common to ALL DaVinci family chips.
|
||||
* Anything that is chip specific should go in <chipname>.h,
|
||||
* and the chip/board init code should then explicitly include
|
||||
* <chipname>.h
|
||||
*/
|
||||
#define DAVINCI_DMA_3PCC_BASE (0x01C00000)
|
||||
#define DAVINCI_DMA_3PTC0_BASE (0x01C10000)
|
||||
#define DAVINCI_DMA_3PTC1_BASE (0x01C10400)
|
||||
#define DAVINCI_I2C_BASE (0x01C21000)
|
||||
#define DAVINCI_PWM0_BASE (0x01C22000)
|
||||
#define DAVINCI_PWM1_BASE (0x01C22400)
|
||||
#define DAVINCI_PWM2_BASE (0x01C22800)
|
||||
#define DAVINCI_SYSTEM_MODULE_BASE (0x01C40000)
|
||||
#define DAVINCI_PLL_CNTRL0_BASE (0x01C40800)
|
||||
#define DAVINCI_PLL_CNTRL1_BASE (0x01C40C00)
|
||||
#define DAVINCI_PWR_SLEEP_CNTRL_BASE (0x01C41000)
|
||||
#define DAVINCI_SYSTEM_DFT_BASE (0x01C42000)
|
||||
#define DAVINCI_IEEE1394_BASE (0x01C60000)
|
||||
#define DAVINCI_USB_OTG_BASE (0x01C64000)
|
||||
#define DAVINCI_CFC_ATA_BASE (0x01C66000)
|
||||
#define DAVINCI_SPI_BASE (0x01C66800)
|
||||
#define DAVINCI_GPIO_BASE (0x01C67000)
|
||||
#define DAVINCI_UHPI_BASE (0x01C67800)
|
||||
#define DAVINCI_VPSS_REGS_BASE (0x01C70000)
|
||||
#define DAVINCI_EMAC_CNTRL_REGS_BASE (0x01C80000)
|
||||
#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE (0x01C81000)
|
||||
#define DAVINCI_EMAC_WRAPPER_RAM_BASE (0x01C82000)
|
||||
#define DAVINCI_MDIO_CNTRL_REGS_BASE (0x01C84000)
|
||||
#define DAVINCI_IMCOP_BASE (0x01CC0000)
|
||||
#define DAVINCI_ASYNC_EMIF_CNTRL_BASE (0x01E00000)
|
||||
#define DAVINCI_VLYNQ_BASE (0x01E01000)
|
||||
#define DAVINCI_MCBSP_BASE (0x01E02000)
|
||||
#define DAVINCI_MMC_SD_BASE (0x01E10000)
|
||||
#define DAVINCI_MS_BASE (0x01E20000)
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000)
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000)
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000)
|
||||
#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000)
|
||||
#define DAVINCI_VLYNQ_REMOTE_BASE (0x0C000000)
|
||||
#define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000
|
||||
|
||||
/* System control register offsets */
|
||||
#define DM64XX_VDD3P3V_PWDN 0x48
|
||||
|
||||
#endif /* __ASM_ARCH_HARDWARE_H */
|
||||
|
|
|
@ -40,22 +40,12 @@
|
|||
#else
|
||||
#define IOMEM(x) ((void __force __iomem *)(x))
|
||||
|
||||
/*
|
||||
* Functions to access the DaVinci IO region
|
||||
*
|
||||
* NOTE: - Use davinci_read/write[bwl] for physical register addresses
|
||||
* - Use __raw_read/write[bwl]() for virtual register addresses
|
||||
* - Use IO_ADDRESS(phys_addr) to convert registers to virtual addresses
|
||||
* - DO NOT use hardcoded virtual addresses to allow changing the
|
||||
* IO address space again if needed
|
||||
*/
|
||||
#define davinci_readb(a) __raw_readb(IO_ADDRESS(a))
|
||||
#define davinci_readw(a) __raw_readw(IO_ADDRESS(a))
|
||||
#define davinci_readl(a) __raw_readl(IO_ADDRESS(a))
|
||||
#define __arch_ioremap(p, s, t) davinci_ioremap(p, s, t)
|
||||
#define __arch_iounmap(v) davinci_iounmap(v)
|
||||
|
||||
#define davinci_writeb(v, a) __raw_writeb(v, IO_ADDRESS(a))
|
||||
#define davinci_writew(v, a) __raw_writew(v, IO_ADDRESS(a))
|
||||
#define davinci_writel(v, a) __raw_writel(v, IO_ADDRESS(a))
|
||||
void __iomem *davinci_ioremap(unsigned long phys, size_t size,
|
||||
unsigned int type);
|
||||
void davinci_iounmap(volatile void __iomem *addr);
|
||||
|
||||
#endif /* __ASSEMBLER__ */
|
||||
#endif /* __ASM_ARCH_IO_H */
|
||||
|
|
|
@ -96,10 +96,111 @@
|
|||
#define IRQ_EMUINT 63
|
||||
|
||||
#define DAVINCI_N_AINTC_IRQ 64
|
||||
#define DAVINCI_N_GPIO 71
|
||||
#define DAVINCI_N_GPIO 104
|
||||
|
||||
#define NR_IRQS (DAVINCI_N_AINTC_IRQ + DAVINCI_N_GPIO)
|
||||
|
||||
#define ARCH_TIMER_IRQ IRQ_TINT1_TINT34
|
||||
|
||||
/* DaVinci DM6467-specific Interrupts */
|
||||
#define IRQ_DM646X_VP_VERTINT0 0
|
||||
#define IRQ_DM646X_VP_VERTINT1 1
|
||||
#define IRQ_DM646X_VP_VERTINT2 2
|
||||
#define IRQ_DM646X_VP_VERTINT3 3
|
||||
#define IRQ_DM646X_VP_ERRINT 4
|
||||
#define IRQ_DM646X_RESERVED_1 5
|
||||
#define IRQ_DM646X_RESERVED_2 6
|
||||
#define IRQ_DM646X_WDINT 7
|
||||
#define IRQ_DM646X_CRGENINT0 8
|
||||
#define IRQ_DM646X_CRGENINT1 9
|
||||
#define IRQ_DM646X_TSIFINT0 10
|
||||
#define IRQ_DM646X_TSIFINT1 11
|
||||
#define IRQ_DM646X_VDCEINT 12
|
||||
#define IRQ_DM646X_USBINT 13
|
||||
#define IRQ_DM646X_USBDMAINT 14
|
||||
#define IRQ_DM646X_PCIINT 15
|
||||
#define IRQ_DM646X_TCERRINT2 20
|
||||
#define IRQ_DM646X_TCERRINT3 21
|
||||
#define IRQ_DM646X_IDE 22
|
||||
#define IRQ_DM646X_HPIINT 23
|
||||
#define IRQ_DM646X_EMACRXTHINT 24
|
||||
#define IRQ_DM646X_EMACRXINT 25
|
||||
#define IRQ_DM646X_EMACTXINT 26
|
||||
#define IRQ_DM646X_EMACMISCINT 27
|
||||
#define IRQ_DM646X_MCASP0TXINT 28
|
||||
#define IRQ_DM646X_MCASP0RXINT 29
|
||||
#define IRQ_DM646X_RESERVED_3 31
|
||||
#define IRQ_DM646X_MCASP1TXINT 32
|
||||
#define IRQ_DM646X_VLQINT 38
|
||||
#define IRQ_DM646X_UARTINT2 42
|
||||
#define IRQ_DM646X_SPINT0 43
|
||||
#define IRQ_DM646X_SPINT1 44
|
||||
#define IRQ_DM646X_DSP2ARMINT 45
|
||||
#define IRQ_DM646X_RESERVED_4 46
|
||||
#define IRQ_DM646X_PSCINT 47
|
||||
#define IRQ_DM646X_GPIO0 48
|
||||
#define IRQ_DM646X_GPIO1 49
|
||||
#define IRQ_DM646X_GPIO2 50
|
||||
#define IRQ_DM646X_GPIO3 51
|
||||
#define IRQ_DM646X_GPIO4 52
|
||||
#define IRQ_DM646X_GPIO5 53
|
||||
#define IRQ_DM646X_GPIO6 54
|
||||
#define IRQ_DM646X_GPIO7 55
|
||||
#define IRQ_DM646X_GPIOBNK0 56
|
||||
#define IRQ_DM646X_GPIOBNK1 57
|
||||
#define IRQ_DM646X_GPIOBNK2 58
|
||||
#define IRQ_DM646X_DDRINT 59
|
||||
#define IRQ_DM646X_AEMIFINT 60
|
||||
|
||||
/* DaVinci DM355-specific Interrupts */
|
||||
#define IRQ_DM355_CCDC_VDINT0 0
|
||||
#define IRQ_DM355_CCDC_VDINT1 1
|
||||
#define IRQ_DM355_CCDC_VDINT2 2
|
||||
#define IRQ_DM355_IPIPE_HST 3
|
||||
#define IRQ_DM355_H3AINT 4
|
||||
#define IRQ_DM355_IPIPE_SDR 5
|
||||
#define IRQ_DM355_IPIPEIFINT 6
|
||||
#define IRQ_DM355_OSDINT 7
|
||||
#define IRQ_DM355_VENCINT 8
|
||||
#define IRQ_DM355_IMCOPINT 11
|
||||
#define IRQ_DM355_RTOINT 13
|
||||
#define IRQ_DM355_TINT4 13
|
||||
#define IRQ_DM355_TINT2_TINT12 13
|
||||
#define IRQ_DM355_UARTINT2 14
|
||||
#define IRQ_DM355_TINT5 14
|
||||
#define IRQ_DM355_TINT2_TINT34 14
|
||||
#define IRQ_DM355_TINT6 15
|
||||
#define IRQ_DM355_TINT3_TINT12 15
|
||||
#define IRQ_DM355_SPINT1_0 17
|
||||
#define IRQ_DM355_SPINT1_1 18
|
||||
#define IRQ_DM355_SPINT2_0 19
|
||||
#define IRQ_DM355_SPINT2_1 21
|
||||
#define IRQ_DM355_TINT7 22
|
||||
#define IRQ_DM355_TINT3_TINT34 22
|
||||
#define IRQ_DM355_SDIOINT0 23
|
||||
#define IRQ_DM355_MMCINT0 26
|
||||
#define IRQ_DM355_MSINT 26
|
||||
#define IRQ_DM355_MMCINT1 27
|
||||
#define IRQ_DM355_PWMINT3 28
|
||||
#define IRQ_DM355_SDIOINT1 31
|
||||
#define IRQ_DM355_SPINT0_0 42
|
||||
#define IRQ_DM355_SPINT0_1 43
|
||||
#define IRQ_DM355_GPIO0 44
|
||||
#define IRQ_DM355_GPIO1 45
|
||||
#define IRQ_DM355_GPIO2 46
|
||||
#define IRQ_DM355_GPIO3 47
|
||||
#define IRQ_DM355_GPIO4 48
|
||||
#define IRQ_DM355_GPIO5 49
|
||||
#define IRQ_DM355_GPIO6 50
|
||||
#define IRQ_DM355_GPIO7 51
|
||||
#define IRQ_DM355_GPIO8 52
|
||||
#define IRQ_DM355_GPIO9 53
|
||||
#define IRQ_DM355_GPIOBNK0 54
|
||||
#define IRQ_DM355_GPIOBNK1 55
|
||||
#define IRQ_DM355_GPIOBNK2 56
|
||||
#define IRQ_DM355_GPIOBNK3 57
|
||||
#define IRQ_DM355_GPIOBNK4 58
|
||||
#define IRQ_DM355_GPIOBNK5 59
|
||||
#define IRQ_DM355_GPIOBNK6 60
|
||||
|
||||
#endif /* __ASM_ARCH_IRQS_H */
|
||||
|
|
|
@ -1,55 +1,183 @@
|
|||
/*
|
||||
* DaVinci pin multiplexing defines
|
||||
* Table of the DAVINCI register configurations for the PINMUX combinations
|
||||
*
|
||||
* Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
|
||||
*
|
||||
* Based on linux/include/asm-arm/arch-omap/mux.h:
|
||||
* Copyright (C) 2003 - 2005 Nokia Corporation
|
||||
*
|
||||
* Written by Tony Lindgren
|
||||
*
|
||||
* 2007 (c) MontaVista Software, Inc. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*
|
||||
* Copyright (C) 2008 Texas Instruments.
|
||||
*/
|
||||
#ifndef __ASM_ARCH_MUX_H
|
||||
#define __ASM_ARCH_MUX_H
|
||||
|
||||
#define DAVINCI_MUX_AEAW0 0
|
||||
#define DAVINCI_MUX_AEAW1 1
|
||||
#define DAVINCI_MUX_AEAW2 2
|
||||
#define DAVINCI_MUX_AEAW3 3
|
||||
#define DAVINCI_MUX_AEAW4 4
|
||||
#define DAVINCI_MUX_AECS4 10
|
||||
#define DAVINCI_MUX_AECS5 11
|
||||
#define DAVINCI_MUX_VLYNQWD0 12
|
||||
#define DAVINCI_MUX_VLYNQWD1 13
|
||||
#define DAVINCI_MUX_VLSCREN 14
|
||||
#define DAVINCI_MUX_VLYNQEN 15
|
||||
#define DAVINCI_MUX_HDIREN 16
|
||||
#define DAVINCI_MUX_ATAEN 17
|
||||
#define DAVINCI_MUX_RGB666 22
|
||||
#define DAVINCI_MUX_RGB888 23
|
||||
#define DAVINCI_MUX_LOEEN 24
|
||||
#define DAVINCI_MUX_LFLDEN 25
|
||||
#define DAVINCI_MUX_CWEN 26
|
||||
#define DAVINCI_MUX_CFLDEN 27
|
||||
#define DAVINCI_MUX_HPIEN 29
|
||||
#define DAVINCI_MUX_1394EN 30
|
||||
#define DAVINCI_MUX_EMACEN 31
|
||||
#ifndef __INC_MACH_MUX_H
|
||||
#define __INC_MACH_MUX_H
|
||||
|
||||
#define DAVINCI_MUX_LEVEL2 32
|
||||
#define DAVINCI_MUX_UART0 (DAVINCI_MUX_LEVEL2 + 0)
|
||||
#define DAVINCI_MUX_UART1 (DAVINCI_MUX_LEVEL2 + 1)
|
||||
#define DAVINCI_MUX_UART2 (DAVINCI_MUX_LEVEL2 + 2)
|
||||
#define DAVINCI_MUX_U2FLO (DAVINCI_MUX_LEVEL2 + 3)
|
||||
#define DAVINCI_MUX_PWM0 (DAVINCI_MUX_LEVEL2 + 4)
|
||||
#define DAVINCI_MUX_PWM1 (DAVINCI_MUX_LEVEL2 + 5)
|
||||
#define DAVINCI_MUX_PWM2 (DAVINCI_MUX_LEVEL2 + 6)
|
||||
#define DAVINCI_MUX_I2C (DAVINCI_MUX_LEVEL2 + 7)
|
||||
#define DAVINCI_MUX_SPI (DAVINCI_MUX_LEVEL2 + 8)
|
||||
#define DAVINCI_MUX_MSTK (DAVINCI_MUX_LEVEL2 + 9)
|
||||
#define DAVINCI_MUX_ASP (DAVINCI_MUX_LEVEL2 + 10)
|
||||
#define DAVINCI_MUX_CLK0 (DAVINCI_MUX_LEVEL2 + 16)
|
||||
#define DAVINCI_MUX_CLK1 (DAVINCI_MUX_LEVEL2 + 17)
|
||||
#define DAVINCI_MUX_TIMIN (DAVINCI_MUX_LEVEL2 + 18)
|
||||
/* System module registers */
|
||||
#define PINMUX0 0x00
|
||||
#define PINMUX1 0x04
|
||||
/* dm355 only */
|
||||
#define PINMUX2 0x08
|
||||
#define PINMUX3 0x0c
|
||||
#define PINMUX4 0x10
|
||||
#define INTMUX 0x18
|
||||
#define EVTMUX 0x1c
|
||||
|
||||
extern void davinci_mux_peripheral(unsigned int mux, unsigned int enable);
|
||||
struct mux_config {
|
||||
const char *name;
|
||||
const char *mux_reg_name;
|
||||
const unsigned char mux_reg;
|
||||
const unsigned char mask_offset;
|
||||
const unsigned char mask;
|
||||
const unsigned char mode;
|
||||
bool debug;
|
||||
};
|
||||
|
||||
#endif /* __ASM_ARCH_MUX_H */
|
||||
enum davinci_dm644x_index {
|
||||
/* ATA and HDDIR functions */
|
||||
DM644X_HDIREN,
|
||||
DM644X_ATAEN,
|
||||
DM644X_ATAEN_DISABLE,
|
||||
|
||||
/* HPI functions */
|
||||
DM644X_HPIEN_DISABLE,
|
||||
|
||||
/* AEAW functions */
|
||||
DM644X_AEAW,
|
||||
|
||||
/* Memory Stick */
|
||||
DM644X_MSTK,
|
||||
|
||||
/* I2C */
|
||||
DM644X_I2C,
|
||||
|
||||
/* ASP function */
|
||||
DM644X_MCBSP,
|
||||
|
||||
/* UART1 */
|
||||
DM644X_UART1,
|
||||
|
||||
/* UART2 */
|
||||
DM644X_UART2,
|
||||
|
||||
/* PWM0 */
|
||||
DM644X_PWM0,
|
||||
|
||||
/* PWM1 */
|
||||
DM644X_PWM1,
|
||||
|
||||
/* PWM2 */
|
||||
DM644X_PWM2,
|
||||
|
||||
/* VLYNQ function */
|
||||
DM644X_VLYNQEN,
|
||||
DM644X_VLSCREN,
|
||||
DM644X_VLYNQWD,
|
||||
|
||||
/* EMAC and MDIO function */
|
||||
DM644X_EMACEN,
|
||||
|
||||
/* GPIO3V[0:16] pins */
|
||||
DM644X_GPIO3V,
|
||||
|
||||
/* GPIO pins */
|
||||
DM644X_GPIO0,
|
||||
DM644X_GPIO3,
|
||||
DM644X_GPIO43_44,
|
||||
DM644X_GPIO46_47,
|
||||
|
||||
/* VPBE */
|
||||
DM644X_RGB666,
|
||||
|
||||
/* LCD */
|
||||
DM644X_LOEEN,
|
||||
DM644X_LFLDEN,
|
||||
};
|
||||
|
||||
enum davinci_dm646x_index {
|
||||
/* ATA function */
|
||||
DM646X_ATAEN,
|
||||
|
||||
/* AUDIO Clock */
|
||||
DM646X_AUDCK1,
|
||||
DM646X_AUDCK0,
|
||||
|
||||
/* CRGEN Control */
|
||||
DM646X_CRGMUX,
|
||||
|
||||
/* VPIF Control */
|
||||
DM646X_STSOMUX_DISABLE,
|
||||
DM646X_STSIMUX_DISABLE,
|
||||
DM646X_PTSOMUX_DISABLE,
|
||||
DM646X_PTSIMUX_DISABLE,
|
||||
|
||||
/* TSIF Control */
|
||||
DM646X_STSOMUX,
|
||||
DM646X_STSIMUX,
|
||||
DM646X_PTSOMUX_PARALLEL,
|
||||
DM646X_PTSIMUX_PARALLEL,
|
||||
DM646X_PTSOMUX_SERIAL,
|
||||
DM646X_PTSIMUX_SERIAL,
|
||||
};
|
||||
|
||||
enum davinci_dm355_index {
|
||||
/* MMC/SD 0 */
|
||||
DM355_MMCSD0,
|
||||
|
||||
/* MMC/SD 1 */
|
||||
DM355_SD1_CLK,
|
||||
DM355_SD1_CMD,
|
||||
DM355_SD1_DATA3,
|
||||
DM355_SD1_DATA2,
|
||||
DM355_SD1_DATA1,
|
||||
DM355_SD1_DATA0,
|
||||
|
||||
/* I2C */
|
||||
DM355_I2C_SDA,
|
||||
DM355_I2C_SCL,
|
||||
|
||||
/* ASP0 function */
|
||||
DM355_MCBSP0_BDX,
|
||||
DM355_MCBSP0_X,
|
||||
DM355_MCBSP0_BFSX,
|
||||
DM355_MCBSP0_BDR,
|
||||
DM355_MCBSP0_R,
|
||||
DM355_MCBSP0_BFSR,
|
||||
|
||||
/* SPI0 */
|
||||
DM355_SPI0_SDI,
|
||||
DM355_SPI0_SDENA0,
|
||||
DM355_SPI0_SDENA1,
|
||||
|
||||
/* IRQ muxing */
|
||||
DM355_INT_EDMA_CC,
|
||||
DM355_INT_EDMA_TC0_ERR,
|
||||
DM355_INT_EDMA_TC1_ERR,
|
||||
|
||||
/* EDMA event muxing */
|
||||
DM355_EVT8_ASP1_TX,
|
||||
DM355_EVT9_ASP1_RX,
|
||||
DM355_EVT26_MMC0_RX,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_DAVINCI_MUX
|
||||
/* setup pin muxing */
|
||||
extern void davinci_mux_init(void);
|
||||
extern int davinci_mux_register(const struct mux_config *pins,
|
||||
unsigned long size);
|
||||
extern int davinci_cfg_reg(unsigned long reg_cfg);
|
||||
#else
|
||||
/* boot loader does it all (no warnings from CONFIG_DAVINCI_MUX_WARNINGS) */
|
||||
static inline void davinci_mux_init(void) {}
|
||||
static inline int davinci_mux_register(const struct mux_config *pins,
|
||||
unsigned long size) { return 0; }
|
||||
static inline int davinci_cfg_reg(unsigned long reg_cfg) { return 0; }
|
||||
#endif
|
||||
|
||||
#endif /* __INC_MACH_MUX_H */
|
||||
|
|
|
@ -38,8 +38,6 @@
|
|||
#define DAVINCI_LPSC_TPTC1 4
|
||||
#define DAVINCI_LPSC_EMAC 5
|
||||
#define DAVINCI_LPSC_EMAC_WRAPPER 6
|
||||
#define DAVINCI_LPSC_MDIO 7
|
||||
#define DAVINCI_LPSC_IEEE1394 8
|
||||
#define DAVINCI_LPSC_USB 9
|
||||
#define DAVINCI_LPSC_ATA 10
|
||||
#define DAVINCI_LPSC_VLYNQ 11
|
||||
|
@ -47,7 +45,6 @@
|
|||
#define DAVINCI_LPSC_DDR_EMIF 13
|
||||
#define DAVINCI_LPSC_AEMIF 14
|
||||
#define DAVINCI_LPSC_MMC_SD 15
|
||||
#define DAVINCI_LPSC_MEMSTICK 16
|
||||
#define DAVINCI_LPSC_McBSP 17
|
||||
#define DAVINCI_LPSC_I2C 18
|
||||
#define DAVINCI_LPSC_UART0 19
|
||||
|
@ -73,4 +70,54 @@
|
|||
#define DAVINCI_LPSC_GEM 39
|
||||
#define DAVINCI_LPSC_IMCOP 40
|
||||
|
||||
#define DM355_LPSC_TIMER3 5
|
||||
#define DM355_LPSC_SPI1 6
|
||||
#define DM355_LPSC_MMC_SD1 7
|
||||
#define DM355_LPSC_McBSP1 8
|
||||
#define DM355_LPSC_PWM3 10
|
||||
#define DM355_LPSC_SPI2 11
|
||||
#define DM355_LPSC_RTO 12
|
||||
#define DM355_LPSC_VPSS_DAC 41
|
||||
|
||||
/*
|
||||
* LPSC Assignments
|
||||
*/
|
||||
#define DM646X_LPSC_ARM 0
|
||||
#define DM646X_LPSC_C64X_CPU 1
|
||||
#define DM646X_LPSC_HDVICP0 2
|
||||
#define DM646X_LPSC_HDVICP1 3
|
||||
#define DM646X_LPSC_TPCC 4
|
||||
#define DM646X_LPSC_TPTC0 5
|
||||
#define DM646X_LPSC_TPTC1 6
|
||||
#define DM646X_LPSC_TPTC2 7
|
||||
#define DM646X_LPSC_TPTC3 8
|
||||
#define DM646X_LPSC_PCI 13
|
||||
#define DM646X_LPSC_EMAC 14
|
||||
#define DM646X_LPSC_VDCE 15
|
||||
#define DM646X_LPSC_VPSSMSTR 16
|
||||
#define DM646X_LPSC_VPSSSLV 17
|
||||
#define DM646X_LPSC_TSIF0 18
|
||||
#define DM646X_LPSC_TSIF1 19
|
||||
#define DM646X_LPSC_DDR_EMIF 20
|
||||
#define DM646X_LPSC_AEMIF 21
|
||||
#define DM646X_LPSC_McASP0 22
|
||||
#define DM646X_LPSC_McASP1 23
|
||||
#define DM646X_LPSC_CRGEN0 24
|
||||
#define DM646X_LPSC_CRGEN1 25
|
||||
#define DM646X_LPSC_UART0 26
|
||||
#define DM646X_LPSC_UART1 27
|
||||
#define DM646X_LPSC_UART2 28
|
||||
#define DM646X_LPSC_PWM0 29
|
||||
#define DM646X_LPSC_PWM1 30
|
||||
#define DM646X_LPSC_I2C 31
|
||||
#define DM646X_LPSC_SPI 32
|
||||
#define DM646X_LPSC_GPIO 33
|
||||
#define DM646X_LPSC_TIMER0 34
|
||||
#define DM646X_LPSC_TIMER1 35
|
||||
#define DM646X_LPSC_ARM_INTC 45
|
||||
|
||||
extern int davinci_psc_is_clk_active(unsigned int id);
|
||||
extern void davinci_psc_config(unsigned int domain, unsigned int id,
|
||||
char enable);
|
||||
|
||||
#endif /* __ASM_ARCH_PSC_H */
|
||||
|
|
|
@ -13,8 +13,23 @@
|
|||
|
||||
#include <mach/io.h>
|
||||
|
||||
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
|
||||
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
|
||||
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
|
||||
#define DAVINCI_MAX_NR_UARTS 3
|
||||
#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
|
||||
#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
|
||||
#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
|
||||
|
||||
#define DM355_UART2_BASE (IO_PHYS + 0x206000)
|
||||
|
||||
/* DaVinci UART register offsets */
|
||||
#define UART_DAVINCI_PWREMU 0x0c
|
||||
#define UART_DM646X_SCR 0x10
|
||||
#define UART_DM646X_SCR_TX_WATERMARK 0x08
|
||||
|
||||
struct davinci_uart_config {
|
||||
/* Bit field of UARTs present; bit 0 --> UART1 */
|
||||
unsigned int enabled_uarts;
|
||||
};
|
||||
|
||||
extern void davinci_serial_init(struct davinci_uart_config *);
|
||||
|
||||
#endif /* __ASM_ARCH_SERIAL_H */
|
||||
|
|
|
@ -51,7 +51,26 @@ void __init davinci_map_common_io(void)
|
|||
davinci_check_revision();
|
||||
}
|
||||
|
||||
void __init davinci_init_common_hw(void)
|
||||
#define BETWEEN(p, st, sz) ((p) >= (st) && (p) < ((st) + (sz)))
|
||||
#define XLATE(p, pst, vst) ((void __iomem *)((p) - (pst) + (vst)))
|
||||
|
||||
/*
|
||||
* Intercept ioremap() requests for addresses in our fixed mapping regions.
|
||||
*/
|
||||
void __iomem *davinci_ioremap(unsigned long p, size_t size, unsigned int type)
|
||||
{
|
||||
davinci_clk_init();
|
||||
if (BETWEEN(p, IO_PHYS, IO_SIZE))
|
||||
return XLATE(p, IO_PHYS, IO_VIRT);
|
||||
|
||||
return __arm_ioremap(p, size, type);
|
||||
}
|
||||
EXPORT_SYMBOL(davinci_ioremap);
|
||||
|
||||
void davinci_iounmap(volatile void __iomem *addr)
|
||||
{
|
||||
unsigned long virt = (unsigned long)addr;
|
||||
|
||||
if (virt >= VMALLOC_START && virt < VMALLOC_END)
|
||||
__iounmap(addr);
|
||||
}
|
||||
EXPORT_SYMBOL(davinci_iounmap);
|
||||
|
|
|
@ -25,6 +25,7 @@
|
|||
#include <linux/io.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/cputype.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
||||
#define IRQ_BIT(irq) ((irq) & 0x1f)
|
||||
|
@ -40,14 +41,18 @@
|
|||
#define IRQ_INTPRI0_REG_OFFSET 0x0030
|
||||
#define IRQ_INTPRI7_REG_OFFSET 0x004C
|
||||
|
||||
const u8 *davinci_def_priorities;
|
||||
|
||||
#define INTC_BASE IO_ADDRESS(DAVINCI_ARM_INTC_BASE)
|
||||
|
||||
static inline unsigned int davinci_irq_readl(int offset)
|
||||
{
|
||||
return davinci_readl(DAVINCI_ARM_INTC_BASE + offset);
|
||||
return __raw_readl(INTC_BASE + offset);
|
||||
}
|
||||
|
||||
static inline void davinci_irq_writel(unsigned long value, int offset)
|
||||
{
|
||||
davinci_writel(value, DAVINCI_ARM_INTC_BASE + offset);
|
||||
__raw_writel(value, INTC_BASE + offset);
|
||||
}
|
||||
|
||||
/* Disable interrupt */
|
||||
|
@ -108,9 +113,8 @@ static struct irq_chip davinci_irq_chip_0 = {
|
|||
.unmask = davinci_unmask_irq,
|
||||
};
|
||||
|
||||
|
||||
/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
|
||||
static const u8 default_priorities[DAVINCI_N_AINTC_IRQ] __initdata = {
|
||||
static const u8 dm644x_default_priorities[DAVINCI_N_AINTC_IRQ] __initdata = {
|
||||
[IRQ_VDINT0] = 2,
|
||||
[IRQ_VDINT1] = 6,
|
||||
[IRQ_VDINT2] = 6,
|
||||
|
@ -177,11 +181,149 @@ static const u8 default_priorities[DAVINCI_N_AINTC_IRQ] __initdata = {
|
|||
[IRQ_EMUINT] = 7,
|
||||
};
|
||||
|
||||
static const u8 dm646x_default_priorities[DAVINCI_N_AINTC_IRQ] = {
|
||||
[IRQ_DM646X_VP_VERTINT0] = 7,
|
||||
[IRQ_DM646X_VP_VERTINT1] = 7,
|
||||
[IRQ_DM646X_VP_VERTINT2] = 7,
|
||||
[IRQ_DM646X_VP_VERTINT3] = 7,
|
||||
[IRQ_DM646X_VP_ERRINT] = 7,
|
||||
[IRQ_DM646X_RESERVED_1] = 7,
|
||||
[IRQ_DM646X_RESERVED_2] = 7,
|
||||
[IRQ_DM646X_WDINT] = 7,
|
||||
[IRQ_DM646X_CRGENINT0] = 7,
|
||||
[IRQ_DM646X_CRGENINT1] = 7,
|
||||
[IRQ_DM646X_TSIFINT0] = 7,
|
||||
[IRQ_DM646X_TSIFINT1] = 7,
|
||||
[IRQ_DM646X_VDCEINT] = 7,
|
||||
[IRQ_DM646X_USBINT] = 7,
|
||||
[IRQ_DM646X_USBDMAINT] = 7,
|
||||
[IRQ_DM646X_PCIINT] = 7,
|
||||
[IRQ_CCINT0] = 7, /* dma */
|
||||
[IRQ_CCERRINT] = 7, /* dma */
|
||||
[IRQ_TCERRINT0] = 7, /* dma */
|
||||
[IRQ_TCERRINT] = 7, /* dma */
|
||||
[IRQ_DM646X_TCERRINT2] = 7,
|
||||
[IRQ_DM646X_TCERRINT3] = 7,
|
||||
[IRQ_DM646X_IDE] = 7,
|
||||
[IRQ_DM646X_HPIINT] = 7,
|
||||
[IRQ_DM646X_EMACRXTHINT] = 7,
|
||||
[IRQ_DM646X_EMACRXINT] = 7,
|
||||
[IRQ_DM646X_EMACTXINT] = 7,
|
||||
[IRQ_DM646X_EMACMISCINT] = 7,
|
||||
[IRQ_DM646X_MCASP0TXINT] = 7,
|
||||
[IRQ_DM646X_MCASP0RXINT] = 7,
|
||||
[IRQ_AEMIFINT] = 7,
|
||||
[IRQ_DM646X_RESERVED_3] = 7,
|
||||
[IRQ_DM646X_MCASP1TXINT] = 7, /* clockevent */
|
||||
[IRQ_TINT0_TINT34] = 7, /* clocksource */
|
||||
[IRQ_TINT1_TINT12] = 7, /* DSP timer */
|
||||
[IRQ_TINT1_TINT34] = 7, /* system tick */
|
||||
[IRQ_PWMINT0] = 7,
|
||||
[IRQ_PWMINT1] = 7,
|
||||
[IRQ_DM646X_VLQINT] = 7,
|
||||
[IRQ_I2C] = 7,
|
||||
[IRQ_UARTINT0] = 7,
|
||||
[IRQ_UARTINT1] = 7,
|
||||
[IRQ_DM646X_UARTINT2] = 7,
|
||||
[IRQ_DM646X_SPINT0] = 7,
|
||||
[IRQ_DM646X_SPINT1] = 7,
|
||||
[IRQ_DM646X_DSP2ARMINT] = 7,
|
||||
[IRQ_DM646X_RESERVED_4] = 7,
|
||||
[IRQ_DM646X_PSCINT] = 7,
|
||||
[IRQ_DM646X_GPIO0] = 7,
|
||||
[IRQ_DM646X_GPIO1] = 7,
|
||||
[IRQ_DM646X_GPIO2] = 7,
|
||||
[IRQ_DM646X_GPIO3] = 7,
|
||||
[IRQ_DM646X_GPIO4] = 7,
|
||||
[IRQ_DM646X_GPIO5] = 7,
|
||||
[IRQ_DM646X_GPIO6] = 7,
|
||||
[IRQ_DM646X_GPIO7] = 7,
|
||||
[IRQ_DM646X_GPIOBNK0] = 7,
|
||||
[IRQ_DM646X_GPIOBNK1] = 7,
|
||||
[IRQ_DM646X_GPIOBNK2] = 7,
|
||||
[IRQ_DM646X_DDRINT] = 7,
|
||||
[IRQ_DM646X_AEMIFINT] = 7,
|
||||
[IRQ_COMMTX] = 7,
|
||||
[IRQ_COMMRX] = 7,
|
||||
[IRQ_EMUINT] = 7,
|
||||
};
|
||||
|
||||
static const u8 dm355_default_priorities[DAVINCI_N_AINTC_IRQ] = {
|
||||
[IRQ_DM355_CCDC_VDINT0] = 2,
|
||||
[IRQ_DM355_CCDC_VDINT1] = 6,
|
||||
[IRQ_DM355_CCDC_VDINT2] = 6,
|
||||
[IRQ_DM355_IPIPE_HST] = 6,
|
||||
[IRQ_DM355_H3AINT] = 6,
|
||||
[IRQ_DM355_IPIPE_SDR] = 6,
|
||||
[IRQ_DM355_IPIPEIFINT] = 6,
|
||||
[IRQ_DM355_OSDINT] = 7,
|
||||
[IRQ_DM355_VENCINT] = 6,
|
||||
[IRQ_ASQINT] = 6,
|
||||
[IRQ_IMXINT] = 6,
|
||||
[IRQ_USBINT] = 4,
|
||||
[IRQ_DM355_RTOINT] = 4,
|
||||
[IRQ_DM355_UARTINT2] = 7,
|
||||
[IRQ_DM355_TINT6] = 7,
|
||||
[IRQ_CCINT0] = 5, /* dma */
|
||||
[IRQ_CCERRINT] = 5, /* dma */
|
||||
[IRQ_TCERRINT0] = 5, /* dma */
|
||||
[IRQ_TCERRINT] = 5, /* dma */
|
||||
[IRQ_DM355_SPINT2_1] = 7,
|
||||
[IRQ_DM355_TINT7] = 4,
|
||||
[IRQ_DM355_SDIOINT0] = 7,
|
||||
[IRQ_MBXINT] = 7,
|
||||
[IRQ_MBRINT] = 7,
|
||||
[IRQ_MMCINT] = 7,
|
||||
[IRQ_DM355_MMCINT1] = 7,
|
||||
[IRQ_DM355_PWMINT3] = 7,
|
||||
[IRQ_DDRINT] = 7,
|
||||
[IRQ_AEMIFINT] = 7,
|
||||
[IRQ_DM355_SDIOINT1] = 4,
|
||||
[IRQ_TINT0_TINT12] = 2, /* clockevent */
|
||||
[IRQ_TINT0_TINT34] = 2, /* clocksource */
|
||||
[IRQ_TINT1_TINT12] = 7, /* DSP timer */
|
||||
[IRQ_TINT1_TINT34] = 7, /* system tick */
|
||||
[IRQ_PWMINT0] = 7,
|
||||
[IRQ_PWMINT1] = 7,
|
||||
[IRQ_PWMINT2] = 7,
|
||||
[IRQ_I2C] = 3,
|
||||
[IRQ_UARTINT0] = 3,
|
||||
[IRQ_UARTINT1] = 3,
|
||||
[IRQ_DM355_SPINT0_0] = 3,
|
||||
[IRQ_DM355_SPINT0_1] = 3,
|
||||
[IRQ_DM355_GPIO0] = 3,
|
||||
[IRQ_DM355_GPIO1] = 7,
|
||||
[IRQ_DM355_GPIO2] = 4,
|
||||
[IRQ_DM355_GPIO3] = 4,
|
||||
[IRQ_DM355_GPIO4] = 7,
|
||||
[IRQ_DM355_GPIO5] = 7,
|
||||
[IRQ_DM355_GPIO6] = 7,
|
||||
[IRQ_DM355_GPIO7] = 7,
|
||||
[IRQ_DM355_GPIO8] = 7,
|
||||
[IRQ_DM355_GPIO9] = 7,
|
||||
[IRQ_DM355_GPIOBNK0] = 7,
|
||||
[IRQ_DM355_GPIOBNK1] = 7,
|
||||
[IRQ_DM355_GPIOBNK2] = 7,
|
||||
[IRQ_DM355_GPIOBNK3] = 7,
|
||||
[IRQ_DM355_GPIOBNK4] = 7,
|
||||
[IRQ_DM355_GPIOBNK5] = 7,
|
||||
[IRQ_DM355_GPIOBNK6] = 7,
|
||||
[IRQ_COMMTX] = 7,
|
||||
[IRQ_COMMRX] = 7,
|
||||
[IRQ_EMUINT] = 7,
|
||||
};
|
||||
|
||||
/* ARM Interrupt Controller Initialization */
|
||||
void __init davinci_irq_init(void)
|
||||
{
|
||||
unsigned i;
|
||||
const u8 *priority = default_priorities;
|
||||
|
||||
if (cpu_is_davinci_dm644x())
|
||||
davinci_def_priorities = dm644x_default_priorities;
|
||||
else if (cpu_is_davinci_dm646x())
|
||||
davinci_def_priorities = dm646x_default_priorities;
|
||||
else if (cpu_is_davinci_dm355())
|
||||
davinci_def_priorities = dm355_default_priorities;
|
||||
|
||||
/* Clear all interrupt requests */
|
||||
davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
|
||||
|
@ -209,8 +351,8 @@ void __init davinci_irq_init(void)
|
|||
unsigned j;
|
||||
u32 pri;
|
||||
|
||||
for (j = 0, pri = 0; j < 32; j += 4, priority++)
|
||||
pri |= (*priority & 0x07) << j;
|
||||
for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++)
|
||||
pri |= (*davinci_def_priorities & 0x07) << j;
|
||||
davinci_irq_writel(pri, i);
|
||||
}
|
||||
|
||||
|
|
|
@ -1,41 +1,103 @@
|
|||
/*
|
||||
* DaVinci pin multiplexing configurations
|
||||
* Utility to set the DAVINCI MUX register from a table in mux.h
|
||||
*
|
||||
* Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
|
||||
*
|
||||
* Based on linux/arch/arm/plat-omap/mux.c:
|
||||
* Copyright (C) 2003 - 2005 Nokia Corporation
|
||||
*
|
||||
* Written by Tony Lindgren
|
||||
*
|
||||
* 2007 (c) MontaVista Software, Inc. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*
|
||||
* Copyright (C) 2008 Texas Instruments.
|
||||
*/
|
||||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include <mach/mux.h>
|
||||
|
||||
/* System control register offsets */
|
||||
#define PINMUX0 0x00
|
||||
#define PINMUX1 0x04
|
||||
static const struct mux_config *mux_table;
|
||||
static unsigned long pin_table_sz;
|
||||
|
||||
static DEFINE_SPINLOCK(mux_lock);
|
||||
|
||||
void davinci_mux_peripheral(unsigned int mux, unsigned int enable)
|
||||
int __init davinci_mux_register(const struct mux_config *pins,
|
||||
unsigned long size)
|
||||
{
|
||||
u32 pinmux, muxreg = PINMUX0;
|
||||
mux_table = pins;
|
||||
pin_table_sz = size;
|
||||
|
||||
if (mux >= DAVINCI_MUX_LEVEL2) {
|
||||
muxreg = PINMUX1;
|
||||
mux -= DAVINCI_MUX_LEVEL2;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Sets the DAVINCI MUX register based on the table
|
||||
*/
|
||||
int __init_or_module davinci_cfg_reg(const unsigned long index)
|
||||
{
|
||||
static DEFINE_SPINLOCK(mux_spin_lock);
|
||||
void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
|
||||
unsigned long flags;
|
||||
const struct mux_config *cfg;
|
||||
unsigned int reg_orig = 0, reg = 0;
|
||||
unsigned int mask, warn = 0;
|
||||
|
||||
if (!mux_table)
|
||||
BUG();
|
||||
|
||||
if (index >= pin_table_sz) {
|
||||
printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
|
||||
index, pin_table_sz);
|
||||
dump_stack();
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
spin_lock(&mux_lock);
|
||||
pinmux = davinci_readl(DAVINCI_SYSTEM_MODULE_BASE + muxreg);
|
||||
if (enable)
|
||||
pinmux |= (1 << mux);
|
||||
else
|
||||
pinmux &= ~(1 << mux);
|
||||
davinci_writel(pinmux, DAVINCI_SYSTEM_MODULE_BASE + muxreg);
|
||||
spin_unlock(&mux_lock);
|
||||
cfg = &mux_table[index];
|
||||
|
||||
if (cfg->name == NULL) {
|
||||
printk(KERN_ERR "No entry for the specified index\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Update the mux register in question */
|
||||
if (cfg->mask) {
|
||||
unsigned tmp1, tmp2;
|
||||
|
||||
spin_lock_irqsave(&mux_spin_lock, flags);
|
||||
reg_orig = __raw_readl(base + cfg->mux_reg);
|
||||
|
||||
mask = (cfg->mask << cfg->mask_offset);
|
||||
tmp1 = reg_orig & mask;
|
||||
reg = reg_orig & ~mask;
|
||||
|
||||
tmp2 = (cfg->mode << cfg->mask_offset);
|
||||
reg |= tmp2;
|
||||
|
||||
if (tmp1 != tmp2)
|
||||
warn = 1;
|
||||
|
||||
__raw_writel(reg, base + cfg->mux_reg);
|
||||
spin_unlock_irqrestore(&mux_spin_lock, flags);
|
||||
}
|
||||
|
||||
if (warn) {
|
||||
#ifdef CONFIG_DAVINCI_MUX_WARNINGS
|
||||
printk(KERN_WARNING "MUX: initialized %s\n", cfg->name);
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_DAVINCI_MUX_DEBUG
|
||||
if (cfg->debug || warn) {
|
||||
printk(KERN_WARNING "MUX: Setting register %s\n", cfg->name);
|
||||
printk(KERN_WARNING " %s (0x%08x) = 0x%08x -> 0x%08x\n",
|
||||
cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(davinci_cfg_reg);
|
||||
|
|
51
arch/arm/mach-davinci/mux.h
Normal file
51
arch/arm/mach-davinci/mux.h
Normal file
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
* Pin-multiplex helper macros for TI DaVinci family devices
|
||||
*
|
||||
* Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com>
|
||||
*
|
||||
* 2007 (c) MontaVista Software, Inc. This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
*
|
||||
* Copyright (C) 2008 Texas Instruments.
|
||||
*/
|
||||
#ifndef _MACH_DAVINCI_MUX_H_
|
||||
#define _MACH_DAVINCI_MUX_H_
|
||||
|
||||
#include <mach/mux.h>
|
||||
|
||||
#define MUX_CFG(soc, desc, muxreg, mode_offset, mode_mask, mux_mode, dbg)\
|
||||
[soc##_##desc] = { \
|
||||
.name = #desc, \
|
||||
.debug = dbg, \
|
||||
.mux_reg_name = "PINMUX"#muxreg, \
|
||||
.mux_reg = PINMUX##muxreg, \
|
||||
.mask_offset = mode_offset, \
|
||||
.mask = mode_mask, \
|
||||
.mode = mux_mode, \
|
||||
},
|
||||
|
||||
#define INT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \
|
||||
[soc##_##desc] = { \
|
||||
.name = #desc, \
|
||||
.debug = dbg, \
|
||||
.mux_reg_name = "INTMUX", \
|
||||
.mux_reg = INTMUX, \
|
||||
.mask_offset = mode_offset, \
|
||||
.mask = mode_mask, \
|
||||
.mode = mux_mode, \
|
||||
},
|
||||
|
||||
#define EVT_CFG(soc, desc, mode_offset, mode_mask, mux_mode, dbg) \
|
||||
[soc##_##desc] = { \
|
||||
.name = #desc, \
|
||||
.debug = dbg, \
|
||||
.mux_reg_name = "EVTMUX", \
|
||||
.mux_reg = EVTMUX, \
|
||||
.mask_offset = mode_offset, \
|
||||
.mask = mode_mask, \
|
||||
.mode = mux_mode, \
|
||||
},
|
||||
|
||||
#endif /* _MACH_DAVINCI_MUX_H */
|
|
@ -23,10 +23,13 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <mach/cputype.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/psc.h>
|
||||
#include <mach/mux.h>
|
||||
|
||||
#define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01C41000
|
||||
|
||||
/* PSC register offsets */
|
||||
#define EPCPR 0x070
|
||||
#define PTCMD 0x120
|
||||
|
@ -36,102 +39,61 @@
|
|||
#define MDSTAT 0x800
|
||||
#define MDCTL 0xA00
|
||||
|
||||
/* System control register offsets */
|
||||
#define VDD3P3V_PWDN 0x48
|
||||
#define MDSTAT_STATE_MASK 0x1f
|
||||
|
||||
static void davinci_psc_mux(unsigned int id)
|
||||
/* Return nonzero iff the domain's clock is active */
|
||||
int __init davinci_psc_is_clk_active(unsigned int id)
|
||||
{
|
||||
switch (id) {
|
||||
case DAVINCI_LPSC_ATA:
|
||||
davinci_mux_peripheral(DAVINCI_MUX_HDIREN, 1);
|
||||
davinci_mux_peripheral(DAVINCI_MUX_ATAEN, 1);
|
||||
break;
|
||||
case DAVINCI_LPSC_MMC_SD:
|
||||
/* VDD power manupulations are done in U-Boot for CPMAC
|
||||
* so applies to MMC as well
|
||||
*/
|
||||
/*Set up the pull regiter for MMC */
|
||||
davinci_writel(0, DAVINCI_SYSTEM_MODULE_BASE + VDD3P3V_PWDN);
|
||||
davinci_mux_peripheral(DAVINCI_MUX_MSTK, 0);
|
||||
break;
|
||||
case DAVINCI_LPSC_I2C:
|
||||
davinci_mux_peripheral(DAVINCI_MUX_I2C, 1);
|
||||
break;
|
||||
case DAVINCI_LPSC_McBSP:
|
||||
davinci_mux_peripheral(DAVINCI_MUX_ASP, 1);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE);
|
||||
u32 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
|
||||
|
||||
/* if clocked, state can be "Enable" or "SyncReset" */
|
||||
return mdstat & BIT(12);
|
||||
}
|
||||
|
||||
/* Enable or disable a PSC domain */
|
||||
void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
|
||||
{
|
||||
u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl, mdstat_mask;
|
||||
u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
|
||||
void __iomem *psc_base = IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE);
|
||||
u32 next_state = enable ? 0x3 : 0x2; /* 0x3 enables, 0x2 disables */
|
||||
|
||||
mdctl = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id);
|
||||
if (enable)
|
||||
mdctl |= 0x00000003; /* Enable Module */
|
||||
else
|
||||
mdctl &= 0xFFFFFFF2; /* Disable Module */
|
||||
davinci_writel(mdctl, DAVINCI_PWR_SLEEP_CNTRL_BASE + MDCTL + 4 * id);
|
||||
mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
|
||||
mdctl &= ~MDSTAT_STATE_MASK;
|
||||
mdctl |= next_state;
|
||||
__raw_writel(mdctl, psc_base + MDCTL + 4 * id);
|
||||
|
||||
pdstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + PDSTAT);
|
||||
pdstat = __raw_readl(psc_base + PDSTAT);
|
||||
if ((pdstat & 0x00000001) == 0) {
|
||||
pdctl1 = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1);
|
||||
pdctl1 = __raw_readl(psc_base + PDCTL1);
|
||||
pdctl1 |= 0x1;
|
||||
davinci_writel(pdctl1, DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1);
|
||||
__raw_writel(pdctl1, psc_base + PDCTL1);
|
||||
|
||||
ptcmd = 1 << domain;
|
||||
davinci_writel(ptcmd, DAVINCI_PWR_SLEEP_CNTRL_BASE + PTCMD);
|
||||
__raw_writel(ptcmd, psc_base + PTCMD);
|
||||
|
||||
do {
|
||||
epcpr = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE +
|
||||
EPCPR);
|
||||
epcpr = __raw_readl(psc_base + EPCPR);
|
||||
} while ((((epcpr >> domain) & 1) == 0));
|
||||
|
||||
pdctl1 = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1);
|
||||
pdctl1 = __raw_readl(psc_base + PDCTL1);
|
||||
pdctl1 |= 0x100;
|
||||
davinci_writel(pdctl1, DAVINCI_PWR_SLEEP_CNTRL_BASE + PDCTL1);
|
||||
__raw_writel(pdctl1, psc_base + PDCTL1);
|
||||
|
||||
do {
|
||||
ptstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE +
|
||||
ptstat = __raw_readl(psc_base +
|
||||
PTSTAT);
|
||||
} while (!(((ptstat >> domain) & 1) == 0));
|
||||
} else {
|
||||
ptcmd = 1 << domain;
|
||||
davinci_writel(ptcmd, DAVINCI_PWR_SLEEP_CNTRL_BASE + PTCMD);
|
||||
__raw_writel(ptcmd, psc_base + PTCMD);
|
||||
|
||||
do {
|
||||
ptstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE +
|
||||
PTSTAT);
|
||||
ptstat = __raw_readl(psc_base + PTSTAT);
|
||||
} while (!(((ptstat >> domain) & 1) == 0));
|
||||
}
|
||||
|
||||
if (enable)
|
||||
mdstat_mask = 0x3;
|
||||
else
|
||||
mdstat_mask = 0x2;
|
||||
|
||||
do {
|
||||
mdstat = davinci_readl(DAVINCI_PWR_SLEEP_CNTRL_BASE +
|
||||
MDSTAT + 4 * id);
|
||||
} while (!((mdstat & 0x0000001F) == mdstat_mask));
|
||||
|
||||
if (enable)
|
||||
davinci_psc_mux(id);
|
||||
}
|
||||
|
||||
void __init davinci_psc_init(void)
|
||||
{
|
||||
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSMSTR, 1);
|
||||
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSSLV, 1);
|
||||
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPCC, 1);
|
||||
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC0, 1);
|
||||
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC1, 1);
|
||||
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_GPIO, 1);
|
||||
|
||||
/* Turn on WatchDog timer LPSC. Needed for RESET to work */
|
||||
davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TIMER2, 1);
|
||||
mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
|
||||
} while (!((mdstat & MDSTAT_STATE_MASK) == next_state));
|
||||
}
|
||||
|
|
|
@ -32,32 +32,47 @@
|
|||
#include <mach/hardware.h>
|
||||
#include <mach/serial.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/cputype.h>
|
||||
#include "clock.h"
|
||||
|
||||
#define UART_DAVINCI_PWREMU 0x0c
|
||||
|
||||
static inline unsigned int davinci_serial_in(struct plat_serial8250_port *up,
|
||||
int offset)
|
||||
static inline unsigned int serial_read_reg(struct plat_serial8250_port *up,
|
||||
int offset)
|
||||
{
|
||||
offset <<= up->regshift;
|
||||
return (unsigned int)__raw_readb(up->membase + offset);
|
||||
return (unsigned int)__raw_readl(IO_ADDRESS(up->mapbase) + offset);
|
||||
}
|
||||
|
||||
static inline void davinci_serial_outp(struct plat_serial8250_port *p,
|
||||
int offset, int value)
|
||||
static inline void serial_write_reg(struct plat_serial8250_port *p, int offset,
|
||||
int value)
|
||||
{
|
||||
offset <<= p->regshift;
|
||||
__raw_writeb(value, p->membase + offset);
|
||||
__raw_writel(value, IO_ADDRESS(p->mapbase) + offset);
|
||||
}
|
||||
|
||||
static struct plat_serial8250_port serial_platform_data[] = {
|
||||
{
|
||||
.membase = (char *)IO_ADDRESS(DAVINCI_UART0_BASE),
|
||||
.mapbase = (unsigned long)DAVINCI_UART0_BASE,
|
||||
.mapbase = DAVINCI_UART0_BASE,
|
||||
.irq = IRQ_UARTINT0,
|
||||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
|
||||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
|
||||
UPF_IOREMAP,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 2,
|
||||
},
|
||||
{
|
||||
.mapbase = DAVINCI_UART1_BASE,
|
||||
.irq = IRQ_UARTINT1,
|
||||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
|
||||
UPF_IOREMAP,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 2,
|
||||
},
|
||||
{
|
||||
.mapbase = DAVINCI_UART2_BASE,
|
||||
.irq = IRQ_UARTINT2,
|
||||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
|
||||
UPF_IOREMAP,
|
||||
.iotype = UPIO_MEM,
|
||||
.regshift = 2,
|
||||
.uartclk = 27000000,
|
||||
},
|
||||
{
|
||||
.flags = 0
|
||||
|
@ -74,22 +89,68 @@ static struct platform_device serial_device = {
|
|||
|
||||
static void __init davinci_serial_reset(struct plat_serial8250_port *p)
|
||||
{
|
||||
/* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
|
||||
unsigned int pwremu = 0;
|
||||
|
||||
davinci_serial_outp(p, UART_IER, 0); /* disable all interrupts */
|
||||
serial_write_reg(p, UART_IER, 0); /* disable all interrupts */
|
||||
|
||||
davinci_serial_outp(p, UART_DAVINCI_PWREMU, pwremu);
|
||||
/* reset both transmitter and receiver: bits 14,13 = UTRST, URRST */
|
||||
serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
|
||||
mdelay(10);
|
||||
|
||||
pwremu |= (0x3 << 13);
|
||||
pwremu |= 0x1;
|
||||
davinci_serial_outp(p, UART_DAVINCI_PWREMU, pwremu);
|
||||
serial_write_reg(p, UART_DAVINCI_PWREMU, pwremu);
|
||||
|
||||
if (cpu_is_davinci_dm646x())
|
||||
serial_write_reg(p, UART_DM646X_SCR,
|
||||
UART_DM646X_SCR_TX_WATERMARK);
|
||||
}
|
||||
|
||||
void __init davinci_serial_init(struct davinci_uart_config *info)
|
||||
{
|
||||
int i;
|
||||
char name[16];
|
||||
struct clk *uart_clk;
|
||||
struct device *dev = &serial_device.dev;
|
||||
|
||||
/*
|
||||
* Make sure the serial ports are muxed on at this point.
|
||||
* You have to mux them off in device drivers later on
|
||||
* if not needed.
|
||||
*/
|
||||
for (i = 0; i < DAVINCI_MAX_NR_UARTS; i++) {
|
||||
struct plat_serial8250_port *p = serial_platform_data + i;
|
||||
|
||||
if (!(info->enabled_uarts & (1 << i))) {
|
||||
p->flags = 0;
|
||||
continue;
|
||||
}
|
||||
|
||||
if (cpu_is_davinci_dm646x())
|
||||
p->iotype = UPIO_MEM32;
|
||||
|
||||
if (cpu_is_davinci_dm355()) {
|
||||
if (i == 2) {
|
||||
p->mapbase = (unsigned long)DM355_UART2_BASE;
|
||||
p->irq = IRQ_DM355_UARTINT2;
|
||||
}
|
||||
}
|
||||
|
||||
sprintf(name, "uart%d", i);
|
||||
uart_clk = clk_get(dev, name);
|
||||
if (IS_ERR(uart_clk))
|
||||
printk(KERN_ERR "%s:%d: failed to get UART%d clock\n",
|
||||
__func__, __LINE__, i);
|
||||
else {
|
||||
clk_enable(uart_clk);
|
||||
p->uartclk = clk_get_rate(uart_clk);
|
||||
davinci_serial_reset(p);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int __init davinci_init(void)
|
||||
{
|
||||
davinci_serial_reset(&serial_platform_data[0]);
|
||||
return platform_device_register(&serial_device);
|
||||
}
|
||||
|
||||
|
|
|
@ -16,6 +16,9 @@
|
|||
#include <linux/clockchips.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/device.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/system.h>
|
||||
|
@ -24,8 +27,11 @@
|
|||
#include <asm/mach/time.h>
|
||||
#include <asm/errno.h>
|
||||
#include <mach/io.h>
|
||||
#include <mach/cputype.h>
|
||||
#include "clock.h"
|
||||
|
||||
static struct clock_event_device clockevent_davinci;
|
||||
static unsigned int davinci_clock_tick_rate;
|
||||
|
||||
#define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400)
|
||||
#define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800)
|
||||
|
@ -99,9 +105,9 @@ struct timer_s {
|
|||
unsigned int id;
|
||||
unsigned long period;
|
||||
unsigned long opts;
|
||||
unsigned long reg_base;
|
||||
unsigned long tim_reg;
|
||||
unsigned long prd_reg;
|
||||
void __iomem *base;
|
||||
unsigned long tim_off;
|
||||
unsigned long prd_off;
|
||||
unsigned long enamode_shift;
|
||||
struct irqaction irqaction;
|
||||
};
|
||||
|
@ -114,15 +120,15 @@ static struct timer_s timers[];
|
|||
|
||||
static int timer32_config(struct timer_s *t)
|
||||
{
|
||||
u32 tcr = davinci_readl(t->reg_base + TCR);
|
||||
u32 tcr = __raw_readl(t->base + TCR);
|
||||
|
||||
/* disable timer */
|
||||
tcr &= ~(TCR_ENAMODE_MASK << t->enamode_shift);
|
||||
davinci_writel(tcr, t->reg_base + TCR);
|
||||
__raw_writel(tcr, t->base + TCR);
|
||||
|
||||
/* reset counter to zero, set new period */
|
||||
davinci_writel(0, t->tim_reg);
|
||||
davinci_writel(t->period, t->prd_reg);
|
||||
__raw_writel(0, t->base + t->tim_off);
|
||||
__raw_writel(t->period, t->base + t->prd_off);
|
||||
|
||||
/* Set enable mode */
|
||||
if (t->opts & TIMER_OPTS_ONESHOT) {
|
||||
|
@ -131,13 +137,13 @@ static int timer32_config(struct timer_s *t)
|
|||
tcr |= TCR_ENAMODE_PERIODIC << t->enamode_shift;
|
||||
}
|
||||
|
||||
davinci_writel(tcr, t->reg_base + TCR);
|
||||
__raw_writel(tcr, t->base + TCR);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline u32 timer32_read(struct timer_s *t)
|
||||
{
|
||||
return davinci_readl(t->tim_reg);
|
||||
return __raw_readl(t->base + t->tim_off);
|
||||
}
|
||||
|
||||
static irqreturn_t timer_interrupt(int irq, void *dev_id)
|
||||
|
@ -176,51 +182,54 @@ static struct timer_s timers[] = {
|
|||
|
||||
static void __init timer_init(void)
|
||||
{
|
||||
u32 bases[] = {DAVINCI_TIMER0_BASE, DAVINCI_TIMER1_BASE};
|
||||
u32 phys_bases[] = {DAVINCI_TIMER0_BASE, DAVINCI_TIMER1_BASE};
|
||||
int i;
|
||||
|
||||
/* Global init of each 64-bit timer as a whole */
|
||||
for(i=0; i<2; i++) {
|
||||
u32 tgcr, base = bases[i];
|
||||
u32 tgcr;
|
||||
void __iomem *base = IO_ADDRESS(phys_bases[i]);
|
||||
|
||||
/* Disabled, Internal clock source */
|
||||
davinci_writel(0, base + TCR);
|
||||
__raw_writel(0, base + TCR);
|
||||
|
||||
/* reset both timers, no pre-scaler for timer34 */
|
||||
tgcr = 0;
|
||||
davinci_writel(tgcr, base + TGCR);
|
||||
__raw_writel(tgcr, base + TGCR);
|
||||
|
||||
/* Set both timers to unchained 32-bit */
|
||||
tgcr = TGCR_TIMMODE_32BIT_UNCHAINED << TGCR_TIMMODE_SHIFT;
|
||||
davinci_writel(tgcr, base + TGCR);
|
||||
__raw_writel(tgcr, base + TGCR);
|
||||
|
||||
/* Unreset timers */
|
||||
tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
|
||||
(TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
|
||||
davinci_writel(tgcr, base + TGCR);
|
||||
__raw_writel(tgcr, base + TGCR);
|
||||
|
||||
/* Init both counters to zero */
|
||||
davinci_writel(0, base + TIM12);
|
||||
davinci_writel(0, base + TIM34);
|
||||
__raw_writel(0, base + TIM12);
|
||||
__raw_writel(0, base + TIM34);
|
||||
}
|
||||
|
||||
/* Init of each timer as a 32-bit timer */
|
||||
for (i=0; i< ARRAY_SIZE(timers); i++) {
|
||||
struct timer_s *t = &timers[i];
|
||||
u32 phys_base;
|
||||
|
||||
if (t->name) {
|
||||
t->id = i;
|
||||
t->reg_base = (IS_TIMER1(t->id) ?
|
||||
phys_base = (IS_TIMER1(t->id) ?
|
||||
DAVINCI_TIMER1_BASE : DAVINCI_TIMER0_BASE);
|
||||
t->base = IO_ADDRESS(phys_base);
|
||||
|
||||
if (IS_TIMER_BOT(t->id)) {
|
||||
t->enamode_shift = 6;
|
||||
t->tim_reg = t->reg_base + TIM12;
|
||||
t->prd_reg = t->reg_base + PRD12;
|
||||
t->tim_off = TIM12;
|
||||
t->prd_off = PRD12;
|
||||
} else {
|
||||
t->enamode_shift = 22;
|
||||
t->tim_reg = t->reg_base + TIM34;
|
||||
t->prd_reg = t->reg_base + PRD34;
|
||||
t->tim_off = TIM34;
|
||||
t->prd_off = PRD34;
|
||||
}
|
||||
|
||||
/* Register interrupt */
|
||||
|
@ -274,7 +283,7 @@ static void davinci_set_mode(enum clock_event_mode mode,
|
|||
|
||||
switch (mode) {
|
||||
case CLOCK_EVT_MODE_PERIODIC:
|
||||
t->period = CLOCK_TICK_RATE / (HZ);
|
||||
t->period = davinci_clock_tick_rate / (HZ);
|
||||
t->opts = TIMER_OPTS_PERIODIC;
|
||||
timer32_config(t);
|
||||
break;
|
||||
|
@ -301,21 +310,29 @@ static struct clock_event_device clockevent_davinci = {
|
|||
|
||||
static void __init davinci_timer_init(void)
|
||||
{
|
||||
struct clk *timer_clk;
|
||||
|
||||
static char err[] __initdata = KERN_ERR
|
||||
"%s: can't register clocksource!\n";
|
||||
|
||||
/* init timer hw */
|
||||
timer_init();
|
||||
|
||||
timer_clk = clk_get(NULL, "timer0");
|
||||
BUG_ON(IS_ERR(timer_clk));
|
||||
clk_enable(timer_clk);
|
||||
|
||||
davinci_clock_tick_rate = clk_get_rate(timer_clk);
|
||||
|
||||
/* setup clocksource */
|
||||
clocksource_davinci.mult =
|
||||
clocksource_khz2mult(CLOCK_TICK_RATE/1000,
|
||||
clocksource_khz2mult(davinci_clock_tick_rate/1000,
|
||||
clocksource_davinci.shift);
|
||||
if (clocksource_register(&clocksource_davinci))
|
||||
printk(err, clocksource_davinci.name);
|
||||
|
||||
/* setup clockevent */
|
||||
clockevent_davinci.mult = div_sc(CLOCK_TICK_RATE, NSEC_PER_SEC,
|
||||
clockevent_davinci.mult = div_sc(davinci_clock_tick_rate, NSEC_PER_SEC,
|
||||
clockevent_davinci.shift);
|
||||
clockevent_davinci.max_delta_ns =
|
||||
clockevent_delta2ns(0xfffffffe, &clockevent_davinci);
|
||||
|
@ -333,42 +350,52 @@ struct sys_timer davinci_timer = {
|
|||
|
||||
/* reset board using watchdog timer */
|
||||
void davinci_watchdog_reset(void) {
|
||||
u32 tgcr, wdtcr, base = DAVINCI_WDOG_BASE;
|
||||
u32 tgcr, wdtcr;
|
||||
void __iomem *base = IO_ADDRESS(DAVINCI_WDOG_BASE);
|
||||
struct device dev;
|
||||
struct clk *wd_clk;
|
||||
char *name = "watchdog";
|
||||
|
||||
dev_set_name(&dev, name);
|
||||
wd_clk = clk_get(&dev, NULL);
|
||||
if (WARN_ON(IS_ERR(wd_clk)))
|
||||
return;
|
||||
clk_enable(wd_clk);
|
||||
|
||||
/* disable, internal clock source */
|
||||
davinci_writel(0, base + TCR);
|
||||
__raw_writel(0, base + TCR);
|
||||
|
||||
/* reset timer, set mode to 64-bit watchdog, and unreset */
|
||||
tgcr = 0;
|
||||
davinci_writel(tgcr, base + TCR);
|
||||
__raw_writel(tgcr, base + TCR);
|
||||
tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT;
|
||||
tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
|
||||
(TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
|
||||
davinci_writel(tgcr, base + TCR);
|
||||
__raw_writel(tgcr, base + TCR);
|
||||
|
||||
/* clear counter and period regs */
|
||||
davinci_writel(0, base + TIM12);
|
||||
davinci_writel(0, base + TIM34);
|
||||
davinci_writel(0, base + PRD12);
|
||||
davinci_writel(0, base + PRD34);
|
||||
__raw_writel(0, base + TIM12);
|
||||
__raw_writel(0, base + TIM34);
|
||||
__raw_writel(0, base + PRD12);
|
||||
__raw_writel(0, base + PRD34);
|
||||
|
||||
/* enable */
|
||||
wdtcr = davinci_readl(base + WDTCR);
|
||||
wdtcr = __raw_readl(base + WDTCR);
|
||||
wdtcr |= WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT;
|
||||
davinci_writel(wdtcr, base + WDTCR);
|
||||
__raw_writel(wdtcr, base + WDTCR);
|
||||
|
||||
/* put watchdog in pre-active state */
|
||||
wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) |
|
||||
(WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT);
|
||||
davinci_writel(wdtcr, base + WDTCR);
|
||||
__raw_writel(wdtcr, base + WDTCR);
|
||||
|
||||
/* put watchdog in active state */
|
||||
wdtcr = (WDTCR_WDKEY_SEQ1 << WDTCR_WDKEY_SHIFT) |
|
||||
(WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT);
|
||||
davinci_writel(wdtcr, base + WDTCR);
|
||||
__raw_writel(wdtcr, base + WDTCR);
|
||||
|
||||
/* write an invalid value to the WDKEY field to trigger
|
||||
* a watchdog reset */
|
||||
wdtcr = 0x00004000;
|
||||
davinci_writel(wdtcr, base + WDTCR);
|
||||
__raw_writel(wdtcr, base + WDTCR);
|
||||
}
|
||||
|
|
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Reference in a new issue