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[PATCH] m68knommu: add 5208 ColdFire UART support to ColdFire serial driver 

Add support for the Freescale 5208 processor UART's to the common
ColdFire serial port code.

Patch originally from Matt Waddel (from code originally written by
Mike Lavender).

Signed-off-by: Greg Ungerer <gerg@uclinux.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
wifi-calibration
Greg Ungerer 2005-11-07 14:09:50 +10:00 committed by Linus Torvalds
parent 124df2df0c
commit 7f04d62b51
1 changed files with 34 additions and 3 deletions
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37
drivers/serial/mcfserial.c
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@ -57,7 +57,8 @@ struct timer_list mcfrs_timer_struct;
* keep going. Perhaps one day the cflag settings for the
* console can be used instead.
*/
#if defined(CONFIG_ARNEWSH) || defined(CONFIG_MOTOROLA) || defined(CONFIG_senTec) || defined(CONFIG_SNEHA)
#if defined(CONFIG_ARNEWSH) || defined(CONFIG_FREESCALE) || \
defined(CONFIG_senTec) || defined(CONFIG_SNEHA)
#define CONSOLE_BAUD_RATE 19200
#define DEFAULT_CBAUD B19200
#endif
@ -67,7 +68,7 @@ struct timer_list mcfrs_timer_struct;
#define DEFAULT_CBAUD B38400
#endif
#if defined(CONFIG_MOD5272)
#if defined(CONFIG_MOD5272) || defined(CONFIG_M5208EVB)
#define CONSOLE_BAUD_RATE 115200
#define DEFAULT_CBAUD B115200
#endif
@ -95,7 +96,8 @@ static struct tty_driver *mcfrs_serial_driver;
#undef SERIAL_DEBUG_OPEN
#undef SERIAL_DEBUG_FLOW
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)
#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
defined(CONFIG_M520x)
#define IRQBASE (MCFINT_VECBASE+MCFINT_UART0)
#else
#define IRQBASE 73
@ -1528,6 +1530,35 @@ static void mcfrs_irqinit(struct mcf_serial *info)
imrp = (volatile unsigned long *) (MCF_MBAR + MCFICM_INTC0 +
MCFINTC_IMRL);
*imrp &= ~((1 << (info->irq - MCFINT_VECBASE)) | 1);
#elif defined(CONFIG_M520x)
volatile unsigned char *icrp, *uartp;
volatile unsigned long *imrp;
uartp = info->addr;
icrp = (volatile unsigned char *) (MCF_MBAR + MCFICM_INTC0 +
MCFINTC_ICR0 + MCFINT_UART0 + info->line);
*icrp = 0x03;
imrp = (volatile unsigned long *) (MCF_MBAR + MCFICM_INTC0 +
MCFINTC_IMRL);
*imrp &= ~((1 << (info->irq - MCFINT_VECBASE)) | 1);
if (info->line < 2) {
unsigned short *uart_par;
uart_par = (unsigned short *)(MCF_IPSBAR + MCF_GPIO_PAR_UART);
if (info->line == 0)
*uart_par |= MCF_GPIO_PAR_UART_PAR_UTXD0
| MCF_GPIO_PAR_UART_PAR_URXD0;
else if (info->line == 1)
*uart_par |= MCF_GPIO_PAR_UART_PAR_UTXD1
| MCF_GPIO_PAR_UART_PAR_URXD1;
} else if (info->line == 2) {
unsigned char *feci2c_par;
feci2c_par = (unsigned char *)(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
*feci2c_par &= ~0x0F;
*feci2c_par |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2
| MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2;
}
#else
volatile unsigned char *icrp, *uartp;