drm/i915: Simplify checking of GPU reset_counter in display pageflips
If we, when we store the reset_counter for the operation, we ensure that it is not in a wedged or in the middle of a reset, we can then assert that if any reset occurs the reset_counter must change. Later we can just compare the operation's reset epoch against the current counter to see if we need to abort the operation (to handle the hang). Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: http://patchwork.freedesktop.org/patch/msgid/1460565315-7748-5-git-send-email-chris@chris-wilson.co.uk
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@ -3198,14 +3198,12 @@ void intel_finish_reset(struct drm_device *dev)
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static bool intel_crtc_has_pending_flip(struct drm_crtc *crtc)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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unsigned reset_counter;
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bool pending;
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reset_counter = i915_reset_counter(&dev_priv->gpu_error);
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if (intel_crtc->reset_counter != reset_counter ||
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__i915_reset_in_progress_or_wedged(reset_counter))
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reset_counter = i915_reset_counter(&to_i915(dev)->gpu_error);
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if (intel_crtc->reset_counter != reset_counter)
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return false;
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spin_lock_irq(&dev->event_lock);
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@ -10913,8 +10911,7 @@ static bool page_flip_finished(struct intel_crtc *crtc)
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unsigned reset_counter;
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reset_counter = i915_reset_counter(&dev_priv->gpu_error);
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if (crtc->reset_counter != reset_counter ||
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__i915_reset_in_progress_or_wedged(reset_counter))
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if (crtc->reset_counter != reset_counter)
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return true;
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/*
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@ -11576,8 +11573,13 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
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if (ret)
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goto cleanup;
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atomic_inc(&intel_crtc->unpin_work_count);
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intel_crtc->reset_counter = i915_reset_counter(&dev_priv->gpu_error);
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if (__i915_reset_in_progress_or_wedged(intel_crtc->reset_counter)) {
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ret = -EIO;
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goto cleanup;
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}
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atomic_inc(&intel_crtc->unpin_work_count);
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if (INTEL_INFO(dev)->gen >= 5 || IS_G4X(dev))
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work->flip_count = I915_READ(PIPE_FLIPCOUNT_G4X(pipe)) + 1;
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