Merge branch 'kvm-updates/3.2' of git://git.kernel.org/pub/scm/virt/kvm/kvm
* 'kvm-updates/3.2' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: PPC: e500: include linux/export.h KVM: PPC: fix kvmppc_start_thread() for CONFIG_SMP=N KVM: PPC: protect use of kvmppc_h_pr KVM: PPC: move compute_tlbie_rb to book3s_64 common header KVM: Don't automatically expose the TSC deadline timer in cpuid KVM: Device assignment permission checks KVM: Remove ability to assign a device without iommu support KVM: x86: Prevent starting PIT timers in the absence of irqchip support
This commit is contained in:
Linus Torvalds
commit
7f54492fbc
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@ -1100,6 +1100,15 @@ emulate them efficiently. The fields in each entry are defined as follows:
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eax, ebx, ecx, edx: the values returned by the cpuid instruction for
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this function/index combination
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The TSC deadline timer feature (CPUID leaf 1, ecx[24]) is always returned
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as false, since the feature depends on KVM_CREATE_IRQCHIP for local APIC
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support. Instead it is reported via
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ioctl(KVM_CHECK_EXTENSION, KVM_CAP_TSC_DEADLINE_TIMER)
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if that returns true and you use KVM_CREATE_IRQCHIP, or if you emulate the
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feature in userspace, then you can enable the feature for KVM_SET_CPUID2.
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4.47 KVM_PPC_GET_PVINFO
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Capability: KVM_CAP_PPC_GET_PVINFO
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@ -1151,6 +1160,13 @@ following flags are specified:
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/* Depends on KVM_CAP_IOMMU */
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#define KVM_DEV_ASSIGN_ENABLE_IOMMU (1 << 0)
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The KVM_DEV_ASSIGN_ENABLE_IOMMU flag is a mandatory option to ensure
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isolation of the device. Usages not specifying this flag are deprecated.
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Only PCI header type 0 devices with PCI BAR resources are supported by
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device assignment. The user requesting this ioctl must have read/write
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access to the PCI sysfs resource files associated with the device.
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4.49 KVM_DEASSIGN_PCI_DEVICE
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Capability: KVM_CAP_DEVICE_DEASSIGNMENT
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@ -381,39 +381,6 @@ static inline bool kvmppc_critical_section(struct kvm_vcpu *vcpu)
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}
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#endif
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static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
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unsigned long pte_index)
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{
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unsigned long rb, va_low;
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rb = (v & ~0x7fUL) << 16; /* AVA field */
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va_low = pte_index >> 3;
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if (v & HPTE_V_SECONDARY)
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va_low = ~va_low;
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/* xor vsid from AVA */
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if (!(v & HPTE_V_1TB_SEG))
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va_low ^= v >> 12;
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else
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va_low ^= v >> 24;
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va_low &= 0x7ff;
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if (v & HPTE_V_LARGE) {
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rb |= 1; /* L field */
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if (cpu_has_feature(CPU_FTR_ARCH_206) &&
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(r & 0xff000)) {
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/* non-16MB large page, must be 64k */
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/* (masks depend on page size) */
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rb |= 0x1000; /* page encoding in LP field */
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rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
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rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
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}
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} else {
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/* 4kB page */
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rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
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}
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rb |= (v >> 54) & 0x300; /* B field */
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return rb;
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}
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/* Magic register values loaded into r3 and r4 before the 'sc' assembly
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* instruction for the OSI hypercalls */
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#define OSI_SC_MAGIC_R3 0x113724FA
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@ -29,4 +29,37 @@ static inline struct kvmppc_book3s_shadow_vcpu *to_svcpu(struct kvm_vcpu *vcpu)
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#define SPAPR_TCE_SHIFT 12
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static inline unsigned long compute_tlbie_rb(unsigned long v, unsigned long r,
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unsigned long pte_index)
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{
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unsigned long rb, va_low;
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rb = (v & ~0x7fUL) << 16; /* AVA field */
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va_low = pte_index >> 3;
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if (v & HPTE_V_SECONDARY)
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va_low = ~va_low;
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/* xor vsid from AVA */
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if (!(v & HPTE_V_1TB_SEG))
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va_low ^= v >> 12;
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else
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va_low ^= v >> 24;
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va_low &= 0x7ff;
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if (v & HPTE_V_LARGE) {
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rb |= 1; /* L field */
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if (cpu_has_feature(CPU_FTR_ARCH_206) &&
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(r & 0xff000)) {
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/* non-16MB large page, must be 64k */
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/* (masks depend on page size) */
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rb |= 0x1000; /* page encoding in LP field */
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rb |= (va_low & 0x7f) << 16; /* 7b of VA in AVA/LP field */
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rb |= (va_low & 0xfe); /* AVAL field (P7 doesn't seem to care) */
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}
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} else {
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/* 4kB page */
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rb |= (va_low & 0x7ff) << 12; /* remaining 11b of VA */
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}
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rb |= (v >> 54) & 0x300; /* B field */
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return rb;
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}
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#endif /* __ASM_KVM_BOOK3S_64_H__ */
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@ -538,7 +538,7 @@ static void kvmppc_start_thread(struct kvm_vcpu *vcpu)
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tpaca->kvm_hstate.napping = 0;
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vcpu->cpu = vc->pcpu;
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smp_wmb();
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#ifdef CONFIG_PPC_ICP_NATIVE
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#if defined(CONFIG_PPC_ICP_NATIVE) && defined(CONFIG_SMP)
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if (vcpu->arch.ptid) {
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tpaca->cpu_start = 0x80;
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wmb();
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@ -658,10 +658,12 @@ program_interrupt:
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ulong cmd = kvmppc_get_gpr(vcpu, 3);
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int i;
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#ifdef CONFIG_KVM_BOOK3S_64_PR
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if (kvmppc_h_pr(vcpu, cmd) == EMULATE_DONE) {
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r = RESUME_GUEST;
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break;
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}
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#endif
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run->papr_hcall.nr = cmd;
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for (i = 0; i < 9; ++i) {
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@ -15,6 +15,7 @@
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#include <linux/kvm_host.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/export.h>
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#include <asm/reg.h>
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#include <asm/cputable.h>
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@ -338,11 +338,15 @@ static enum hrtimer_restart pit_timer_fn(struct hrtimer *data)
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return HRTIMER_NORESTART;
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}
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static void create_pit_timer(struct kvm_kpit_state *ps, u32 val, int is_period)
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static void create_pit_timer(struct kvm *kvm, u32 val, int is_period)
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{
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struct kvm_kpit_state *ps = &kvm->arch.vpit->pit_state;
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struct kvm_timer *pt = &ps->pit_timer;
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s64 interval;
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if (!irqchip_in_kernel(kvm))
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return;
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interval = muldiv64(val, NSEC_PER_SEC, KVM_PIT_FREQ);
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pr_debug("create pit timer, interval is %llu nsec\n", interval);
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@ -394,13 +398,13 @@ static void pit_load_count(struct kvm *kvm, int channel, u32 val)
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/* FIXME: enhance mode 4 precision */
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case 4:
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if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)) {
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create_pit_timer(ps, val, 0);
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create_pit_timer(kvm, val, 0);
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}
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break;
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case 2:
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case 3:
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if (!(ps->flags & KVM_PIT_FLAGS_HPET_LEGACY)){
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create_pit_timer(ps, val, 1);
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create_pit_timer(kvm, val, 1);
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}
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break;
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default:
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@ -602,7 +602,6 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best;
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struct kvm_lapic *apic = vcpu->arch.apic;
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u32 timer_mode_mask;
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best = kvm_find_cpuid_entry(vcpu, 1, 0);
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if (!best)
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@ -615,15 +614,12 @@ static void update_cpuid(struct kvm_vcpu *vcpu)
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best->ecx |= bit(X86_FEATURE_OSXSAVE);
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}
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if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
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best->function == 0x1) {
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best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER);
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timer_mode_mask = 3 << 17;
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} else
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timer_mode_mask = 1 << 17;
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if (apic)
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apic->lapic_timer.timer_mode_mask = timer_mode_mask;
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if (apic) {
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if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
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apic->lapic_timer.timer_mode_mask = 3 << 17;
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else
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apic->lapic_timer.timer_mode_mask = 1 << 17;
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}
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}
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int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
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@ -2135,6 +2131,9 @@ int kvm_dev_ioctl_check_extension(long ext)
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case KVM_CAP_TSC_CONTROL:
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r = kvm_has_tsc_control;
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break;
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case KVM_CAP_TSC_DEADLINE_TIMER:
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r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
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break;
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default:
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r = 0;
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break;
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@ -557,6 +557,7 @@ struct kvm_ppc_pvinfo {
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#define KVM_CAP_MAX_VCPUS 66 /* returns max vcpus per vm */
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#define KVM_CAP_PPC_PAPR 68
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#define KVM_CAP_S390_GMAP 71
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#define KVM_CAP_TSC_DEADLINE_TIMER 72
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#ifdef KVM_CAP_IRQ_ROUTING
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@ -17,6 +17,8 @@
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#include <linux/pci.h>
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#include <linux/interrupt.h>
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#include <linux/slab.h>
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#include <linux/namei.h>
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#include <linux/fs.h>
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#include "irq.h"
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static struct kvm_assigned_dev_kernel *kvm_find_assigned_dev(struct list_head *head,
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@ -480,12 +482,76 @@ out:
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return r;
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}
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/*
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* We want to test whether the caller has been granted permissions to
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* use this device. To be able to configure and control the device,
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* the user needs access to PCI configuration space and BAR resources.
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* These are accessed through PCI sysfs. PCI config space is often
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* passed to the process calling this ioctl via file descriptor, so we
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* can't rely on access to that file. We can check for permissions
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* on each of the BAR resource files, which is a pretty clear
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* indicator that the user has been granted access to the device.
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*/
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static int probe_sysfs_permissions(struct pci_dev *dev)
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{
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#ifdef CONFIG_SYSFS
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int i;
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bool bar_found = false;
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for (i = PCI_STD_RESOURCES; i <= PCI_STD_RESOURCE_END; i++) {
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char *kpath, *syspath;
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struct path path;
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struct inode *inode;
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int r;
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if (!pci_resource_len(dev, i))
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continue;
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kpath = kobject_get_path(&dev->dev.kobj, GFP_KERNEL);
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if (!kpath)
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return -ENOMEM;
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/* Per sysfs-rules, sysfs is always at /sys */
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syspath = kasprintf(GFP_KERNEL, "/sys%s/resource%d", kpath, i);
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kfree(kpath);
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if (!syspath)
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return -ENOMEM;
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r = kern_path(syspath, LOOKUP_FOLLOW, &path);
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kfree(syspath);
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if (r)
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return r;
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inode = path.dentry->d_inode;
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r = inode_permission(inode, MAY_READ | MAY_WRITE | MAY_ACCESS);
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path_put(&path);
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if (r)
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return r;
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bar_found = true;
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}
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/* If no resources, probably something special */
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if (!bar_found)
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return -EPERM;
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return 0;
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#else
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return -EINVAL; /* No way to control the device without sysfs */
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#endif
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}
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static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
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struct kvm_assigned_pci_dev *assigned_dev)
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{
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int r = 0, idx;
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struct kvm_assigned_dev_kernel *match;
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struct pci_dev *dev;
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u8 header_type;
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if (!(assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU))
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return -EINVAL;
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mutex_lock(&kvm->lock);
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idx = srcu_read_lock(&kvm->srcu);
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@ -513,6 +579,18 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
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r = -EINVAL;
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goto out_free;
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}
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/* Don't allow bridges to be assigned */
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pci_read_config_byte(dev, PCI_HEADER_TYPE, &header_type);
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if ((header_type & PCI_HEADER_TYPE) != PCI_HEADER_TYPE_NORMAL) {
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r = -EPERM;
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goto out_put;
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}
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r = probe_sysfs_permissions(dev);
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if (r)
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goto out_put;
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if (pci_enable_device(dev)) {
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printk(KERN_INFO "%s: Could not enable PCI device\n", __func__);
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r = -EBUSY;
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@ -544,16 +622,14 @@ static int kvm_vm_ioctl_assign_device(struct kvm *kvm,
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list_add(&match->list, &kvm->arch.assigned_dev_head);
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if (assigned_dev->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU) {
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if (!kvm->arch.iommu_domain) {
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r = kvm_iommu_map_guest(kvm);
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if (r)
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goto out_list_del;
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}
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r = kvm_assign_device(kvm, match);
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if (!kvm->arch.iommu_domain) {
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r = kvm_iommu_map_guest(kvm);
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if (r)
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goto out_list_del;
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}
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r = kvm_assign_device(kvm, match);
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if (r)
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goto out_list_del;
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out:
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srcu_read_unlock(&kvm->srcu, idx);
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@ -593,8 +669,7 @@ static int kvm_vm_ioctl_deassign_device(struct kvm *kvm,
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goto out;
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}
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if (match->flags & KVM_DEV_ASSIGN_ENABLE_IOMMU)
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kvm_deassign_device(kvm, match);
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kvm_deassign_device(kvm, match);
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kvm_free_assigned_device(kvm, match);
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Reference in a new issue