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MLK-19179: clk: imx8mm: change audio ahb and ipg clock to 400M 

According to ADD, the audio ahb and ipg clock should be in 1:1 mode
and the frequency is 400MHz

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
(cherry picked from commit ee175a8cea1a7d27954a73c3447bb16edd71f4c8)
pull/10/head
Shengjiu Wang 2018-08-09 19:20:37 +08:00 committed by Jason Liu
parent c1e3195b1c
commit 7fbd6e9a2e
1 changed files with 3 additions and 1 deletions
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4
drivers/clk/imx/clk-imx8mm.c
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@ -956,7 +956,9 @@ static void __init imx8mm_clocks_init(struct device_node *ccm_node)
clk_prepare_enable(clks[clks_init_on[i]]);
}
clk_set_parent(clks[IMX8MM_CLK_AUDIO_AHB_SRC], clks[IMX8MM_SYS_PLL2_500M]);
clk_set_parent(clks[IMX8MM_CLK_AUDIO_AHB_SRC], clks[IMX8MM_SYS_PLL1_800M]);
clk_set_rate(clks[IMX8MM_CLK_AUDIO_AHB_DIV], 400000000);
clk_set_rate(clks[IMX8MM_CLK_IPG_AUDIO_ROOT], 400000000);
/* increase NOC clock to design target */
clk_set_rate(clks[IMX8MM_SYS_PLL3], 750000000);