clocksource: ARM sp804: obtain sp804 timer rate via clks
This allows platforms to specify the rate of the SP804 clocksource via the clk subsystem. While ARM boards clock these at 1MHz, BCMRing also has SP804 timers but are clocked at different rates. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -18,8 +18,10 @@
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/clk.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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@ -32,8 +34,43 @@
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#define TIMER_FREQ_KHZ (1000)
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#define TIMER_RELOAD (TIMER_FREQ_KHZ * 1000 / HZ)
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static long __init sp804_get_clock_rate(const char *name)
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{
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struct clk *clk;
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long rate;
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int err;
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clk = clk_get_sys("sp804", name);
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if (IS_ERR(clk)) {
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pr_err("sp804: %s clock not found: %d\n", name,
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(int)PTR_ERR(clk));
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return PTR_ERR(clk);
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}
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err = clk_enable(clk);
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if (err) {
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pr_err("sp804: %s clock failed to enable: %d\n", name, err);
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clk_put(clk);
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return err;
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}
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rate = clk_get_rate(clk);
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if (rate < 0) {
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pr_err("sp804: %s clock failed to get rate: %ld\n", name, rate);
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clk_disable(clk);
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clk_put(clk);
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}
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return rate;
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}
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void __init sp804_clocksource_init(void __iomem *base, const char *name)
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{
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long rate = sp804_get_clock_rate(name);
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if (rate < 0)
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return;
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/* setup timer 0 as free-running clocksource */
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writel(0, base + TIMER_CTRL);
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writel(0xffffffff, base + TIMER_LOAD);
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@ -42,7 +79,7 @@ void __init sp804_clocksource_init(void __iomem *base, const char *name)
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base + TIMER_CTRL);
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clocksource_mmio_init(base + TIMER_VALUE, name,
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TIMER_FREQ_KHZ * 1000, 200, 32, clocksource_mmio_readl_down);
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rate, 200, 32, clocksource_mmio_readl_down);
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}
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@ -229,10 +229,17 @@ static struct clk cp_auxclk = {
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.vcoreg = CM_AUXOSC,
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};
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static struct clk sp804_clk = {
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.rate = 1000000,
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};
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static struct clk_lookup cp_lookups[] = {
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{ /* CLCD */
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.dev_id = "mb:c0",
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.clk = &cp_auxclk,
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}, { /* SP804 timers */
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.dev_id = "sp804",
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.clk = &sp804_clk,
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},
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};
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@ -315,6 +315,10 @@ static struct clk ref24_clk = {
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.rate = 24000000,
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};
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static struct clk sp804_clk = {
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.rate = 1000000,
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};
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static struct clk dummy_apb_pclk;
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static struct clk_lookup lookups[] = {
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@ -357,7 +361,10 @@ static struct clk_lookup lookups[] = {
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}, { /* SSP */
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.dev_id = "dev:ssp0",
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.clk = &ref24_clk,
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}
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}, { /* SP804 timers */
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.dev_id = "sp804",
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.clk = &sp804_clk,
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},
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};
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void __init realview_init_early(void)
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@ -375,6 +375,10 @@ static struct clk ref24_clk = {
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.rate = 24000000,
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};
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static struct clk sp804_clk = {
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.rate = 1000000,
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};
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static struct clk dummy_apb_pclk;
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static struct clk_lookup lookups[] = {
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@ -411,7 +415,10 @@ static struct clk_lookup lookups[] = {
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}, { /* CLCD */
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.dev_id = "dev:20",
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.clk = &osc4_clk,
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}
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}, { /* SP804 timers */
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.dev_id = "sp804",
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.clk = &sp804_clk,
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},
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};
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/*
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@ -141,10 +141,18 @@ static struct clk osc1_clk = {
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.rate = 24000000,
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};
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static struct clk ct_sp804_clk = {
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.rate = 1000000,
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};
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static struct clk_lookup lookups[] = {
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{ /* CLCD */
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.dev_id = "ct:clcd",
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.clk = &osc1_clk,
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}, { /* SP804 timers */
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.dev_id = "sp804",
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.con_id = "ct-timer1",
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.clk = &ct_sp804_clk,
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},
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};
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@ -333,6 +333,10 @@ static struct clk osc2_clk = {
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.rate = 24000000,
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};
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static struct clk v2m_sp804_clk = {
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.rate = 1000000,
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};
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static struct clk dummy_apb_pclk;
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static struct clk_lookup v2m_lookups[] = {
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@ -363,6 +367,10 @@ static struct clk_lookup v2m_lookups[] = {
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}, { /* CLCD */
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.dev_id = "mb:clcd",
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.clk = &osc1_clk,
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}, { /* SP804 timers */
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.dev_id = "sp804",
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.con_id = "v2m-timer1",
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.clk = &v2m_sp804_clk,
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},
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};
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