RTC: Cleanup rtc_class_ops->irq_set_state
With PIE mode interrupts now emulated in generic code via an hrtimer, no one calls rtc_class_ops->irq_set_state(), so this patch removes it along with driver implementations. CC: Thomas Gleixner <tglx@linutronix.de> CC: Alessandro Zummo <a.zummo@towertech.it> CC: Marcelo Roberto Jimenez <mroberto@cpti.cetuc.puc-rio.br> CC: rtc-linux@googlegroups.com Signed-off-by: John Stultz <john.stultz@linaro.org>
This commit is contained in:
parent
f44f7f96a2
commit
80d4bb515b
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@ -400,25 +400,6 @@ static int cmos_irq_set_freq(struct device *dev, int freq)
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return 0;
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return 0;
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}
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}
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static int cmos_irq_set_state(struct device *dev, int enabled)
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{
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struct cmos_rtc *cmos = dev_get_drvdata(dev);
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unsigned long flags;
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if (!is_valid_irq(cmos->irq))
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return -ENXIO;
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spin_lock_irqsave(&rtc_lock, flags);
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if (enabled)
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cmos_irq_enable(cmos, RTC_PIE);
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else
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cmos_irq_disable(cmos, RTC_PIE);
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spin_unlock_irqrestore(&rtc_lock, flags);
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return 0;
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}
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static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
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static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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{
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struct cmos_rtc *cmos = dev_get_drvdata(dev);
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struct cmos_rtc *cmos = dev_get_drvdata(dev);
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@ -502,7 +483,6 @@ static const struct rtc_class_ops cmos_rtc_ops = {
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.set_alarm = cmos_set_alarm,
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.set_alarm = cmos_set_alarm,
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.proc = cmos_procfs,
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.proc = cmos_procfs,
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.irq_set_freq = cmos_irq_set_freq,
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.irq_set_freq = cmos_irq_set_freq,
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.irq_set_state = cmos_irq_set_state,
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.alarm_irq_enable = cmos_alarm_irq_enable,
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.alarm_irq_enable = cmos_alarm_irq_enable,
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.update_irq_enable = cmos_update_irq_enable,
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.update_irq_enable = cmos_update_irq_enable,
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};
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};
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@ -473,39 +473,6 @@ static int davinci_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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return 0;
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return 0;
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}
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}
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static int davinci_rtc_irq_set_state(struct device *dev, int enabled)
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{
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struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
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unsigned long flags;
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u8 rtc_ctrl;
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spin_lock_irqsave(&davinci_rtc_lock, flags);
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rtc_ctrl = rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL);
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if (enabled) {
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while (rtcss_read(davinci_rtc, PRTCSS_RTC_CTRL)
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& PRTCSS_RTC_CTRL_WDTBUS)
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cpu_relax();
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rtc_ctrl |= PRTCSS_RTC_CTRL_TE;
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rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
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rtcss_write(davinci_rtc, 0x0, PRTCSS_RTC_CLKC_CNT);
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rtc_ctrl |= PRTCSS_RTC_CTRL_TIEN |
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PRTCSS_RTC_CTRL_TMMD |
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PRTCSS_RTC_CTRL_TMRFLG;
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} else
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rtc_ctrl &= ~PRTCSS_RTC_CTRL_TIEN;
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rtcss_write(davinci_rtc, rtc_ctrl, PRTCSS_RTC_CTRL);
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spin_unlock_irqrestore(&davinci_rtc_lock, flags);
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return 0;
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}
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static int davinci_rtc_irq_set_freq(struct device *dev, int freq)
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static int davinci_rtc_irq_set_freq(struct device *dev, int freq)
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{
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{
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struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
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struct davinci_rtc *davinci_rtc = dev_get_drvdata(dev);
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@ -529,7 +496,6 @@ static struct rtc_class_ops davinci_rtc_ops = {
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.alarm_irq_enable = davinci_rtc_alarm_irq_enable,
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.alarm_irq_enable = davinci_rtc_alarm_irq_enable,
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.read_alarm = davinci_rtc_read_alarm,
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.read_alarm = davinci_rtc_read_alarm,
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.set_alarm = davinci_rtc_set_alarm,
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.set_alarm = davinci_rtc_set_alarm,
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.irq_set_state = davinci_rtc_irq_set_state,
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.irq_set_freq = davinci_rtc_irq_set_freq,
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.irq_set_freq = davinci_rtc_irq_set_freq,
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};
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};
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@ -236,25 +236,6 @@ static int mrst_set_alarm(struct device *dev, struct rtc_wkalrm *t)
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return 0;
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return 0;
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}
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}
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static int mrst_irq_set_state(struct device *dev, int enabled)
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{
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struct mrst_rtc *mrst = dev_get_drvdata(dev);
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unsigned long flags;
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if (!mrst->irq)
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return -ENXIO;
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spin_lock_irqsave(&rtc_lock, flags);
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if (enabled)
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mrst_irq_enable(mrst, RTC_PIE);
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else
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mrst_irq_disable(mrst, RTC_PIE);
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spin_unlock_irqrestore(&rtc_lock, flags);
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return 0;
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}
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/* Currently, the vRTC doesn't support UIE ON/OFF */
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/* Currently, the vRTC doesn't support UIE ON/OFF */
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static int mrst_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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static int mrst_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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{
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@ -301,7 +282,6 @@ static const struct rtc_class_ops mrst_rtc_ops = {
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.read_alarm = mrst_read_alarm,
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.read_alarm = mrst_read_alarm,
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.set_alarm = mrst_set_alarm,
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.set_alarm = mrst_set_alarm,
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.proc = mrst_procfs,
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.proc = mrst_procfs,
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.irq_set_state = mrst_irq_set_state,
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.alarm_irq_enable = mrst_rtc_alarm_irq_enable,
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.alarm_irq_enable = mrst_rtc_alarm_irq_enable,
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};
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};
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@ -293,38 +293,6 @@ static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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return ret;
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return ret;
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}
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}
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/* Periodic interrupt is only available in ST variants. */
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static int pl031_irq_set_state(struct device *dev, int enabled)
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{
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struct pl031_local *ldata = dev_get_drvdata(dev);
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if (enabled == 1) {
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/* Clear any pending timer interrupt. */
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writel(RTC_BIT_PI, ldata->base + RTC_ICR);
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writel(readl(ldata->base + RTC_IMSC) | RTC_BIT_PI,
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ldata->base + RTC_IMSC);
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/* Now start the timer */
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writel(readl(ldata->base + RTC_TCR) | RTC_TCR_EN,
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ldata->base + RTC_TCR);
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} else {
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writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI),
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ldata->base + RTC_IMSC);
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/* Also stop the timer */
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writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN),
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ldata->base + RTC_TCR);
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}
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/* Wait at least 1 RTC32 clock cycle to ensure next access
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* to RTC_TCR will succeed.
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*/
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udelay(40);
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return 0;
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}
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static int pl031_irq_set_freq(struct device *dev, int freq)
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static int pl031_irq_set_freq(struct device *dev, int freq)
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{
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{
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struct pl031_local *ldata = dev_get_drvdata(dev);
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struct pl031_local *ldata = dev_get_drvdata(dev);
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@ -440,7 +408,6 @@ static struct rtc_class_ops stv1_pl031_ops = {
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.read_alarm = pl031_read_alarm,
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.read_alarm = pl031_read_alarm,
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.set_alarm = pl031_set_alarm,
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.set_alarm = pl031_set_alarm,
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.alarm_irq_enable = pl031_alarm_irq_enable,
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.alarm_irq_enable = pl031_alarm_irq_enable,
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.irq_set_state = pl031_irq_set_state,
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.irq_set_freq = pl031_irq_set_freq,
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.irq_set_freq = pl031_irq_set_freq,
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};
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};
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@ -451,7 +418,6 @@ static struct rtc_class_ops stv2_pl031_ops = {
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.read_alarm = pl031_stv2_read_alarm,
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.read_alarm = pl031_stv2_read_alarm,
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.set_alarm = pl031_stv2_set_alarm,
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.set_alarm = pl031_stv2_set_alarm,
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.alarm_irq_enable = pl031_alarm_irq_enable,
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.alarm_irq_enable = pl031_alarm_irq_enable,
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.irq_set_state = pl031_irq_set_state,
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.irq_set_freq = pl031_irq_set_freq,
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.irq_set_freq = pl031_irq_set_freq,
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};
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};
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@ -223,18 +223,6 @@ static int pxa_periodic_irq_set_freq(struct device *dev, int freq)
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return 0;
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return 0;
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}
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}
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static int pxa_periodic_irq_set_state(struct device *dev, int enabled)
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{
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struct pxa_rtc *pxa_rtc = dev_get_drvdata(dev);
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if (enabled)
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rtsr_set_bits(pxa_rtc, RTSR_PIALE | RTSR_PICE);
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else
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rtsr_clear_bits(pxa_rtc, RTSR_PIALE | RTSR_PICE);
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return 0;
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}
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static int pxa_alarm_irq_enable(struct device *dev, unsigned int enabled)
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static int pxa_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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{
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struct pxa_rtc *pxa_rtc = dev_get_drvdata(dev);
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struct pxa_rtc *pxa_rtc = dev_get_drvdata(dev);
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@ -348,7 +336,6 @@ static const struct rtc_class_ops pxa_rtc_ops = {
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.alarm_irq_enable = pxa_alarm_irq_enable,
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.alarm_irq_enable = pxa_alarm_irq_enable,
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.update_irq_enable = pxa_update_irq_enable,
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.update_irq_enable = pxa_update_irq_enable,
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.proc = pxa_rtc_proc,
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.proc = pxa_rtc_proc,
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.irq_set_state = pxa_periodic_irq_set_state,
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.irq_set_freq = pxa_periodic_irq_set_freq,
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.irq_set_freq = pxa_periodic_irq_set_freq,
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};
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};
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@ -424,37 +424,12 @@ static int rx8025_alarm_irq_enable(struct device *dev, unsigned int enabled)
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return 0;
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return 0;
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}
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}
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static int rx8025_irq_set_state(struct device *dev, int enabled)
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{
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struct i2c_client *client = to_i2c_client(dev);
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struct rx8025_data *rx8025 = i2c_get_clientdata(client);
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int ctrl1;
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int err;
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if (client->irq <= 0)
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return -ENXIO;
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ctrl1 = rx8025->ctrl1 & ~RX8025_BIT_CTRL1_CT;
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if (enabled)
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ctrl1 |= RX8025_BIT_CTRL1_CT_1HZ;
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if (ctrl1 != rx8025->ctrl1) {
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rx8025->ctrl1 = ctrl1;
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err = rx8025_write_reg(rx8025->client, RX8025_REG_CTRL1,
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rx8025->ctrl1);
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if (err)
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return err;
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}
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return 0;
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}
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static struct rtc_class_ops rx8025_rtc_ops = {
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static struct rtc_class_ops rx8025_rtc_ops = {
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.read_time = rx8025_get_time,
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.read_time = rx8025_get_time,
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.set_time = rx8025_set_time,
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.set_time = rx8025_set_time,
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.read_alarm = rx8025_read_alarm,
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.read_alarm = rx8025_read_alarm,
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.set_alarm = rx8025_set_alarm,
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.set_alarm = rx8025_set_alarm,
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.alarm_irq_enable = rx8025_alarm_irq_enable,
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.alarm_irq_enable = rx8025_alarm_irq_enable,
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.irq_set_state = rx8025_irq_set_state,
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};
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};
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/*
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/*
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@ -93,37 +93,6 @@ static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
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return 0;
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return 0;
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}
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}
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static int s3c_rtc_setpie(struct device *dev, int enabled)
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{
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unsigned int tmp;
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pr_debug("%s: pie=%d\n", __func__, enabled);
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spin_lock_irq(&s3c_rtc_pie_lock);
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if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
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tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
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tmp &= ~S3C64XX_RTCCON_TICEN;
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if (enabled)
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tmp |= S3C64XX_RTCCON_TICEN;
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writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
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} else {
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tmp = readb(s3c_rtc_base + S3C2410_TICNT);
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tmp &= ~S3C2410_TICNT_ENABLE;
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if (enabled)
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tmp |= S3C2410_TICNT_ENABLE;
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writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
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}
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spin_unlock_irq(&s3c_rtc_pie_lock);
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return 0;
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}
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static int s3c_rtc_setfreq(struct device *dev, int freq)
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static int s3c_rtc_setfreq(struct device *dev, int freq)
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{
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct platform_device *pdev = to_platform_device(dev);
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.read_alarm = s3c_rtc_getalarm,
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.read_alarm = s3c_rtc_getalarm,
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.set_alarm = s3c_rtc_setalarm,
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.set_alarm = s3c_rtc_setalarm,
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.irq_set_freq = s3c_rtc_setfreq,
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.irq_set_freq = s3c_rtc_setfreq,
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.irq_set_state = s3c_rtc_setpie,
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.proc = s3c_rtc_proc,
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.proc = s3c_rtc_proc,
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.alarm_irq_enable = s3c_rtc_setaie,
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.alarm_irq_enable = s3c_rtc_setaie,
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};
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};
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@ -171,23 +171,6 @@ static int sa1100_irq_set_freq(struct device *dev, int freq)
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static int rtc_timer1_count;
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static int rtc_timer1_count;
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static int sa1100_irq_set_state(struct device *dev, int enabled)
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{
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spin_lock_irq(&sa1100_rtc_lock);
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if (enabled) {
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struct rtc_device *rtc = (struct rtc_device *)dev;
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OSMR1 = timer_freq / rtc->irq_freq + OSCR;
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OIER |= OIER_E1;
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rtc_timer1_count = 1;
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} else {
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OIER &= ~OIER_E1;
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}
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spin_unlock_irq(&sa1100_rtc_lock);
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return 0;
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}
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static inline int sa1100_timer1_retrigger(struct rtc_device *rtc)
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static inline int sa1100_timer1_retrigger(struct rtc_device *rtc)
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{
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{
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unsigned long diff;
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unsigned long diff;
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@ -410,7 +393,6 @@ static const struct rtc_class_ops sa1100_rtc_ops = {
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.set_alarm = sa1100_rtc_set_alarm,
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.set_alarm = sa1100_rtc_set_alarm,
|
||||||
.proc = sa1100_rtc_proc,
|
.proc = sa1100_rtc_proc,
|
||||||
.irq_set_freq = sa1100_irq_set_freq,
|
.irq_set_freq = sa1100_irq_set_freq,
|
||||||
.irq_set_state = sa1100_irq_set_state,
|
|
||||||
.alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
|
.alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -603,7 +603,6 @@ static struct rtc_class_ops sh_rtc_ops = {
|
||||||
.set_time = sh_rtc_set_time,
|
.set_time = sh_rtc_set_time,
|
||||||
.read_alarm = sh_rtc_read_alarm,
|
.read_alarm = sh_rtc_read_alarm,
|
||||||
.set_alarm = sh_rtc_set_alarm,
|
.set_alarm = sh_rtc_set_alarm,
|
||||||
.irq_set_state = sh_rtc_irq_set_state,
|
|
||||||
.irq_set_freq = sh_rtc_irq_set_freq,
|
.irq_set_freq = sh_rtc_irq_set_freq,
|
||||||
.proc = sh_rtc_proc,
|
.proc = sh_rtc_proc,
|
||||||
.alarm_irq_enable = sh_rtc_alarm_irq_enable,
|
.alarm_irq_enable = sh_rtc_alarm_irq_enable,
|
||||||
|
|
|
@ -227,16 +227,6 @@ static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int vr41xx_rtc_irq_set_state(struct device *dev, int enabled)
|
|
||||||
{
|
|
||||||
if (enabled)
|
|
||||||
enable_irq(pie_irq);
|
|
||||||
else
|
|
||||||
disable_irq(pie_irq);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
|
static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
|
||||||
{
|
{
|
||||||
switch (cmd) {
|
switch (cmd) {
|
||||||
|
@ -309,7 +299,6 @@ static const struct rtc_class_ops vr41xx_rtc_ops = {
|
||||||
.read_alarm = vr41xx_rtc_read_alarm,
|
.read_alarm = vr41xx_rtc_read_alarm,
|
||||||
.set_alarm = vr41xx_rtc_set_alarm,
|
.set_alarm = vr41xx_rtc_set_alarm,
|
||||||
.irq_set_freq = vr41xx_rtc_irq_set_freq,
|
.irq_set_freq = vr41xx_rtc_irq_set_freq,
|
||||||
.irq_set_state = vr41xx_rtc_irq_set_state,
|
|
||||||
};
|
};
|
||||||
|
|
||||||
static int __devinit rtc_probe(struct platform_device *pdev)
|
static int __devinit rtc_probe(struct platform_device *pdev)
|
||||||
|
|
|
@ -148,7 +148,6 @@ struct rtc_class_ops {
|
||||||
int (*set_alarm)(struct device *, struct rtc_wkalrm *);
|
int (*set_alarm)(struct device *, struct rtc_wkalrm *);
|
||||||
int (*proc)(struct device *, struct seq_file *);
|
int (*proc)(struct device *, struct seq_file *);
|
||||||
int (*set_mmss)(struct device *, unsigned long secs);
|
int (*set_mmss)(struct device *, unsigned long secs);
|
||||||
int (*irq_set_state)(struct device *, int enabled);
|
|
||||||
int (*irq_set_freq)(struct device *, int freq);
|
int (*irq_set_freq)(struct device *, int freq);
|
||||||
int (*read_callback)(struct device *, int data);
|
int (*read_callback)(struct device *, int data);
|
||||||
int (*alarm_irq_enable)(struct device *, unsigned int enabled);
|
int (*alarm_irq_enable)(struct device *, unsigned int enabled);
|
||||||
|
|
Loading…
Reference in a new issue