arm/arm64: KVM: add vgic.h header file
vgic.c is currently a mixture of generic vGIC emulation code and functions specific to emulating a GICv2. To ease the addition of GICv3 later, we create new header file vgic.h, which holds constants and prototypes of commonly used functions. Rename some identifiers to avoid name space clutter. I removed the long-standing comment about using the kvm_io_bus API to tackle the GIC register ranges, as it wouldn't be a win for us anymore. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Christoffer Dall <christoffer.dall@linaro.org> ------- As the diff isn't always obvious here (and to aid eventual rebases), here is a list of high-level changes done to the code: * moved definitions and prototypes from vgic.c to vgic.h: - VGIC_ADDR_UNDEF - ACCESS_{READ,WRITE}_* - vgic_init() - vgic_update_state() - vgic_kick_vcpus() - vgic_get_vmcr() - vgic_set_vmcr() - struct mmio_range {} (renamed to struct kvm_mmio_range) * removed static keyword and exported prototype in vgic.h: - vgic_bitmap_get_reg() - vgic_bitmap_set_irq_val() - vgic_bitmap_get_shared_map() - vgic_bytemap_get_reg() - vgic_dist_irq_set_pending() - vgic_dist_irq_clear_pending() - vgic_cpu_irq_clear() - vgic_reg_access() - handle_mmio_raz_wi() - vgic_handle_enable_reg() - vgic_handle_set_pending_reg() - vgic_handle_clear_pending_reg() - vgic_handle_cfg_reg() - vgic_unqueue_irqs() - find_matching_range() (renamed to vgic_find_range) - vgic_handle_mmio_range() - vgic_update_state() - vgic_get_vmcr() - vgic_set_vmcr() - vgic_queue_irq() - vgic_kick_vcpus() - vgic_init() - vgic_v2_init_emulation() - vgic_has_attr_regs() - vgic_set_common_attr() - vgic_get_common_attr() - vgic_destroy() - vgic_create() * moved functions to vgic.h (static inline): - mmio_data_read() - mmio_data_write() - is_in_range() Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This commit is contained in:
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@ -75,33 +75,16 @@
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* inactive as long as the external input line is held high.
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*/
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#define VGIC_ADDR_UNDEF (-1)
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#define IS_VGIC_ADDR_UNDEF(_x) ((_x) == VGIC_ADDR_UNDEF)
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#include "vgic.h"
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#define PRODUCT_ID_KVM 0x4b /* ASCII code K */
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#define IMPLEMENTER_ARM 0x43b
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#define GICC_ARCH_VERSION_V2 0x2
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#define ACCESS_READ_VALUE (1 << 0)
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#define ACCESS_READ_RAZ (0 << 0)
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#define ACCESS_READ_MASK(x) ((x) & (1 << 0))
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#define ACCESS_WRITE_IGNORED (0 << 1)
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#define ACCESS_WRITE_SETBIT (1 << 1)
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#define ACCESS_WRITE_CLEARBIT (2 << 1)
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#define ACCESS_WRITE_VALUE (3 << 1)
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#define ACCESS_WRITE_MASK(x) ((x) & (3 << 1))
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static int vgic_init(struct kvm *kvm);
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static void vgic_retire_disabled_irqs(struct kvm_vcpu *vcpu);
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static void vgic_retire_lr(int lr_nr, int irq, struct kvm_vcpu *vcpu);
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static void vgic_update_state(struct kvm *kvm);
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static void vgic_kick_vcpus(struct kvm *kvm);
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static u8 *vgic_get_sgi_sources(struct vgic_dist *dist, int vcpu_id, int sgi);
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static void vgic_dispatch_sgi(struct kvm_vcpu *vcpu, u32 reg);
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static struct vgic_lr vgic_get_lr(const struct kvm_vcpu *vcpu, int lr);
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static void vgic_set_lr(struct kvm_vcpu *vcpu, int lr, struct vgic_lr lr_desc);
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static void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
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static void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
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static const struct vgic_ops *vgic_ops;
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static const struct vgic_params *vgic;
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@ -175,8 +158,7 @@ static unsigned long *u64_to_bitmask(u64 *val)
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return (unsigned long *)val;
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}
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static u32 *vgic_bitmap_get_reg(struct vgic_bitmap *x,
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int cpuid, u32 offset)
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u32 *vgic_bitmap_get_reg(struct vgic_bitmap *x, int cpuid, u32 offset)
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{
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offset >>= 2;
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if (!offset)
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@ -194,8 +176,8 @@ static int vgic_bitmap_get_irq_val(struct vgic_bitmap *x,
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return test_bit(irq - VGIC_NR_PRIVATE_IRQS, x->shared);
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}
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static void vgic_bitmap_set_irq_val(struct vgic_bitmap *x, int cpuid,
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int irq, int val)
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void vgic_bitmap_set_irq_val(struct vgic_bitmap *x, int cpuid,
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int irq, int val)
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{
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unsigned long *reg;
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@ -217,7 +199,7 @@ static unsigned long *vgic_bitmap_get_cpu_map(struct vgic_bitmap *x, int cpuid)
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return x->private + cpuid;
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}
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static unsigned long *vgic_bitmap_get_shared_map(struct vgic_bitmap *x)
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unsigned long *vgic_bitmap_get_shared_map(struct vgic_bitmap *x)
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{
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return x->shared;
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}
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@ -244,7 +226,7 @@ static void vgic_free_bytemap(struct vgic_bytemap *b)
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b->shared = NULL;
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}
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static u32 *vgic_bytemap_get_reg(struct vgic_bytemap *x, int cpuid, u32 offset)
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u32 *vgic_bytemap_get_reg(struct vgic_bytemap *x, int cpuid, u32 offset)
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{
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u32 *reg;
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@ -341,14 +323,14 @@ static int vgic_dist_irq_is_pending(struct kvm_vcpu *vcpu, int irq)
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return vgic_bitmap_get_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq);
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}
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static void vgic_dist_irq_set_pending(struct kvm_vcpu *vcpu, int irq)
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void vgic_dist_irq_set_pending(struct kvm_vcpu *vcpu, int irq)
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{
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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vgic_bitmap_set_irq_val(&dist->irq_pending, vcpu->vcpu_id, irq, 1);
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}
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static void vgic_dist_irq_clear_pending(struct kvm_vcpu *vcpu, int irq)
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void vgic_dist_irq_clear_pending(struct kvm_vcpu *vcpu, int irq)
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{
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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@ -364,7 +346,7 @@ static void vgic_cpu_irq_set(struct kvm_vcpu *vcpu, int irq)
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vcpu->arch.vgic_cpu.pending_shared);
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}
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static void vgic_cpu_irq_clear(struct kvm_vcpu *vcpu, int irq)
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void vgic_cpu_irq_clear(struct kvm_vcpu *vcpu, int irq)
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{
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if (irq < VGIC_NR_PRIVATE_IRQS)
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clear_bit(irq, vcpu->arch.vgic_cpu.pending_percpu);
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@ -378,16 +360,6 @@ static bool vgic_can_sample_irq(struct kvm_vcpu *vcpu, int irq)
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return vgic_irq_is_edge(vcpu, irq) || !vgic_irq_is_queued(vcpu, irq);
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}
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static u32 mmio_data_read(struct kvm_exit_mmio *mmio, u32 mask)
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{
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return le32_to_cpu(*((u32 *)mmio->data)) & mask;
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}
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static void mmio_data_write(struct kvm_exit_mmio *mmio, u32 mask, u32 value)
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{
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*((u32 *)mmio->data) = cpu_to_le32(value) & mask;
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}
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/**
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* vgic_reg_access - access vgic register
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* @mmio: pointer to the data describing the mmio access
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@ -399,8 +371,8 @@ static void mmio_data_write(struct kvm_exit_mmio *mmio, u32 mask, u32 value)
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* modes defined for vgic register access
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* (read,raz,write-ignored,setbit,clearbit,write)
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*/
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static void vgic_reg_access(struct kvm_exit_mmio *mmio, u32 *reg,
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phys_addr_t offset, int mode)
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void vgic_reg_access(struct kvm_exit_mmio *mmio, u32 *reg,
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phys_addr_t offset, int mode)
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{
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int word_offset = (offset & 3) * 8;
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u32 mask = (1UL << (mmio->len * 8)) - 1;
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@ -484,16 +456,16 @@ static bool handle_mmio_misc(struct kvm_vcpu *vcpu,
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return false;
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}
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static bool handle_mmio_raz_wi(struct kvm_vcpu *vcpu,
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struct kvm_exit_mmio *mmio, phys_addr_t offset)
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bool handle_mmio_raz_wi(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio,
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phys_addr_t offset)
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{
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vgic_reg_access(mmio, NULL, offset,
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ACCESS_READ_RAZ | ACCESS_WRITE_IGNORED);
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return false;
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}
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static bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
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phys_addr_t offset, int vcpu_id, int access)
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bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
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phys_addr_t offset, int vcpu_id, int access)
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{
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u32 *reg;
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int mode = ACCESS_READ_VALUE | access;
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@ -530,9 +502,9 @@ static bool handle_mmio_clear_enable_reg(struct kvm_vcpu *vcpu,
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vcpu->vcpu_id, ACCESS_WRITE_CLEARBIT);
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}
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static bool vgic_handle_set_pending_reg(struct kvm *kvm,
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struct kvm_exit_mmio *mmio,
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phys_addr_t offset, int vcpu_id)
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bool vgic_handle_set_pending_reg(struct kvm *kvm,
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struct kvm_exit_mmio *mmio,
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phys_addr_t offset, int vcpu_id)
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{
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u32 *reg, orig;
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u32 level_mask;
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@ -567,9 +539,9 @@ static bool vgic_handle_set_pending_reg(struct kvm *kvm,
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return false;
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}
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static bool vgic_handle_clear_pending_reg(struct kvm *kvm,
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struct kvm_exit_mmio *mmio,
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phys_addr_t offset, int vcpu_id)
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bool vgic_handle_clear_pending_reg(struct kvm *kvm,
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struct kvm_exit_mmio *mmio,
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phys_addr_t offset, int vcpu_id)
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{
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u32 *level_active;
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u32 *reg, orig;
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@ -741,8 +713,8 @@ static u16 vgic_cfg_compress(u32 val)
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* LSB is always 0. As such, we only keep the upper bit, and use the
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* two above functions to compress/expand the bits
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*/
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static bool vgic_handle_cfg_reg(u32 *reg, struct kvm_exit_mmio *mmio,
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phys_addr_t offset)
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bool vgic_handle_cfg_reg(u32 *reg, struct kvm_exit_mmio *mmio,
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phys_addr_t offset)
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{
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u32 val;
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* to the distributor but the active state stays in the LRs, because we don't
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* track the active state on the distributor side.
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*/
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static void vgic_unqueue_irqs(struct kvm_vcpu *vcpu)
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void vgic_unqueue_irqs(struct kvm_vcpu *vcpu)
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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int i;
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return write_set_clear_sgi_pend_reg(vcpu, mmio, offset, false);
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}
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/*
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* I would have liked to use the kvm_bus_io_*() API instead, but it
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* cannot cope with banked registers (only the VM pointer is passed
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* around, and we need the vcpu). One of these days, someone please
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* fix it!
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*/
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struct mmio_range {
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phys_addr_t base;
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unsigned long len;
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int bits_per_irq;
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bool (*handle_mmio)(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio,
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phys_addr_t offset);
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};
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static const struct mmio_range vgic_dist_ranges[] = {
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static const struct kvm_mmio_range vgic_dist_ranges[] = {
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{
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.base = GIC_DIST_CTRL,
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.len = 12,
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{}
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};
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static const
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struct mmio_range *find_matching_range(const struct mmio_range *ranges,
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const
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struct kvm_mmio_range *vgic_find_range(const struct kvm_mmio_range *ranges,
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struct kvm_exit_mmio *mmio,
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phys_addr_t offset)
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{
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const struct mmio_range *r = ranges;
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const struct kvm_mmio_range *r = ranges;
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while (r->len) {
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if (offset >= r->base &&
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}
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static bool vgic_validate_access(const struct vgic_dist *dist,
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const struct mmio_range *range,
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const struct kvm_mmio_range *range,
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unsigned long offset)
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{
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int irq;
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static bool call_range_handler(struct kvm_vcpu *vcpu,
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struct kvm_exit_mmio *mmio,
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unsigned long offset,
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const struct mmio_range *range)
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const struct kvm_mmio_range *range)
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{
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u32 *data32 = (void *)mmio->data;
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struct kvm_exit_mmio mmio32;
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*
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* returns true if the MMIO access could be performed
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*/
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static bool vgic_handle_mmio_range(struct kvm_vcpu *vcpu, struct kvm_run *run,
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bool vgic_handle_mmio_range(struct kvm_vcpu *vcpu, struct kvm_run *run,
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struct kvm_exit_mmio *mmio,
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const struct mmio_range *ranges,
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const struct kvm_mmio_range *ranges,
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unsigned long mmio_base)
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{
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const struct mmio_range *range;
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const struct kvm_mmio_range *range;
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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bool updated_state;
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unsigned long offset;
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offset = mmio->phys_addr - mmio_base;
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range = find_matching_range(ranges, mmio, offset);
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range = vgic_find_range(ranges, mmio, offset);
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if (unlikely(!range || !range->handle_mmio)) {
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pr_warn("Unhandled access %d %08llx %d\n",
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mmio->is_write, mmio->phys_addr, mmio->len);
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return true;
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}
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static inline bool is_in_range(phys_addr_t addr, unsigned long len,
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phys_addr_t baseaddr, unsigned long size)
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{
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return (addr >= baseaddr) && (addr + len <= baseaddr + size);
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}
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static bool vgic_v2_handle_mmio(struct kvm_vcpu *vcpu, struct kvm_run *run,
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struct kvm_exit_mmio *mmio)
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{
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* Update the interrupt state and determine which CPUs have pending
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* interrupts. Must be called with distributor lock held.
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*/
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static void vgic_update_state(struct kvm *kvm)
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void vgic_update_state(struct kvm *kvm)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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struct kvm_vcpu *vcpu;
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vgic_ops->disable_underflow(vcpu);
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}
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static inline void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
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void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
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{
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vgic_ops->get_vmcr(vcpu, vmcr);
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}
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static void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
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void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr)
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{
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vgic_ops->set_vmcr(vcpu, vmcr);
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}
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* Queue an interrupt to a CPU virtual interface. Return true on success,
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* or false if it wasn't possible to queue it.
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*/
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static bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq)
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bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq)
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{
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struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu;
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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return test_bit(vcpu->vcpu_id, dist->irq_pending_on_cpu);
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}
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static void vgic_kick_vcpus(struct kvm *kvm)
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void vgic_kick_vcpus(struct kvm *kvm)
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{
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struct kvm_vcpu *vcpu;
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int c;
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* Allocate and initialize the various data structures. Must be called
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* with kvm->lock held!
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*/
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static int vgic_init(struct kvm *kvm)
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int vgic_init(struct kvm *kvm)
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{
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struct vgic_dist *dist = &kvm->arch.vgic;
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struct kvm_vcpu *vcpu;
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return ret;
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||||
}
|
||||
|
||||
static void vgic_v2_init_emulation(struct kvm *kvm)
|
||||
void vgic_v2_init_emulation(struct kvm *kvm)
|
||||
{
|
||||
struct vgic_dist *dist = &kvm->arch.vgic;
|
||||
|
||||
|
@ -2326,7 +2278,7 @@ static bool handle_cpu_mmio_ident(struct kvm_vcpu *vcpu,
|
|||
* CPU Interface Register accesses - these are not accessed by the VM, but by
|
||||
* user space for saving and restoring VGIC state.
|
||||
*/
|
||||
static const struct mmio_range vgic_cpu_ranges[] = {
|
||||
static const struct kvm_mmio_range vgic_cpu_ranges[] = {
|
||||
{
|
||||
.base = GIC_CPU_CTRL,
|
||||
.len = 12,
|
||||
|
@ -2353,7 +2305,7 @@ static int vgic_attr_regs_access(struct kvm_device *dev,
|
|||
struct kvm_device_attr *attr,
|
||||
u32 *reg, bool is_write)
|
||||
{
|
||||
const struct mmio_range *r = NULL, *ranges;
|
||||
const struct kvm_mmio_range *r = NULL, *ranges;
|
||||
phys_addr_t offset;
|
||||
int ret, cpuid, c;
|
||||
struct kvm_vcpu *vcpu, *tmp_vcpu;
|
||||
|
@ -2394,7 +2346,7 @@ static int vgic_attr_regs_access(struct kvm_device *dev,
|
|||
default:
|
||||
BUG();
|
||||
}
|
||||
r = find_matching_range(ranges, &mmio, offset);
|
||||
r = vgic_find_range(ranges, &mmio, offset);
|
||||
|
||||
if (unlikely(!r || !r->handle_mmio)) {
|
||||
ret = -ENXIO;
|
||||
|
@ -2440,8 +2392,7 @@ out:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int vgic_set_common_attr(struct kvm_device *dev,
|
||||
struct kvm_device_attr *attr)
|
||||
int vgic_set_common_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
|
||||
{
|
||||
int r;
|
||||
|
||||
|
@ -2525,8 +2476,7 @@ static int vgic_set_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
|
|||
return -ENXIO;
|
||||
}
|
||||
|
||||
static int vgic_get_common_attr(struct kvm_device *dev,
|
||||
struct kvm_device_attr *attr)
|
||||
int vgic_get_common_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
|
||||
{
|
||||
int r = -ENXIO;
|
||||
|
||||
|
@ -2581,13 +2531,12 @@ static int vgic_get_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
|
|||
return -ENXIO;
|
||||
}
|
||||
|
||||
static int vgic_has_attr_regs(const struct mmio_range *ranges,
|
||||
phys_addr_t offset)
|
||||
int vgic_has_attr_regs(const struct kvm_mmio_range *ranges, phys_addr_t offset)
|
||||
{
|
||||
struct kvm_exit_mmio dev_attr_mmio;
|
||||
|
||||
dev_attr_mmio.len = 4;
|
||||
if (find_matching_range(ranges, &dev_attr_mmio, offset))
|
||||
if (vgic_find_range(ranges, &dev_attr_mmio, offset))
|
||||
return 0;
|
||||
else
|
||||
return -ENXIO;
|
||||
|
@ -2622,12 +2571,12 @@ static int vgic_has_attr(struct kvm_device *dev, struct kvm_device_attr *attr)
|
|||
return -ENXIO;
|
||||
}
|
||||
|
||||
static void vgic_destroy(struct kvm_device *dev)
|
||||
void vgic_destroy(struct kvm_device *dev)
|
||||
{
|
||||
kfree(dev);
|
||||
}
|
||||
|
||||
static int vgic_create(struct kvm_device *dev, u32 type)
|
||||
int vgic_create(struct kvm_device *dev, u32 type)
|
||||
{
|
||||
return kvm_vgic_create(dev->kvm, type);
|
||||
}
|
||||
|
|
120
virt/kvm/arm/vgic.h
Normal file
120
virt/kvm/arm/vgic.h
Normal file
|
@ -0,0 +1,120 @@
|
|||
/*
|
||||
* Copyright (C) 2012-2014 ARM Ltd.
|
||||
* Author: Marc Zyngier <marc.zyngier@arm.com>
|
||||
*
|
||||
* Derived from virt/kvm/arm/vgic.c
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#ifndef __KVM_VGIC_H__
|
||||
#define __KVM_VGIC_H__
|
||||
|
||||
#define VGIC_ADDR_UNDEF (-1)
|
||||
#define IS_VGIC_ADDR_UNDEF(_x) ((_x) == VGIC_ADDR_UNDEF)
|
||||
|
||||
#define PRODUCT_ID_KVM 0x4b /* ASCII code K */
|
||||
#define IMPLEMENTER_ARM 0x43b
|
||||
|
||||
#define ACCESS_READ_VALUE (1 << 0)
|
||||
#define ACCESS_READ_RAZ (0 << 0)
|
||||
#define ACCESS_READ_MASK(x) ((x) & (1 << 0))
|
||||
#define ACCESS_WRITE_IGNORED (0 << 1)
|
||||
#define ACCESS_WRITE_SETBIT (1 << 1)
|
||||
#define ACCESS_WRITE_CLEARBIT (2 << 1)
|
||||
#define ACCESS_WRITE_VALUE (3 << 1)
|
||||
#define ACCESS_WRITE_MASK(x) ((x) & (3 << 1))
|
||||
|
||||
unsigned long *vgic_bitmap_get_shared_map(struct vgic_bitmap *x);
|
||||
|
||||
void vgic_update_state(struct kvm *kvm);
|
||||
int vgic_init_common_maps(struct kvm *kvm);
|
||||
|
||||
u32 *vgic_bitmap_get_reg(struct vgic_bitmap *x, int cpuid, u32 offset);
|
||||
u32 *vgic_bytemap_get_reg(struct vgic_bytemap *x, int cpuid, u32 offset);
|
||||
|
||||
void vgic_dist_irq_set_pending(struct kvm_vcpu *vcpu, int irq);
|
||||
void vgic_dist_irq_clear_pending(struct kvm_vcpu *vcpu, int irq);
|
||||
void vgic_cpu_irq_clear(struct kvm_vcpu *vcpu, int irq);
|
||||
void vgic_bitmap_set_irq_val(struct vgic_bitmap *x, int cpuid,
|
||||
int irq, int val);
|
||||
|
||||
void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
|
||||
void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr);
|
||||
|
||||
bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq);
|
||||
void vgic_unqueue_irqs(struct kvm_vcpu *vcpu);
|
||||
|
||||
void vgic_reg_access(struct kvm_exit_mmio *mmio, u32 *reg,
|
||||
phys_addr_t offset, int mode);
|
||||
bool handle_mmio_raz_wi(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset);
|
||||
|
||||
static inline
|
||||
u32 mmio_data_read(struct kvm_exit_mmio *mmio, u32 mask)
|
||||
{
|
||||
return le32_to_cpu(*((u32 *)mmio->data)) & mask;
|
||||
}
|
||||
|
||||
static inline
|
||||
void mmio_data_write(struct kvm_exit_mmio *mmio, u32 mask, u32 value)
|
||||
{
|
||||
*((u32 *)mmio->data) = cpu_to_le32(value) & mask;
|
||||
}
|
||||
|
||||
struct kvm_mmio_range {
|
||||
phys_addr_t base;
|
||||
unsigned long len;
|
||||
int bits_per_irq;
|
||||
bool (*handle_mmio)(struct kvm_vcpu *vcpu, struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset);
|
||||
};
|
||||
|
||||
static inline bool is_in_range(phys_addr_t addr, unsigned long len,
|
||||
phys_addr_t baseaddr, unsigned long size)
|
||||
{
|
||||
return (addr >= baseaddr) && (addr + len <= baseaddr + size);
|
||||
}
|
||||
|
||||
const
|
||||
struct kvm_mmio_range *vgic_find_range(const struct kvm_mmio_range *ranges,
|
||||
struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset);
|
||||
|
||||
bool vgic_handle_mmio_range(struct kvm_vcpu *vcpu, struct kvm_run *run,
|
||||
struct kvm_exit_mmio *mmio,
|
||||
const struct kvm_mmio_range *ranges,
|
||||
unsigned long mmio_base);
|
||||
|
||||
bool vgic_handle_enable_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset, int vcpu_id, int access);
|
||||
|
||||
bool vgic_handle_set_pending_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset, int vcpu_id);
|
||||
|
||||
bool vgic_handle_clear_pending_reg(struct kvm *kvm, struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset, int vcpu_id);
|
||||
|
||||
bool vgic_handle_cfg_reg(u32 *reg, struct kvm_exit_mmio *mmio,
|
||||
phys_addr_t offset);
|
||||
|
||||
void vgic_kick_vcpus(struct kvm *kvm);
|
||||
|
||||
int vgic_has_attr_regs(const struct kvm_mmio_range *ranges, phys_addr_t offset);
|
||||
int vgic_set_common_attr(struct kvm_device *dev, struct kvm_device_attr *attr);
|
||||
int vgic_get_common_attr(struct kvm_device *dev, struct kvm_device_attr *attr);
|
||||
|
||||
int vgic_init(struct kvm *kvm);
|
||||
void vgic_v2_init_emulation(struct kvm *kvm);
|
||||
|
||||
#endif
|
Loading…
Reference in a new issue