drm/i915 fixes for v4.18-rc2:
- Mostly cc: stable display fixes, including a DBLSCAN regression fix - GEM fixes for this merge window -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEFWWmW3ewYy4RJOWc05gHnSar7m8FAlsrlYkACgkQ05gHnSar 7m+EGRAAijMrQKDjIsADuHIJkeSztntpBi5pGotPrBpl7OLTmHQzOGrWYqOxX5Wv 1phjTwbkdiKac2edhvn3OFj1bvT5AMUMI+9kiTu6WxxbaQSgHlhiEUlZ+Mm10ilB v2nOM8hB4/pL4kpFWLbuEHjUiwAwlRqPeO7tTdsAiPNJTaUth2bMRMXx03CtQhzT 8Z/NMbkfNmAk7g/4u2FBC06Nb0wl/vlYfExk7gz+Hg5VPEOridZR6WVdT+c/SBhE ilfh1O757Y8b/9ftU29GpDElufRbrw6naE9o57aX9poWVFZ8KnDO6JyhLJFPfv+L xVLHcwTd70cF4hHH/kxRiLSrzkRp7hfcKIQMDtVkzTNuoI963jTDxC9oaf5vfY4f pLsMJXmnEy9a2y9rkUPt8F87ceof+BTKWVqysO2cSlhwo33f737jtaL9XAsOPXmS dusdPD88uCnTstQxQEcKUBSJ92m9ruIHeKVncuHKIShIWOWWF7DZQbRt+kWq5TBR GxYVQRtnzSkedvJcqTDENKTLllShyxTbEjLvODpYTMSHkd9Jr9kxDGQMVzJayWly kx91m08y0Fa4OeUCl9FyPPG4ZjH72qdaxt0C/teJ7qGgKwryeFbiCx1aWDpRgFge FkA/2V79KmMqZHb9Y5rFr5q6cSgj852N4nVedBnzYgCNrJrW0KE= =drSH -----END PGP SIGNATURE----- Merge tag 'drm-intel-fixes-2018-06-21' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes drm/i915 fixes for v4.18-rc2: - Mostly cc: stable display fixes, including a DBLSCAN regression fix - GEM fixes for this merge window Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/87d0wkuypy.fsf@intel.com
This commit is contained in:
commit
8325e6e36c
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@ -340,14 +340,21 @@ struct drm_i915_file_private {
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unsigned int bsd_engine;
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/* Client can have a maximum of 3 contexts banned before
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* it is denied of creating new contexts. As one context
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* ban needs 4 consecutive hangs, and more if there is
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* progress in between, this is a last resort stop gap measure
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* to limit the badly behaving clients access to gpu.
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/*
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* Every context ban increments per client ban score. Also
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* hangs in short succession increments ban score. If ban threshold
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* is reached, client is considered banned and submitting more work
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* will fail. This is a stop gap measure to limit the badly behaving
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* clients access to gpu. Note that unbannable contexts never increment
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* the client ban score.
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*/
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#define I915_MAX_CLIENT_CONTEXT_BANS 3
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atomic_t context_bans;
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#define I915_CLIENT_SCORE_HANG_FAST 1
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#define I915_CLIENT_FAST_HANG_JIFFIES (60 * HZ)
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#define I915_CLIENT_SCORE_CONTEXT_BAN 3
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#define I915_CLIENT_SCORE_BANNED 9
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/** ban_score: Accumulated score of all ctx bans and fast hangs. */
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atomic_t ban_score;
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unsigned long hang_timestamp;
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};
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/* Interface history:
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@ -2933,32 +2933,54 @@ i915_gem_object_pwrite_gtt(struct drm_i915_gem_object *obj,
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return 0;
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}
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static void i915_gem_client_mark_guilty(struct drm_i915_file_private *file_priv,
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const struct i915_gem_context *ctx)
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{
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unsigned int score;
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unsigned long prev_hang;
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if (i915_gem_context_is_banned(ctx))
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score = I915_CLIENT_SCORE_CONTEXT_BAN;
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else
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score = 0;
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prev_hang = xchg(&file_priv->hang_timestamp, jiffies);
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if (time_before(jiffies, prev_hang + I915_CLIENT_FAST_HANG_JIFFIES))
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score += I915_CLIENT_SCORE_HANG_FAST;
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if (score) {
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atomic_add(score, &file_priv->ban_score);
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DRM_DEBUG_DRIVER("client %s: gained %u ban score, now %u\n",
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ctx->name, score,
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atomic_read(&file_priv->ban_score));
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}
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}
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static void i915_gem_context_mark_guilty(struct i915_gem_context *ctx)
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{
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bool banned;
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unsigned int score;
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bool banned, bannable;
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atomic_inc(&ctx->guilty_count);
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banned = false;
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if (i915_gem_context_is_bannable(ctx)) {
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unsigned int score;
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bannable = i915_gem_context_is_bannable(ctx);
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score = atomic_add_return(CONTEXT_SCORE_GUILTY, &ctx->ban_score);
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banned = score >= CONTEXT_SCORE_BAN_THRESHOLD;
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score = atomic_add_return(CONTEXT_SCORE_GUILTY,
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&ctx->ban_score);
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banned = score >= CONTEXT_SCORE_BAN_THRESHOLD;
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DRM_DEBUG_DRIVER("context %s: guilty %d, score %u, ban %s\n",
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ctx->name, atomic_read(&ctx->guilty_count),
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score, yesno(banned && bannable));
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DRM_DEBUG_DRIVER("context %s marked guilty (score %d) banned? %s\n",
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ctx->name, score, yesno(banned));
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}
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if (!banned)
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/* Cool contexts don't accumulate client ban score */
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if (!bannable)
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return;
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i915_gem_context_set_banned(ctx);
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if (!IS_ERR_OR_NULL(ctx->file_priv)) {
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atomic_inc(&ctx->file_priv->context_bans);
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DRM_DEBUG_DRIVER("client %s has had %d context banned\n",
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ctx->name, atomic_read(&ctx->file_priv->context_bans));
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}
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if (banned)
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i915_gem_context_set_banned(ctx);
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if (!IS_ERR_OR_NULL(ctx->file_priv))
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i915_gem_client_mark_guilty(ctx->file_priv, ctx);
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}
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static void i915_gem_context_mark_innocent(struct i915_gem_context *ctx)
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@ -5736,6 +5758,7 @@ int i915_gem_open(struct drm_i915_private *i915, struct drm_file *file)
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INIT_LIST_HEAD(&file_priv->mm.request_list);
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file_priv->bsd_engine = -1;
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file_priv->hang_timestamp = jiffies;
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ret = i915_gem_context_open(i915, file);
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if (ret)
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@ -652,7 +652,7 @@ int i915_gem_switch_to_kernel_context(struct drm_i915_private *dev_priv)
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static bool client_is_banned(struct drm_i915_file_private *file_priv)
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{
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return atomic_read(&file_priv->context_bans) > I915_MAX_CLIENT_CONTEXT_BANS;
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return atomic_read(&file_priv->ban_score) >= I915_CLIENT_SCORE_BANNED;
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}
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int i915_gem_context_create_ioctl(struct drm_device *dev, void *data,
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@ -489,7 +489,9 @@ eb_validate_vma(struct i915_execbuffer *eb,
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}
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static int
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eb_add_vma(struct i915_execbuffer *eb, unsigned int i, struct i915_vma *vma)
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eb_add_vma(struct i915_execbuffer *eb,
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unsigned int i, unsigned batch_idx,
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struct i915_vma *vma)
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{
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struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
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int err;
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@ -522,6 +524,24 @@ eb_add_vma(struct i915_execbuffer *eb, unsigned int i, struct i915_vma *vma)
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eb->flags[i] = entry->flags;
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vma->exec_flags = &eb->flags[i];
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/*
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* SNA is doing fancy tricks with compressing batch buffers, which leads
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* to negative relocation deltas. Usually that works out ok since the
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* relocate address is still positive, except when the batch is placed
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* very low in the GTT. Ensure this doesn't happen.
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*
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* Note that actual hangs have only been observed on gen7, but for
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* paranoia do it everywhere.
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*/
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if (i == batch_idx) {
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if (!(eb->flags[i] & EXEC_OBJECT_PINNED))
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eb->flags[i] |= __EXEC_OBJECT_NEEDS_BIAS;
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if (eb->reloc_cache.has_fence)
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eb->flags[i] |= EXEC_OBJECT_NEEDS_FENCE;
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eb->batch = vma;
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}
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err = 0;
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if (eb_pin_vma(eb, entry, vma)) {
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if (entry->offset != vma->node.start) {
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@ -716,7 +736,7 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb)
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{
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struct radix_tree_root *handles_vma = &eb->ctx->handles_vma;
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struct drm_i915_gem_object *obj;
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unsigned int i;
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unsigned int i, batch;
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int err;
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if (unlikely(i915_gem_context_is_closed(eb->ctx)))
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@ -728,6 +748,8 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb)
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INIT_LIST_HEAD(&eb->relocs);
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INIT_LIST_HEAD(&eb->unbound);
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batch = eb_batch_index(eb);
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for (i = 0; i < eb->buffer_count; i++) {
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u32 handle = eb->exec[i].handle;
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struct i915_lut_handle *lut;
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@ -770,33 +792,16 @@ static int eb_lookup_vmas(struct i915_execbuffer *eb)
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lut->handle = handle;
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add_vma:
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err = eb_add_vma(eb, i, vma);
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err = eb_add_vma(eb, i, batch, vma);
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if (unlikely(err))
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goto err_vma;
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GEM_BUG_ON(vma != eb->vma[i]);
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GEM_BUG_ON(vma->exec_flags != &eb->flags[i]);
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GEM_BUG_ON(drm_mm_node_allocated(&vma->node) &&
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eb_vma_misplaced(&eb->exec[i], vma, eb->flags[i]));
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}
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/* take note of the batch buffer before we might reorder the lists */
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i = eb_batch_index(eb);
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eb->batch = eb->vma[i];
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GEM_BUG_ON(eb->batch->exec_flags != &eb->flags[i]);
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/*
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* SNA is doing fancy tricks with compressing batch buffers, which leads
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* to negative relocation deltas. Usually that works out ok since the
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* relocate address is still positive, except when the batch is placed
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* very low in the GTT. Ensure this doesn't happen.
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*
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* Note that actual hangs have only been observed on gen7, but for
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* paranoia do it everywhere.
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*/
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if (!(eb->flags[i] & EXEC_OBJECT_PINNED))
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eb->flags[i] |= __EXEC_OBJECT_NEEDS_BIAS;
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if (eb->reloc_cache.has_fence)
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eb->flags[i] |= EXEC_OBJECT_NEEDS_FENCE;
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eb->args->flags |= __EXEC_VALIDATED;
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return eb_reserve(eb);
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@ -1893,9 +1893,17 @@ static void i9xx_pipestat_irq_ack(struct drm_i915_private *dev_priv,
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/*
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* Clear the PIPE*STAT regs before the IIR
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*
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* Toggle the enable bits to make sure we get an
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* edge in the ISR pipe event bit if we don't clear
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* all the enabled status bits. Otherwise the edge
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* triggered IIR on i965/g4x wouldn't notice that
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* an interrupt is still pending.
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*/
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if (pipe_stats[pipe])
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I915_WRITE(reg, enable_mask | pipe_stats[pipe]);
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if (pipe_stats[pipe]) {
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I915_WRITE(reg, pipe_stats[pipe]);
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I915_WRITE(reg, enable_mask);
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}
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}
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spin_unlock(&dev_priv->irq_lock);
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}
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@ -2425,12 +2425,17 @@ enum i915_power_well_id {
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#define _3D_CHICKEN _MMIO(0x2084)
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#define _3D_CHICKEN_HIZ_PLANE_DISABLE_MSAA_4X_SNB (1 << 10)
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#define _3D_CHICKEN2 _MMIO(0x208c)
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#define FF_SLICE_CHICKEN _MMIO(0x2088)
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#define FF_SLICE_CHICKEN_CL_PROVOKING_VERTEX_FIX (1 << 1)
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/* Disables pipelining of read flushes past the SF-WIZ interface.
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* Required on all Ironlake steppings according to the B-Spec, but the
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* particular danger of not doing so is not specified.
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*/
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# define _3D_CHICKEN2_WM_READ_PIPELINED (1 << 14)
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#define _3D_CHICKEN3 _MMIO(0x2090)
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#define _3D_CHICKEN_SF_PROVOKING_VERTEX_FIX (1 << 12)
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#define _3D_CHICKEN_SF_DISABLE_OBJEND_CULL (1 << 10)
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#define _3D_CHICKEN3_AA_LINE_QUALITY_FIX_ENABLE (1 << 5)
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#define _3D_CHICKEN3_SF_DISABLE_FASTCLIP_CULL (1 << 5)
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|
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@ -304,6 +304,9 @@ intel_crt_mode_valid(struct drm_connector *connector,
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int max_dotclk = dev_priv->max_dotclk_freq;
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int max_clock;
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return MODE_NO_DBLESCAN;
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if (mode->clock < 25000)
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return MODE_CLOCK_LOW;
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@ -337,6 +340,12 @@ static bool intel_crt_compute_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config,
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struct drm_connector_state *conn_state)
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{
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struct drm_display_mode *adjusted_mode =
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&pipe_config->base.adjusted_mode;
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if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return false;
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return true;
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}
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|
@ -344,6 +353,12 @@ static bool pch_crt_compute_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config,
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struct drm_connector_state *conn_state)
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{
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struct drm_display_mode *adjusted_mode =
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&pipe_config->base.adjusted_mode;
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if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
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return false;
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pipe_config->has_pch_encoder = true;
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return true;
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|
@ -354,6 +369,11 @@ static bool hsw_crt_compute_config(struct intel_encoder *encoder,
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struct drm_connector_state *conn_state)
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{
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||||
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
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||||
struct drm_display_mode *adjusted_mode =
|
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&pipe_config->base.adjusted_mode;
|
||||
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
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return false;
|
||||
|
||||
pipe_config->has_pch_encoder = true;
|
||||
|
||||
|
|
|
@ -14469,12 +14469,22 @@ static enum drm_mode_status
|
|||
intel_mode_valid(struct drm_device *dev,
|
||||
const struct drm_display_mode *mode)
|
||||
{
|
||||
/*
|
||||
* Can't reject DBLSCAN here because Xorg ddxen can add piles
|
||||
* of DBLSCAN modes to the output's mode list when they detect
|
||||
* the scaling mode property on the connector. And they don't
|
||||
* ask the kernel to validate those modes in any way until
|
||||
* modeset time at which point the client gets a protocol error.
|
||||
* So in order to not upset those clients we silently ignore the
|
||||
* DBLSCAN flag on such connectors. For other connectors we will
|
||||
* reject modes with the DBLSCAN flag in encoder->compute_config().
|
||||
* And we always reject DBLSCAN modes in connector->mode_valid()
|
||||
* as we never want such modes on the connector's mode list.
|
||||
*/
|
||||
|
||||
if (mode->vscan > 1)
|
||||
return MODE_NO_VSCAN;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_HSKEW)
|
||||
return MODE_H_ILLEGAL;
|
||||
|
||||
|
|
|
@ -420,6 +420,9 @@ intel_dp_mode_valid(struct drm_connector *connector,
|
|||
int max_rate, mode_rate, max_lanes, max_link_clock;
|
||||
int max_dotclk;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
max_dotclk = intel_dp_downstream_max_dotclock(intel_dp);
|
||||
|
||||
if (intel_dp_is_edp(intel_dp) && fixed_mode) {
|
||||
|
@ -1862,7 +1865,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
|
|||
conn_state->scaling_mode);
|
||||
}
|
||||
|
||||
if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) &&
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return false;
|
||||
|
||||
if (HAS_GMCH_DISPLAY(dev_priv) &&
|
||||
adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
|
||||
return false;
|
||||
|
||||
|
@ -2782,16 +2788,6 @@ static void intel_disable_dp(struct intel_encoder *encoder,
|
|||
static void g4x_disable_dp(struct intel_encoder *encoder,
|
||||
const struct intel_crtc_state *old_crtc_state,
|
||||
const struct drm_connector_state *old_conn_state)
|
||||
{
|
||||
intel_disable_dp(encoder, old_crtc_state, old_conn_state);
|
||||
|
||||
/* disable the port before the pipe on g4x */
|
||||
intel_dp_link_down(encoder, old_crtc_state);
|
||||
}
|
||||
|
||||
static void ilk_disable_dp(struct intel_encoder *encoder,
|
||||
const struct intel_crtc_state *old_crtc_state,
|
||||
const struct drm_connector_state *old_conn_state)
|
||||
{
|
||||
intel_disable_dp(encoder, old_crtc_state, old_conn_state);
|
||||
}
|
||||
|
@ -2807,13 +2803,19 @@ static void vlv_disable_dp(struct intel_encoder *encoder,
|
|||
intel_disable_dp(encoder, old_crtc_state, old_conn_state);
|
||||
}
|
||||
|
||||
static void ilk_post_disable_dp(struct intel_encoder *encoder,
|
||||
static void g4x_post_disable_dp(struct intel_encoder *encoder,
|
||||
const struct intel_crtc_state *old_crtc_state,
|
||||
const struct drm_connector_state *old_conn_state)
|
||||
{
|
||||
struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
|
||||
enum port port = encoder->port;
|
||||
|
||||
/*
|
||||
* Bspec does not list a specific disable sequence for g4x DP.
|
||||
* Follow the ilk+ sequence (disable pipe before the port) for
|
||||
* g4x DP as it does not suffer from underruns like the normal
|
||||
* g4x modeset sequence (disable pipe after the port).
|
||||
*/
|
||||
intel_dp_link_down(encoder, old_crtc_state);
|
||||
|
||||
/* Only ilk+ has port A */
|
||||
|
@ -6337,7 +6339,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
|
|||
drm_connector_init(dev, connector, &intel_dp_connector_funcs, type);
|
||||
drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs);
|
||||
|
||||
if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv))
|
||||
if (!HAS_GMCH_DISPLAY(dev_priv))
|
||||
connector->interlace_allowed = true;
|
||||
connector->doublescan_allowed = 0;
|
||||
|
||||
|
@ -6436,15 +6438,11 @@ bool intel_dp_init(struct drm_i915_private *dev_priv,
|
|||
intel_encoder->enable = vlv_enable_dp;
|
||||
intel_encoder->disable = vlv_disable_dp;
|
||||
intel_encoder->post_disable = vlv_post_disable_dp;
|
||||
} else if (INTEL_GEN(dev_priv) >= 5) {
|
||||
intel_encoder->pre_enable = g4x_pre_enable_dp;
|
||||
intel_encoder->enable = g4x_enable_dp;
|
||||
intel_encoder->disable = ilk_disable_dp;
|
||||
intel_encoder->post_disable = ilk_post_disable_dp;
|
||||
} else {
|
||||
intel_encoder->pre_enable = g4x_pre_enable_dp;
|
||||
intel_encoder->enable = g4x_enable_dp;
|
||||
intel_encoder->disable = g4x_disable_dp;
|
||||
intel_encoder->post_disable = g4x_post_disable_dp;
|
||||
}
|
||||
|
||||
intel_dig_port->dp.output_reg = output_reg;
|
||||
|
|
|
@ -48,6 +48,9 @@ static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
|
|||
bool reduce_m_n = drm_dp_has_quirk(&intel_dp->desc,
|
||||
DP_DPCD_QUIRK_LIMITED_M_N);
|
||||
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return false;
|
||||
|
||||
pipe_config->has_pch_encoder = false;
|
||||
bpp = 24;
|
||||
if (intel_dp->compliance.test_data.bpc) {
|
||||
|
@ -366,6 +369,9 @@ intel_dp_mst_mode_valid(struct drm_connector *connector,
|
|||
if (!intel_dp)
|
||||
return MODE_ERROR;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
max_link_clock = intel_dp_max_link_rate(intel_dp);
|
||||
max_lanes = intel_dp_max_lane_count(intel_dp);
|
||||
|
||||
|
|
|
@ -326,6 +326,9 @@ static bool intel_dsi_compute_config(struct intel_encoder *encoder,
|
|||
conn_state->scaling_mode);
|
||||
}
|
||||
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return false;
|
||||
|
||||
/* DSI uses short packets for sync events, so clear mode flags for DSI */
|
||||
adjusted_mode->flags = 0;
|
||||
|
||||
|
@ -1266,6 +1269,9 @@ intel_dsi_mode_valid(struct drm_connector *connector,
|
|||
|
||||
DRM_DEBUG_KMS("\n");
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
if (fixed_mode) {
|
||||
if (mode->hdisplay > fixed_mode->hdisplay)
|
||||
return MODE_PANEL;
|
||||
|
|
|
@ -219,6 +219,9 @@ intel_dvo_mode_valid(struct drm_connector *connector,
|
|||
int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
|
||||
int target_clock = mode->clock;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
/* XXX: Validate clock range */
|
||||
|
||||
if (fixed_mode) {
|
||||
|
@ -254,6 +257,9 @@ static bool intel_dvo_compute_config(struct intel_encoder *encoder,
|
|||
if (fixed_mode)
|
||||
intel_fixed_panel_mode(fixed_mode, adjusted_mode);
|
||||
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
|
|
|
@ -1557,6 +1557,9 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
|
|||
bool force_dvi =
|
||||
READ_ONCE(to_intel_digital_connector_state(connector->state)->force_audio) == HDMI_AUDIO_OFF_DVI;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
clock = mode->clock;
|
||||
|
||||
if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING)
|
||||
|
@ -1677,6 +1680,9 @@ bool intel_hdmi_compute_config(struct intel_encoder *encoder,
|
|||
int desired_bpp;
|
||||
bool force_dvi = intel_conn_state->force_audio == HDMI_AUDIO_OFF_DVI;
|
||||
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return false;
|
||||
|
||||
pipe_config->has_hdmi_sink = !force_dvi && intel_hdmi->has_hdmi_sink;
|
||||
|
||||
if (pipe_config->has_hdmi_sink)
|
||||
|
|
|
@ -1545,11 +1545,21 @@ static u32 *gen9_init_indirectctx_bb(struct intel_engine_cs *engine, u32 *batch)
|
|||
/* WaFlushCoherentL3CacheLinesAtContextSwitch:skl,bxt,glk */
|
||||
batch = gen8_emit_flush_coherentl3_wa(engine, batch);
|
||||
|
||||
*batch++ = MI_LOAD_REGISTER_IMM(3);
|
||||
|
||||
/* WaDisableGatherAtSetShaderCommonSlice:skl,bxt,kbl,glk */
|
||||
*batch++ = MI_LOAD_REGISTER_IMM(1);
|
||||
*batch++ = i915_mmio_reg_offset(COMMON_SLICE_CHICKEN2);
|
||||
*batch++ = _MASKED_BIT_DISABLE(
|
||||
GEN9_DISABLE_GATHER_AT_SET_SHADER_COMMON_SLICE);
|
||||
|
||||
/* BSpec: 11391 */
|
||||
*batch++ = i915_mmio_reg_offset(FF_SLICE_CHICKEN);
|
||||
*batch++ = _MASKED_BIT_ENABLE(FF_SLICE_CHICKEN_CL_PROVOKING_VERTEX_FIX);
|
||||
|
||||
/* BSpec: 11299 */
|
||||
*batch++ = i915_mmio_reg_offset(_3D_CHICKEN3);
|
||||
*batch++ = _MASKED_BIT_ENABLE(_3D_CHICKEN_SF_PROVOKING_VERTEX_FIX);
|
||||
|
||||
*batch++ = MI_NOOP;
|
||||
|
||||
/* WaClearSlmSpaceAtContextSwitch:kbl */
|
||||
|
@ -2641,10 +2651,8 @@ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
|
|||
context_size += LRC_HEADER_PAGES * PAGE_SIZE;
|
||||
|
||||
ctx_obj = i915_gem_object_create(ctx->i915, context_size);
|
||||
if (IS_ERR(ctx_obj)) {
|
||||
ret = PTR_ERR(ctx_obj);
|
||||
goto error_deref_obj;
|
||||
}
|
||||
if (IS_ERR(ctx_obj))
|
||||
return PTR_ERR(ctx_obj);
|
||||
|
||||
vma = i915_vma_instance(ctx_obj, &ctx->i915->ggtt.base, NULL);
|
||||
if (IS_ERR(vma)) {
|
||||
|
|
|
@ -380,6 +380,8 @@ intel_lvds_mode_valid(struct drm_connector *connector,
|
|||
struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
|
||||
int max_pixclk = to_i915(connector->dev)->max_dotclk_freq;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
if (mode->hdisplay > fixed_mode->hdisplay)
|
||||
return MODE_PANEL;
|
||||
if (mode->vdisplay > fixed_mode->vdisplay)
|
||||
|
@ -429,6 +431,9 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
|
|||
intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
|
||||
adjusted_mode);
|
||||
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return false;
|
||||
|
||||
if (HAS_PCH_SPLIT(dev_priv)) {
|
||||
pipe_config->has_pch_encoder = true;
|
||||
|
||||
|
|
|
@ -1160,6 +1160,9 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
|
|||
adjusted_mode);
|
||||
}
|
||||
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return false;
|
||||
|
||||
/*
|
||||
* Make the CRTC code factor in the SDVO pixel multiplier. The
|
||||
* SDVO device will factor out the multiplier during mode_set.
|
||||
|
@ -1621,6 +1624,9 @@ intel_sdvo_mode_valid(struct drm_connector *connector,
|
|||
struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
|
||||
int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
if (intel_sdvo->pixel_clock_min > mode->clock)
|
||||
return MODE_CLOCK_LOW;
|
||||
|
||||
|
|
|
@ -850,6 +850,9 @@ intel_tv_mode_valid(struct drm_connector *connector,
|
|||
const struct tv_mode *tv_mode = intel_tv_mode_find(connector->state);
|
||||
int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
|
||||
|
||||
if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return MODE_NO_DBLESCAN;
|
||||
|
||||
if (mode->clock > max_dotclk)
|
||||
return MODE_CLOCK_HIGH;
|
||||
|
||||
|
@ -877,16 +880,21 @@ intel_tv_compute_config(struct intel_encoder *encoder,
|
|||
struct drm_connector_state *conn_state)
|
||||
{
|
||||
const struct tv_mode *tv_mode = intel_tv_mode_find(conn_state);
|
||||
struct drm_display_mode *adjusted_mode =
|
||||
&pipe_config->base.adjusted_mode;
|
||||
|
||||
if (!tv_mode)
|
||||
return false;
|
||||
|
||||
pipe_config->base.adjusted_mode.crtc_clock = tv_mode->clock;
|
||||
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
|
||||
return false;
|
||||
|
||||
adjusted_mode->crtc_clock = tv_mode->clock;
|
||||
DRM_DEBUG_KMS("forcing bpc to 8 for TV\n");
|
||||
pipe_config->pipe_bpp = 8*3;
|
||||
|
||||
/* TV has it's own notion of sync and other mode flags, so clear them. */
|
||||
pipe_config->base.adjusted_mode.flags = 0;
|
||||
adjusted_mode->flags = 0;
|
||||
|
||||
/*
|
||||
* FIXME: We don't check whether the input mode is actually what we want
|
||||
|
|
Loading…
Reference in a new issue