mmc: tmio_mmc: implement SDIO IRQ support
This patch implements SDIO IRQ support for mfds which announce the TMIO_MMC_SDIO_IRQ flag for tmio_mmc. If MMC_CAP_SDIO_IRQ is also set SDIO IRQ signalling is activated. Tested with a b43-based wireless SDIO card and sh_mobile_sdhi. Signed-off-by: Arnd Hannemann <arnd@arndnet.de> Signed-off-by: Chris Ball <cjb@laptop.org>
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@ -53,6 +53,8 @@
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#define CTL_SD_ERROR_DETAIL_STATUS 0x2c
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#define CTL_SD_DATA_PORT 0x30
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#define CTL_TRANSACTION_CTL 0x34
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#define CTL_SDIO_STATUS 0x36
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#define CTL_SDIO_IRQ_MASK 0x38
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#define CTL_RESET_SD 0xe0
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#define CTL_SDIO_REGS 0x100
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#define CTL_CLK_AND_WAIT_CTL 0x138
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@ -81,6 +83,12 @@
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#define TMIO_STAT_CMD_BUSY 0x40000000
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#define TMIO_STAT_ILL_ACCESS 0x80000000
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/* Definitions for values the CTRL_SDIO_STATUS register can take. */
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#define TMIO_SDIO_STAT_IOIRQ 0x0001
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#define TMIO_SDIO_STAT_EXPUB52 0x4000
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#define TMIO_SDIO_STAT_EXWT 0x8000
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#define TMIO_SDIO_MASK_ALL 0xc007
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/* Define some IRQ masks */
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/* This is the mask used at reset by the chip */
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#define TMIO_MASK_ALL 0x837f031d
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@ -122,6 +130,7 @@ struct tmio_mmc_host {
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struct mmc_data *data;
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struct mmc_host *mmc;
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int irq;
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unsigned int sdio_irq_enabled;
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/* Callbacks for clock / power control */
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void (*set_pwr)(struct platform_device *host, int state);
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@ -249,6 +258,22 @@ void pr_debug_status(u32 status)
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#define pr_debug_status(s) do { } while (0)
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#endif
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static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
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{
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struct tmio_mmc_host *host = mmc_priv(mmc);
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if (enable) {
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host->sdio_irq_enabled = 1;
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sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
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sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK,
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(TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ));
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} else {
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sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, TMIO_SDIO_MASK_ALL);
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sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
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host->sdio_irq_enabled = 0;
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}
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}
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static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
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{
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u32 clk = 0, clock;
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@ -268,8 +293,23 @@ static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
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static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
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{
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struct mfd_cell *cell = host->pdev->dev.platform_data;
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struct tmio_mmc_data *pdata = cell->driver_data;
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/*
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* Testing on sh-mobile showed that SDIO IRQs are unmasked when
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* CTL_CLK_AND_WAIT_CTL gets written, so we have to disable the
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* device IRQ here and restore the SDIO IRQ mask before
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* re-enabling the device IRQ.
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*/
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if (pdata->flags & TMIO_MMC_SDIO_IRQ)
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disable_irq(host->irq);
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sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
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msleep(10);
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if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
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tmio_mmc_enable_sdio_irq(host->mmc, host->sdio_irq_enabled);
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enable_irq(host->irq);
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}
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sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
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sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
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msleep(10);
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@ -277,11 +317,21 @@ static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
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static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
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{
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struct mfd_cell *cell = host->pdev->dev.platform_data;
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struct tmio_mmc_data *pdata = cell->driver_data;
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sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
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sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
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msleep(10);
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/* see comment in tmio_mmc_clk_stop above */
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if (pdata->flags & TMIO_MMC_SDIO_IRQ)
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disable_irq(host->irq);
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sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
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msleep(10);
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if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
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tmio_mmc_enable_sdio_irq(host->mmc, host->sdio_irq_enabled);
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enable_irq(host->irq);
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}
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}
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static void reset(struct tmio_mmc_host *host)
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@ -554,7 +604,10 @@ static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
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static irqreturn_t tmio_mmc_irq(int irq, void *devid)
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{
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struct tmio_mmc_host *host = devid;
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struct mfd_cell *cell = host->pdev->dev.platform_data;
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struct tmio_mmc_data *pdata = cell->driver_data;
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unsigned int ireg, irq_mask, status;
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unsigned int sdio_ireg, sdio_irq_mask, sdio_status;
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pr_debug("MMC IRQ begin\n");
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@ -562,6 +615,29 @@ static irqreturn_t tmio_mmc_irq(int irq, void *devid)
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irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
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ireg = status & TMIO_MASK_IRQ & ~irq_mask;
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sdio_ireg = 0;
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if (!ireg && pdata->flags & TMIO_MMC_SDIO_IRQ) {
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sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
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sdio_irq_mask = sd_ctrl_read16(host, CTL_SDIO_IRQ_MASK);
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sdio_ireg = sdio_status & TMIO_SDIO_MASK_ALL & ~sdio_irq_mask;
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sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status & ~TMIO_SDIO_MASK_ALL);
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if (sdio_ireg && !host->sdio_irq_enabled) {
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pr_warning("tmio_mmc: Spurious SDIO IRQ, disabling! 0x%04x 0x%04x 0x%04x\n",
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sdio_status, sdio_irq_mask, sdio_ireg);
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tmio_mmc_enable_sdio_irq(host->mmc, 0);
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goto out;
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}
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if (host->mmc->caps & MMC_CAP_SDIO_IRQ &&
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sdio_ireg & TMIO_SDIO_STAT_IOIRQ)
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mmc_signal_sdio_irq(host->mmc);
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if (sdio_ireg)
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goto out;
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}
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pr_debug_status(status);
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pr_debug_status(ireg);
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@ -1047,6 +1123,7 @@ static const struct mmc_host_ops tmio_mmc_ops = {
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.set_ios = tmio_mmc_set_ios,
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.get_ro = tmio_mmc_get_ro,
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.get_cd = tmio_mmc_get_cd,
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.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
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};
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#ifdef CONFIG_PM
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@ -1162,6 +1239,8 @@ static int __devinit tmio_mmc_probe(struct platform_device *dev)
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goto cell_disable;
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disable_mmc_irqs(host, TMIO_MASK_ALL);
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if (pdata->flags & TMIO_MMC_SDIO_IRQ)
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tmio_mmc_enable_sdio_irq(mmc, 0);
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ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
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IRQF_TRIGGER_FALLING, dev_name(&dev->dev), host);
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@ -57,6 +57,10 @@
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* is configured in 4-bit mode.
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*/
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#define TMIO_MMC_BLKSZ_2BYTES (1 << 1)
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/*
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* Some controllers can support SDIO IRQ signalling.
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*/
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#define TMIO_MMC_SDIO_IRQ (1 << 2)
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int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
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int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
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