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MLK-20275:VPU Encoder:set proper rpc size 

boot-region: 2M per core
rpc-buf-size: 512K per core
print-buf-size: 512K per core

Signed-off-by: ming_qian <ming.qian@nxp.com>
pull/10/head
ming_qian 2018-11-08 13:41:36 +08:00
parent 47e078c3eb
commit 846e41c2e7
5 changed files with 22 additions and 22 deletions
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10
arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi
View File

@ -113,7 +113,7 @@
};
encoder_boot: encoder_boot@0x86000000 {
no-map;
reg = <0 0x86000000 0 0x2000000>;
reg = <0 0x86000000 0 0x200000>;
};
rpmsg_reserved: rpmsg@0x90000000 {
no-map;
@ -125,7 +125,7 @@
};
encoder_rpc: encoder_rpc@0x91400000 {
no-map;
reg = <0 0x91400000 0 0x1000000>;
reg = <0 0x91400000 0 0x100000>;
};
dsp_reserved: dsp@0x92400000 {
no-map;
@ -3347,9 +3347,9 @@
compatible = "nxp,imx8qm-b0-vpuenc", "nxp,imx8qxp-b0-vpuenc";
boot-region = <&encoder_boot>;
rpc-region = <&encoder_rpc>;
fw-buf-size = <0x1000000>;
rpc-buf-size = <0x500000>;
print-buf-size = <0x300000>;
fw-buf-size = <0x200000>;
rpc-buf-size = <0x80000>;
print-buf-size = <0x80000>;
reg = <0x0 0x2d000000 0x0 0x1000000>;
reg-names = "vpu_regs";
power-domains = <&pd_vpu_enc>;

10
arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu-dpu1.dts
View File

@ -99,7 +99,7 @@
};
encoder_boot: encoder_boot@0x86000000 {
no-map;
reg = <0 0x86000000 0 0x2000000>;
reg = <0 0x86000000 0 0x400000>;
};
/*
* CM40 rpmsg memory is still for Dom0, the domu.cfg
@ -116,7 +116,7 @@
};
encoder_rpc: encoder_rpc@0x91400000 {
no-map;
reg = <0 0x91400000 0 0x1000000>;
reg = <0 0x91400000 0 0x200000>;
};
decoder_str: str@0x94400000 {
@ -234,9 +234,9 @@
compatible = "nxp,imx8qm-b0-vpuenc", "nxp,imx8qxp-b0-vpuenc";
boot-region = <&encoder_boot>;
rpc-region = <&encoder_rpc>;
fw-buf-size = <0x1000000 0x1000000>;
rpc-buf-size = <0x500000 0x500000>;
print-buf-size = <0x300000 0x300000>;
fw-buf-size = <0x200000 0x200000>;
rpc-buf-size = <0x80000 0x80000>;
print-buf-size = <0x80000 0x80000>;
reg = <0x0 0x2d000000 0x0 0x1000000>;
reg-names = "vpu_regs";
power-domains = <&pd_vpu_enc>;

10
arch/arm64/boot/dts/freescale/fsl-imx8qm-mek-domu.dts
View File

@ -99,7 +99,7 @@
};
encoder_boot: encoder_boot@0x86000000 {
no-map;
reg = <0 0x86000000 0 0x2000000>;
reg = <0 0x86000000 0 0x400000>;
};
/*
* CM40 rpmsg memory is still for Dom0, the domu.cfg
@ -116,7 +116,7 @@
};
encoder_rpc: encoder_rpc@0x91400000 {
no-map;
reg = <0 0x91400000 0 0x1000000>;
reg = <0 0x91400000 0 0x200000>;
};
dsp_reserved: dsp@0x92400000 {
@ -286,9 +286,9 @@
compatible = "nxp,imx8qm-b0-vpuenc", "nxp,imx8qxp-b0-vpuenc";
boot-region = <&encoder_boot>;
rpc-region = <&encoder_rpc>;
fw-buf-size = <0x1000000 0x1000000>;
rpc-buf-size = <0x500000 0x500000>;
print-buf-size = <0x300000 0x300000>;
fw-buf-size = <0x200000 0x200000>;
rpc-buf-size = <0x80000 0x80000>;
print-buf-size = <0x80000 0x80000>;
reg = <0x0 0x2d000000 0x0 0x1000000>;
reg-names = "vpu_regs";
power-domains = <&pd_vpu_enc>;

10
arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi
View File

@ -90,7 +90,7 @@
};
encoder_boot: encoder_boot@0x86000000 {
no-map;
reg = <0 0x86000000 0 0x2000000>;
reg = <0 0x86000000 0 0x400000>;
};
rpmsg_reserved: rpmsg@0x90000000 {
no-map;
@ -103,7 +103,7 @@
};
encoder_rpc: encoder_rpc@0x91400000 {
no-map;
reg = <0 0x91400000 0 0x1000000>;
reg = <0 0x91400000 0 0x200000>;
};
dsp_reserved: dsp@0x92400000 {
no-map;
@ -197,9 +197,9 @@
compatible = "nxp,imx8qm-b0-vpuenc", "nxp,imx8qxp-b0-vpuenc";
boot-region = <&encoder_boot>;
rpc-region = <&encoder_rpc>;
fw-buf-size = <0x1000000 0x1000000>;
rpc-buf-size = <0x500000 0x500000>;
print-buf-size = <0x300000 0x300000>;
fw-buf-size = <0x200000 0x200000>;
rpc-buf-size = <0x80000 0x80000>;
print-buf-size = <0x80000 0x80000>;
reg = <0x0 0x2d000000 0x0 0x1000000>;
reg-names = "vpu_regs";
power-domains = <&pd_vpu_enc>;

4
drivers/mxc/vpu-encoder-b0/vpu_encoder_b0.h
View File

@ -52,9 +52,9 @@ extern unsigned int vpu_dbg_level_encoder;
#define M0_BOOT_SIZE_DEFAULT 0x1000000
#define M0_BOOT_SIZE_MIN 0x100000
#define RPC_SIZE_DEFAULT 0x100000
#define RPC_SIZE_MIN 0x100000
#define RPC_SIZE_MIN 0x20000
#define PRINT_SIZE_DEFAULT 0x200000
#define PRINT_SIZE_MIN 0x200000
#define PRINT_SIZE_MIN 0x20000
#define MEM_SIZE 0x2800000
#define YUV_SIZE 0x4000000
#define STREAM_SIZE 0x300000