avr32: pm_standby low-power ram bug fix
The value stored into the SDRAMC LPR register should be the current value of the register with the Self-refresh value set in the lower bit field. The bug involved only the Self-refresh value being written to the register, thus over writing any low-power ram settings. Signed-off-by: Humphrey Bucknell <hbucknell@saitek.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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@ -134,7 +134,7 @@ pm_standby:
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mov r11, SDRAMC_LPR_LPCB_SELF_RFR
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bfins r10, r11, 0, 2 /* LPCB <- self Refresh */
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sync 0 /* flush write buffer */
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st.w r12[SDRAMC_LPR], r11 /* put SDRAM in self-refresh mode */
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st.w r12[SDRAMC_LPR], r10 /* put SDRAM in self-refresh mode */
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ld.w r11, r12[SDRAMC_LPR]
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unmask_interrupts
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sleep CPU_SLEEP_FROZEN
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