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avr32: pm_standby low-power ram bug fix

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The value stored into the SDRAMC LPR register should be the current
value of the register with the Self-refresh value set in the lower bit
field.

The bug involved only the Self-refresh value being written to the
register, thus over writing any low-power ram settings.

Signed-off-by: Humphrey Bucknell <hbucknell@saitek.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
This commit is contained in:
Humphrey Bucknell 2008-08-29 16:27:00 +01:00 committed by Haavard Skinnemoen
parent 9e3f544d79
commit 84c4f2f21a
1 changed files with 1 additions and 1 deletions
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2
arch/avr32/mach-at32ap/pm-at32ap700x.S
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@ -134,7 +134,7 @@ pm_standby:
mov r11, SDRAMC_LPR_LPCB_SELF_RFR
bfins r10, r11, 0, 2 /* LPCB <- self Refresh */
sync 0 /* flush write buffer */
st.w r12[SDRAMC_LPR], r11 /* put SDRAM in self-refresh mode */
st.w r12[SDRAMC_LPR], r10 /* put SDRAM in self-refresh mode */
ld.w r11, r12[SDRAMC_LPR]
unmask_interrupts
sleep CPU_SLEEP_FROZEN