cs5535-gpio: apply CS5536 errata workaround for GPIOs
The AMD Geode CS5536 Companion Device Silicon Revision B1 Specification Update mentions the follow as issue #36: "Atomic write transactions to the atomic GPIO High Bank Feature Bit registers should only affect the bits selected [...]" "after Suspend, an atomic write transaction [...] will clear all non-selected bits of the accessed register." In other words, writing to the high bank for a single GPIO bit will clear every other GPIO bit (but only sometimes after a suspend). The workaround described is obvious and simple; do a read-modify-write. This patch does that, and documents why we're doing it. Signed-off-by: Andres Salomon <dilinger@queued.net> Cc: <stable@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -56,6 +56,18 @@ static struct cs5535_gpio_chip {
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* registers, see include/linux/cs5535.h.
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*/
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static void errata_outl(u32 val, unsigned long addr)
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{
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/*
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* According to the CS5536 errata (#36), after suspend
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* a write to the high bank GPIO register will clear all
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* non-selected bits; the recommended workaround is a
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* read-modify-write operation.
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*/
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val |= inl(addr);
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outl(val, addr);
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}
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static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset,
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unsigned int reg)
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{
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@ -64,7 +76,7 @@ static void __cs5535_gpio_set(struct cs5535_gpio_chip *chip, unsigned offset,
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outl(1 << offset, chip->base + reg);
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else
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/* high bank register */
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outl(1 << (offset - 16), chip->base + 0x80 + reg);
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errata_outl(1 << (offset - 16), chip->base + 0x80 + reg);
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}
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void cs5535_gpio_set(unsigned offset, unsigned int reg)
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@ -86,7 +98,7 @@ static void __cs5535_gpio_clear(struct cs5535_gpio_chip *chip, unsigned offset,
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outl(1 << (offset + 16), chip->base + reg);
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else
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/* high bank register */
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outl(1 << offset, chip->base + 0x80 + reg);
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errata_outl(1 << offset, chip->base + 0x80 + reg);
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}
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void cs5535_gpio_clear(unsigned offset, unsigned int reg)
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