ssb: move ssb_commit_settings and export it
Commiting settings is possible on devices without PCI core (but with CC core). Export it for usage in drivers supporting other cores. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -21,8 +21,6 @@ static u16 ssb_pcie_mdio_read(struct ssb_pcicore *pc, u8 device, u8 address);
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static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
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u8 address, u16 data);
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static void ssb_commit_settings(struct ssb_bus *bus);
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static inline
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u32 pcicore_read32(struct ssb_pcicore *pc, u16 offset)
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{
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@ -659,30 +657,6 @@ static void ssb_pcie_mdio_write(struct ssb_pcicore *pc, u8 device,
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pcicore_write32(pc, mdio_control, 0);
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}
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static void ssb_broadcast_value(struct ssb_device *dev,
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u32 address, u32 data)
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{
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/* This is used for both, PCI and ChipCommon core, so be careful. */
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BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
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BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
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ssb_write32(dev, SSB_PCICORE_BCAST_ADDR, address);
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ssb_read32(dev, SSB_PCICORE_BCAST_ADDR); /* flush */
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ssb_write32(dev, SSB_PCICORE_BCAST_DATA, data);
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ssb_read32(dev, SSB_PCICORE_BCAST_DATA); /* flush */
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}
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static void ssb_commit_settings(struct ssb_bus *bus)
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{
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struct ssb_device *dev;
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dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
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if (WARN_ON(!dev))
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return;
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/* This forces an update of the cached registers. */
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ssb_broadcast_value(dev, 0xFD8, 0);
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}
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int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc,
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struct ssb_device *dev)
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{
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@ -1329,6 +1329,31 @@ error:
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}
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EXPORT_SYMBOL(ssb_bus_powerup);
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static void ssb_broadcast_value(struct ssb_device *dev,
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u32 address, u32 data)
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{
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/* This is used for both, PCI and ChipCommon core, so be careful. */
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BUILD_BUG_ON(SSB_PCICORE_BCAST_ADDR != SSB_CHIPCO_BCAST_ADDR);
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BUILD_BUG_ON(SSB_PCICORE_BCAST_DATA != SSB_CHIPCO_BCAST_DATA);
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ssb_write32(dev, SSB_PCICORE_BCAST_ADDR, address);
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ssb_read32(dev, SSB_PCICORE_BCAST_ADDR); /* flush */
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ssb_write32(dev, SSB_PCICORE_BCAST_DATA, data);
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ssb_read32(dev, SSB_PCICORE_BCAST_DATA); /* flush */
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}
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void ssb_commit_settings(struct ssb_bus *bus)
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{
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struct ssb_device *dev;
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dev = bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev;
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if (WARN_ON(!dev))
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return;
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/* This forces an update of the cached registers. */
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ssb_broadcast_value(dev, 0xFD8, 0);
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}
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EXPORT_SYMBOL(ssb_commit_settings);
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u32 ssb_admatch_base(u32 adm)
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{
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u32 base = 0;
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@ -518,6 +518,7 @@ extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
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* Otherwise static always-on powercontrol will be used. */
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extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
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extern void ssb_commit_settings(struct ssb_bus *bus);
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/* Various helper functions */
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extern u32 ssb_admatch_base(u32 adm);
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