[SCSI] qla2xxx: Rework MSI-X handlers.
Since MSI-X vectors do not require a clearing "handshake" from the system perspective, and the registered handler will not be called more than once for one occurrence of receipt of a vector, there is no requirement to flush the risc register write clearing the interrupt condition in the risc. Also, since the msi-x registered handlers are optimised for a particular vector, it is preferable to handle the one vector received per invocation of the handler. Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com> Signed-off-by: James Bottomley <James.Bottomley@SteelEye.com>
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@ -1679,7 +1679,6 @@ qla24xx_msix_rsp_q(int irq, void *dev_id)
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qla24xx_process_response_queue(ha);
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WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT);
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RD_REG_DWORD_RELAXED(®->hccr);
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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@ -1693,7 +1692,6 @@ qla24xx_msix_default(int irq, void *dev_id)
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struct device_reg_24xx __iomem *reg;
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int status;
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unsigned long flags;
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unsigned long iter;
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uint32_t stat;
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uint32_t hccr;
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uint16_t mb[4];
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@ -1703,7 +1701,7 @@ qla24xx_msix_default(int irq, void *dev_id)
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status = 0;
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spin_lock_irqsave(&ha->hardware_lock, flags);
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for (iter = 50; iter--; ) {
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do {
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stat = RD_REG_DWORD(®->host_status);
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if (stat & HSRX_RISC_PAUSED) {
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if (pci_channel_offline(ha->pdev))
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@ -1748,8 +1746,7 @@ qla24xx_msix_default(int irq, void *dev_id)
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break;
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}
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WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT);
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RD_REG_DWORD_RELAXED(®->hccr);
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}
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} while (0);
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spin_unlock_irqrestore(&ha->hardware_lock, flags);
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if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) &&
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