phy: phy-mtk-tphy: add configurable parameters for slew rate calibrate
There are two parameters, ref_clk and coefficient, for U2 slew rate calibrate which may vary on different SoCs, here allow them to be configurable Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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@ -306,6 +306,8 @@ struct mtk_tphy {
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const struct mtk_phy_pdata *pdata;
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struct mtk_phy_instance **phys;
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int nphys;
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int src_ref_clk; /* MHZ, reference clock for slew rate calibrate */
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int src_coef; /* coefficient for slew rate calibrate */
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};
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static void hs_slew_rate_calibrate(struct mtk_tphy *tphy,
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@ -360,16 +362,17 @@ static void hs_slew_rate_calibrate(struct mtk_tphy *tphy,
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writel(tmp, fmreg + U3P_U2FREQ_FMMONR1);
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if (fm_out) {
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/* ( 1024 / FM_OUT ) x reference clock frequency x 0.028 */
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tmp = U3P_FM_DET_CYCLE_CNT * U3P_REF_CLK * U3P_SLEW_RATE_COEF;
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tmp /= fm_out;
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/* ( 1024 / FM_OUT ) x reference clock frequency x coef */
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tmp = tphy->src_ref_clk * tphy->src_coef;
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tmp = (tmp * U3P_FM_DET_CYCLE_CNT) / fm_out;
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calibration_val = DIV_ROUND_CLOSEST(tmp, U3P_SR_COEF_DIVISOR);
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} else {
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/* if FM detection fail, set default value */
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calibration_val = 4;
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}
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dev_dbg(tphy->dev, "phy:%d, fm_out:%d, calib:%d\n",
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instance->index, fm_out, calibration_val);
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dev_dbg(tphy->dev, "phy:%d, fm_out:%d, calib:%d (clk:%d, coef:%d)\n",
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instance->index, fm_out, calibration_val,
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tphy->src_ref_clk, tphy->src_coef);
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/* set HS slew rate */
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tmp = readl(com + U3P_USBPHYACR5);
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@ -1041,6 +1044,13 @@ static int mtk_tphy_probe(struct platform_device *pdev)
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tphy->u3phya_ref = NULL;
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}
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tphy->src_ref_clk = U3P_REF_CLK;
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tphy->src_coef = U3P_SLEW_RATE_COEF;
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/* update parameters of slew rate calibrate if exist */
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device_property_read_u32(dev, "mediatek,src-ref-clk-mhz",
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&tphy->src_ref_clk);
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device_property_read_u32(dev, "mediatek,src-coef", &tphy->src_coef);
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port = 0;
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for_each_child_of_node(np, child_np) {
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struct mtk_phy_instance *instance;
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