MIPS: JZ4740: use Ingenic SoC UART driver
Remove the serial support from arch/mips/jz4740 & make use of the new Ingenic SoC UART driver. This is done for both regular & early console output. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Cc: Apelete Seketeli <apelete@seketeli.net> Cc: Alexandre Courbot <gnurou@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10160/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -297,7 +297,6 @@ config MACH_INGENIC
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select DMA_NONCOHERENT
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select IRQ_MIPS_CPU
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select ARCH_REQUIRE_GPIOLIB
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select SYS_HAS_EARLY_PRINTK
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select COMMON_CLK
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select GENERIC_IRQ_CHIP
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select BUILTIN_DTB
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@ -43,4 +43,26 @@
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#clock-cells = <1>;
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};
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uart0: serial@10030000 {
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compatible = "ingenic,jz4740-uart";
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reg = <0x10030000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <9>;
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clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
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clock-names = "baud", "module";
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};
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uart1: serial@10031000 {
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compatible = "ingenic,jz4740-uart";
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reg = <0x10031000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <8>;
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clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
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clock-names = "baud", "module";
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};
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};
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@ -4,6 +4,10 @@
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/ {
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compatible = "qi,lb60", "ingenic,jz4740";
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chosen {
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stdout-path = &uart0;
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};
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};
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&ext {
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@ -66,6 +66,7 @@ CONFIG_SERIAL_8250_CONSOLE=y
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# CONFIG_SERIAL_8250_DMA is not set
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CONFIG_SERIAL_8250_NR_UARTS=2
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CONFIG_SERIAL_8250_RUNTIME_UARTS=2
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CONFIG_SERIAL_8250_INGENIC=y
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# CONFIG_HW_RANDOM is not set
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CONFIG_SPI=y
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CONFIG_SPI_GPIO=y
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@ -35,6 +35,4 @@ extern struct platform_device jz4740_wdt_device;
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extern struct platform_device jz4740_pwm_device;
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extern struct platform_device jz4740_dma_device;
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void jz4740_serial_device_register(void);
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#endif
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@ -5,7 +5,7 @@
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# Object file lists.
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obj-y += prom.o time.o reset.o setup.o \
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gpio.o platform.o timer.o serial.o
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gpio.o platform.o timer.o
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CFLAGS_setup.o = -I$(src)/../../../scripts/dtc/libfdt
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@ -482,8 +482,6 @@ static int __init qi_lb60_init_platform_devices(void)
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gpiod_add_lookup_table(&qi_lb60_audio_gpio_table);
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gpiod_add_lookup_table(&qi_lb60_nand_gpio_table);
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jz4740_serial_device_register();
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spi_register_board_info(qi_lb60_spi_board_info,
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ARRAY_SIZE(qi_lb60_spi_board_info));
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@ -30,7 +30,6 @@
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#include <linux/serial_core.h>
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#include <linux/serial_8250.h>
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#include "serial.h"
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#include "clock.h"
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/* OHCI controller */
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@ -280,50 +279,6 @@ struct platform_device jz4740_adc_device = {
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.resource = jz4740_adc_resources,
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};
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/* Serial */
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#define JZ4740_UART_DATA(_id) \
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{ \
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.flags = UPF_SKIP_TEST | UPF_IOREMAP | UPF_FIXED_TYPE, \
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.iotype = UPIO_MEM, \
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.regshift = 2, \
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.serial_out = jz4740_serial_out, \
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.type = PORT_16550, \
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.mapbase = JZ4740_UART ## _id ## _BASE_ADDR, \
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.irq = JZ4740_IRQ_UART ## _id, \
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}
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static struct plat_serial8250_port jz4740_uart_data[] = {
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JZ4740_UART_DATA(0),
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JZ4740_UART_DATA(1),
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{},
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};
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static struct platform_device jz4740_uart_device = {
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.name = "serial8250",
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.id = 0,
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.dev = {
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.platform_data = jz4740_uart_data,
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},
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};
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void jz4740_serial_device_register(void)
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{
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struct plat_serial8250_port *p;
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struct clk *ext_clk;
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unsigned long ext_rate;
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ext_clk = clk_get(NULL, "ext");
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if (IS_ERR(ext_clk))
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panic("unable to get ext clock");
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ext_rate = clk_get_rate(ext_clk);
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clk_put(ext_clk);
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for (p = jz4740_uart_data; p->flags != 0; ++p)
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p->uartclk = ext_rate;
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platform_device_register(&jz4740_uart_device);
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}
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/* Watchdog */
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static struct resource jz4740_wdt_resources[] = {
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{
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@ -53,16 +53,3 @@ void __init prom_init(void)
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void __init prom_free_prom_memory(void)
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{
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}
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#define UART_REG(_reg) ((void __iomem *)CKSEG1ADDR(JZ4740_UART0_BASE_ADDR + (_reg << 2)))
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void prom_putchar(char c)
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{
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uint8_t lsr;
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do {
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lsr = readb(UART_REG(UART_LSR));
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} while ((lsr & UART_LSR_TEMT) == 0);
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writeb(c, UART_REG(UART_TX));
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}
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@ -1,33 +0,0 @@
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/*
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* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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* JZ4740 serial support
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/io.h>
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#include <linux/serial_core.h>
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#include <linux/serial_reg.h>
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void jz4740_serial_out(struct uart_port *p, int offset, int value)
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{
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switch (offset) {
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case UART_FCR:
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value |= 0x10; /* Enable uart module */
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break;
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case UART_IER:
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value |= (value & 0x4) << 2;
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break;
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default:
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break;
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}
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writeb(value, p->membase + (offset << p->regshift));
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}
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@ -1,23 +0,0 @@
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/*
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* Copyright (C) 2010, Lars-Peter Clausen <lars@metafoo.de>
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* JZ4740 serial support
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#ifndef __MIPS_JZ4740_SERIAL_H__
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#define __MIPS_JZ4740_SERIAL_H__
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struct uart_port;
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void jz4740_serial_out(struct uart_port *p, int offset, int value);
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#endif
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