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MLK-18649-2 arm64: fsl-imx8dx.dtsi: Add pd_mipi_dsi_0/1_dual_lvds power domains 

When ldb works in dual LVDS channel mode, it consumes two MIPI/LVDS combo
subsystems, one primary and the other auxiliary.  Each subsystem is powered
by it's own power domain.  So, the dual channel mode needs two power domains.
This patch adds pd_mipi_dsi_0/1_dual_lvds power domains support so that
the ldb1/2 nodes may use them to support dual channel mode.  Note that
the pd_mipi_dsi_0/1_aux_lvds are the parent power domains of the
pd_mipi_dsi_0/1_dual_lvds power domains respectively.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
(cherry picked from commit 86c85ca8cf5b81d4e97e54955ea46e50fdb76b9f)
pull/10/head
Liu Ying 2018-06-21 11:38:55 +08:00 committed by Jason Liu
parent 010cf4e808
commit 89283eb55a
1 changed files with 28 additions and 0 deletions
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28
arch/arm64/boot/dts/freescale/fsl-imx8dx.dtsi
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@ -1121,6 +1121,20 @@
power-domains =<&pd_mipi_dsi0>;
};
pd_mipi_dsi_0_aux_lvds: PD_AUX_LVDS0 {
reg = <SC_R_LVDS_0>;
#power-domain-cells = <0>;
power-domains = <&pd_mipi_dsi0>;
#address-cells = <1>;
#size-cells = <0>;
pd_mipi_dsi_1_dual_lvds: PD_DUAL_LVDS1 {
reg = <SC_R_LVDS_1>;
#power-domain-cells = <0>;
power-domains = <&pd_mipi_dsi_0_aux_lvds>;
};
};
pd_mipi_dsi_0_i2c0: PD_MIPI_0_DSI_I2C0 {
reg = <SC_R_MIPI_0_I2C_0>;
#power-domain-cells = <0>;
@ -1151,6 +1165,20 @@
power-domains =<&pd_mipi_dsi1>;
};
pd_mipi_dsi_1_aux_lvds: PD_AUX_LVDS1 {
reg = <SC_R_LVDS_1>;
#power-domain-cells = <0>;
power-domains = <&pd_mipi_dsi1>;
#address-cells = <1>;
#size-cells = <0>;
pd_mipi_dsi_0_dual_lvds: PD_DUAL_LVDS0 {
reg = <SC_R_LVDS_0>;
#power-domain-cells = <0>;
power-domains = <&pd_mipi_dsi_1_aux_lvds>;
};
};
pd_mipi_dsi_1_i2c0: PD_MIPI_1_DSI_I2C0 {
reg = <SC_R_MIPI_1_I2C_0>;
#power-domain-cells = <0>;