[ARM] 4261/1: clockevent support for Versatile platform
Update Versatile platform to use new clockevent infrastructure. Signed-off-by: Kevin Hilman <khilman@mvista.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -167,6 +167,7 @@ config ARCH_VERSATILE
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select ARM_VIC
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select ICST307
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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help
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This enables support for ARM Ltd Versatile board.
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@ -27,6 +27,7 @@
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#include <linux/amba/bus.h>
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#include <linux/amba/clcd.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <asm/cnt32_to_63.h>
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#include <asm/system.h>
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@ -829,19 +830,61 @@ void __init versatile_init(void)
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#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
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#endif
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static void timer_set_mode(enum clock_event_mode mode,
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struct clock_event_device *clk)
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{
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unsigned long ctrl;
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switch(mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD);
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ctrl = TIMER_CTRL_PERIODIC;
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ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE | TIMER_CTRL_ENABLE;
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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/* period set, and timer enabled in 'next_event' hook */
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ctrl = TIMER_CTRL_ONESHOT;
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ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE;
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break;
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case CLOCK_EVT_MODE_UNUSED:
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case CLOCK_EVT_MODE_SHUTDOWN:
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default:
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ctrl = 0;
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}
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writel(ctrl, TIMER0_VA_BASE + TIMER_CTRL);
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}
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static int timer_set_next_event(unsigned long evt,
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struct clock_event_device *unused)
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{
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unsigned long ctrl = readl(TIMER0_VA_BASE + TIMER_CTRL);
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writel(evt, TIMER0_VA_BASE + TIMER_LOAD);
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writel(ctrl | TIMER_CTRL_ENABLE, TIMER0_VA_BASE + TIMER_CTRL);
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return 0;
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}
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static struct clock_event_device timer0_clockevent = {
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.name = "timer0",
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.shift = 32,
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = timer_set_mode,
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.set_next_event = timer_set_next_event,
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};
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t versatile_timer_interrupt(int irq, void *dev_id)
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{
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write_seqlock(&xtime_lock);
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struct clock_event_device *evt = &timer0_clockevent;
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// ...clear the interrupt
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writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
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timer_tick();
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write_sequnlock(&xtime_lock);
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evt->event_handler(evt);
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return IRQ_HANDLED;
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}
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@ -909,17 +952,22 @@ static void __init versatile_timer_init(void)
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writel(0, TIMER2_VA_BASE + TIMER_CTRL);
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writel(0, TIMER3_VA_BASE + TIMER_CTRL);
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writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD);
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writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_VALUE);
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writel(TIMER_DIVISOR | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC |
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TIMER_CTRL_IE, TIMER0_VA_BASE + TIMER_CTRL);
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/*
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* Make irqs happen for the system timer
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*/
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setup_irq(IRQ_TIMERINT0_1, &versatile_timer_irq);
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versatile_clocksource_init();
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timer0_clockevent.mult =
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div_sc(1000000, NSEC_PER_SEC, timer0_clockevent.shift);
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timer0_clockevent.max_delta_ns =
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clockevent_delta2ns(0xffffffff, &timer0_clockevent);
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timer0_clockevent.min_delta_ns =
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clockevent_delta2ns(0xf, &timer0_clockevent);
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timer0_clockevent.cpumask = cpumask_of_cpu(0);
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clockevents_register_device(&timer0_clockevent);
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}
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struct sys_timer versatile_timer = {
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