powerpc/booke64: Use SPRG0/3 scratch for bolted TLB miss & crit int
Embedded.Hypervisor category defines GSPRG0..3 physical registers for guests. Avoid SPRG4-7 usage as scratch in host exception handlers, otherwise guest SPRG4-7 registers will be clobbered. For bolted TLB miss exception handlers, which is the version currently supported by KVM, use SPRN_SPRG_GEN_SCRATCH aka SPRG0 instead of SPRN_SPRG_TLB_SCRATCH aka SPRG6. Keep using TLB PACA slots to fit in one 64-byte cache line. For critical exception handlers use SPRG3 instead of SPRG7. Provide a routine to store and restore user-visible SPRGs. This will be subsequently used to restore VDSO information in SPRG3. Add EX_R13 to paca slots to free up SPRG3 and change the critical exception epilog to use it. Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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@ -46,8 +46,9 @@
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#define EX_CR (1 * 8)
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#define EX_R10 (2 * 8)
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#define EX_R11 (3 * 8)
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#define EX_R14 (4 * 8)
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#define EX_R15 (5 * 8)
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#define EX_R13 (4 * 8)
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#define EX_R14 (5 * 8)
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#define EX_R15 (6 * 8)
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/*
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* The TLB miss exception uses different slots.
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@ -761,7 +761,8 @@
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* 64-bit embedded
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* - SPRG0 generic exception scratch
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* - SPRG2 TLB exception stack
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* - SPRG3 CPU and NUMA node for VDSO getcpu (user visible)
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* - SPRG3 critical exception scratch and
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* CPU and NUMA node for VDSO getcpu (user visible)
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* - SPRG4 unused (user visible)
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* - SPRG6 TLB miss scratch (user visible, sorry !)
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* - SPRG7 critical exception scratch
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@ -858,7 +859,7 @@
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#ifdef CONFIG_PPC_BOOK3E_64
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#define SPRN_SPRG_MC_SCRATCH SPRN_SPRG8
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#define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG7
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#define SPRN_SPRG_CRIT_SCRATCH SPRN_SPRG3
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#define SPRN_SPRG_DBG_SCRATCH SPRN_SPRG9
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#define SPRN_SPRG_TLB_EXFRAME SPRN_SPRG2
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#define SPRN_SPRG_TLB_SCRATCH SPRN_SPRG6
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@ -42,6 +42,7 @@
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mfspr r13,SPRN_SPRG_PACA; /* get PACA */ \
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std r10,PACA_EX##type+EX_R10(r13); \
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std r11,PACA_EX##type+EX_R11(r13); \
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PROLOG_STORE_RESTORE_SCRATCH_##type; \
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mfcr r10; /* save CR */ \
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mfspr r11,SPRN_##type##_SRR1;/* what are we coming from */ \
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DO_KVM intnum,SPRN_##type##_SRR1; /* KVM hook */ \
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@ -99,6 +100,18 @@
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#define GDBELL_EXCEPTION_PROLOG(n, intnum, addition) \
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EXCEPTION_PROLOG(n, intnum, GDBELL, addition##_GDBELL(n))
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/*
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* Store user-visible scratch in PACA exception slots and restore proper value
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*/
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#define PROLOG_STORE_RESTORE_SCRATCH_GEN
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#define PROLOG_STORE_RESTORE_SCRATCH_GDBELL
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#define PROLOG_STORE_RESTORE_SCRATCH_DBG
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#define PROLOG_STORE_RESTORE_SCRATCH_MC
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#define PROLOG_STORE_RESTORE_SCRATCH_CRIT \
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mfspr r10,SPRN_SPRG_CRIT_SCRATCH; /* get r13 */ \
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std r10,PACA_EXCRIT+EX_R13(r13)
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/* Variants of the "addition" argument for the prolog
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*/
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#define PROLOG_ADDITION_NONE_GEN(n)
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@ -454,7 +467,7 @@ interrupt_end_book3e:
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mtcr r10
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ld r10,PACA_EXCRIT+EX_R10(r13) /* restore registers */
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ld r11,PACA_EXCRIT+EX_R11(r13)
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mfspr r13,SPRN_SPRG_CRIT_SCRATCH
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ld r13,PACA_EXCRIT+EX_R13(r13)
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rfci
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/* Normal debug exception */
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@ -467,7 +480,7 @@ interrupt_end_book3e:
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/* Now we mash up things to make it look like we are coming on a
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* normal exception
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*/
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mfspr r15,SPRN_SPRG_CRIT_SCRATCH
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ld r15,PACA_EXCRIT+EX_R13(r13)
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mtspr SPRN_SPRG_GEN_SCRATCH,r15
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mfspr r14,SPRN_DBSR
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EXCEPTION_COMMON(0xd00, PACA_EXCRIT, INTS_DISABLE)
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@ -40,7 +40,7 @@
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**********************************************************************/
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.macro tlb_prolog_bolted intnum addr
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mtspr SPRN_SPRG_TLB_SCRATCH,r13
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mtspr SPRN_SPRG_GEN_SCRATCH,r13
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mfspr r13,SPRN_SPRG_PACA
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std r10,PACA_EXTLB+EX_TLB_R10(r13)
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mfcr r10
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@ -69,7 +69,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
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ld r15,PACA_EXTLB+EX_TLB_R15(r13)
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TLB_MISS_RESTORE_STATS_BOLTED
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ld r16,PACA_EXTLB+EX_TLB_R16(r13)
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mfspr r13,SPRN_SPRG_TLB_SCRATCH
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mfspr r13,SPRN_SPRG_GEN_SCRATCH
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.endm
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/* Data TLB miss */
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