PCI: cleanup Function Level Reset
This patch enhances the FLR functions: 1) remove disable_irq() so the shared IRQ won't be disabled. 2) replace the 1s wait with 100, 200 and 400ms wait intervals for the Pending Transaction. 3) replace mdelay() with msleep(). 4) add might_sleep(). 5) lock the device to prevent PM suspend from accessing the CSRs during the reset. 6) coding style fixes. Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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c465def6bf
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8c1c699fec
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@ -110,7 +110,7 @@ static int virtfn_add(struct pci_dev *dev, int id, int reset)
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}
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if (reset)
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pci_execute_reset_function(virtfn);
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__pci_reset_function(virtfn);
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pci_device_add(virtfn, virtfn->bus);
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mutex_unlock(&iov->dev->sriov->lock);
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@ -164,7 +164,7 @@ static void virtfn_remove(struct pci_dev *dev, int id, int reset)
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if (reset) {
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device_release_driver(&virtfn->dev);
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pci_execute_reset_function(virtfn);
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__pci_reset_function(virtfn);
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}
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sprintf(buf, "virtfn%u", id);
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@ -2055,111 +2055,112 @@ int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask)
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EXPORT_SYMBOL(pci_set_dma_seg_boundary);
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#endif
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static int __pcie_flr(struct pci_dev *dev, int probe)
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static int pcie_flr(struct pci_dev *dev, int probe)
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{
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u16 status;
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int i;
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int pos;
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u32 cap;
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int exppos = pci_find_capability(dev, PCI_CAP_ID_EXP);
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u16 status;
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if (!exppos)
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pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
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if (!pos)
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return -ENOTTY;
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pci_read_config_dword(dev, exppos + PCI_EXP_DEVCAP, &cap);
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pci_read_config_dword(dev, pos + PCI_EXP_DEVCAP, &cap);
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if (!(cap & PCI_EXP_DEVCAP_FLR))
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return -ENOTTY;
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if (probe)
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return 0;
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pci_block_user_cfg_access(dev);
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/* Wait for Transaction Pending bit clean */
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pci_read_config_word(dev, exppos + PCI_EXP_DEVSTA, &status);
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if (!(status & PCI_EXP_DEVSTA_TRPND))
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goto transaction_done;
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for (i = 0; i < 4; i++) {
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if (i)
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msleep((1 << (i - 1)) * 100);
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msleep(100);
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pci_read_config_word(dev, exppos + PCI_EXP_DEVSTA, &status);
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if (!(status & PCI_EXP_DEVSTA_TRPND))
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goto transaction_done;
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pci_read_config_word(dev, pos + PCI_EXP_DEVSTA, &status);
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if (!(status & PCI_EXP_DEVSTA_TRPND))
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goto clear;
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}
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dev_info(&dev->dev, "Busy after 100ms while trying to reset; "
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"sleeping for 1 second\n");
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ssleep(1);
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pci_read_config_word(dev, exppos + PCI_EXP_DEVSTA, &status);
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if (status & PCI_EXP_DEVSTA_TRPND)
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dev_info(&dev->dev, "Still busy after 1s; "
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"proceeding with reset anyway\n");
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dev_err(&dev->dev, "transaction is not cleared; "
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"proceeding with reset anyway\n");
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transaction_done:
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pci_write_config_word(dev, exppos + PCI_EXP_DEVCTL,
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clear:
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pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
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PCI_EXP_DEVCTL_BCR_FLR);
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mdelay(100);
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msleep(100);
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pci_unblock_user_cfg_access(dev);
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return 0;
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}
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static int __pci_af_flr(struct pci_dev *dev, int probe)
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static int pci_af_flr(struct pci_dev *dev, int probe)
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{
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int cappos = pci_find_capability(dev, PCI_CAP_ID_AF);
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u8 status;
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int i;
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int pos;
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u8 cap;
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u8 status;
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if (!cappos)
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pos = pci_find_capability(dev, PCI_CAP_ID_AF);
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if (!pos)
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return -ENOTTY;
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pci_read_config_byte(dev, cappos + PCI_AF_CAP, &cap);
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pci_read_config_byte(dev, pos + PCI_AF_CAP, &cap);
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if (!(cap & PCI_AF_CAP_TP) || !(cap & PCI_AF_CAP_FLR))
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return -ENOTTY;
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if (probe)
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return 0;
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pci_block_user_cfg_access(dev);
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/* Wait for Transaction Pending bit clean */
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pci_read_config_byte(dev, cappos + PCI_AF_STATUS, &status);
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if (!(status & PCI_AF_STATUS_TP))
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goto transaction_done;
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for (i = 0; i < 4; i++) {
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if (i)
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msleep((1 << (i - 1)) * 100);
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pci_read_config_byte(dev, pos + PCI_AF_STATUS, &status);
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if (!(status & PCI_AF_STATUS_TP))
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goto clear;
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}
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dev_err(&dev->dev, "transaction is not cleared; "
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"proceeding with reset anyway\n");
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clear:
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pci_write_config_byte(dev, pos + PCI_AF_CTRL, PCI_AF_CTRL_FLR);
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msleep(100);
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pci_read_config_byte(dev, cappos + PCI_AF_STATUS, &status);
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if (!(status & PCI_AF_STATUS_TP))
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goto transaction_done;
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dev_info(&dev->dev, "Busy after 100ms while trying to"
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" reset; sleeping for 1 second\n");
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ssleep(1);
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pci_read_config_byte(dev, cappos + PCI_AF_STATUS, &status);
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if (status & PCI_AF_STATUS_TP)
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dev_info(&dev->dev, "Still busy after 1s; "
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"proceeding with reset anyway\n");
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transaction_done:
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pci_write_config_byte(dev, cappos + PCI_AF_CTRL, PCI_AF_CTRL_FLR);
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mdelay(100);
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pci_unblock_user_cfg_access(dev);
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return 0;
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}
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static int __pci_reset_function(struct pci_dev *pdev, int probe)
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static int pci_dev_reset(struct pci_dev *dev, int probe)
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{
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int res;
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int rc;
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res = __pcie_flr(pdev, probe);
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if (res != -ENOTTY)
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return res;
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might_sleep();
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res = __pci_af_flr(pdev, probe);
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if (res != -ENOTTY)
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return res;
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if (!probe) {
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pci_block_user_cfg_access(dev);
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/* block PM suspend, driver probe, etc. */
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down(&dev->dev.sem);
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}
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return res;
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rc = pcie_flr(dev, probe);
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if (rc != -ENOTTY)
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goto done;
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rc = pci_af_flr(dev, probe);
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done:
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if (!probe) {
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up(&dev->dev.sem);
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pci_unblock_user_cfg_access(dev);
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}
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return rc;
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}
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/**
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* pci_execute_reset_function() - Reset a PCI device function
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* @dev: Device function to reset
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* __pci_reset_function - reset a PCI device function
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* @dev: PCI device to reset
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*
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* Some devices allow an individual function to be reset without affecting
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* other functions in the same device. The PCI device must be responsive
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@ -2171,18 +2172,18 @@ static int __pci_reset_function(struct pci_dev *pdev, int probe)
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* device including MSI, bus mastering, BARs, decoding IO and memory spaces,
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* etc.
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*
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* Returns 0 if the device function was successfully reset or -ENOTTY if the
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* Returns 0 if the device function was successfully reset or negative if the
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* device doesn't support resetting a single function.
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*/
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int pci_execute_reset_function(struct pci_dev *dev)
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int __pci_reset_function(struct pci_dev *dev)
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{
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return __pci_reset_function(dev, 0);
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return pci_dev_reset(dev, 0);
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}
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EXPORT_SYMBOL_GPL(pci_execute_reset_function);
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EXPORT_SYMBOL_GPL(__pci_reset_function);
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/**
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* pci_reset_function() - quiesce and reset a PCI device function
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* @dev: Device function to reset
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* pci_reset_function - quiesce and reset a PCI device function
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* @dev: PCI device to reset
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*
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* Some devices allow an individual function to be reset without affecting
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* other functions in the same device. The PCI device must be responsive
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@ -2190,32 +2191,33 @@ EXPORT_SYMBOL_GPL(pci_execute_reset_function);
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*
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* This function does not just reset the PCI portion of a device, but
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* clears all the state associated with the device. This function differs
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* from pci_execute_reset_function in that it saves and restores device state
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* from __pci_reset_function in that it saves and restores device state
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* over the reset.
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*
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* Returns 0 if the device function was successfully reset or -ENOTTY if the
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* Returns 0 if the device function was successfully reset or negative if the
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* device doesn't support resetting a single function.
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*/
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int pci_reset_function(struct pci_dev *dev)
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{
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int r = __pci_reset_function(dev, 1);
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int rc;
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if (r < 0)
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return r;
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rc = pci_dev_reset(dev, 1);
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if (rc)
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return rc;
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if (!dev->msi_enabled && !dev->msix_enabled && dev->irq != 0)
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disable_irq(dev->irq);
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pci_save_state(dev);
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/*
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* both INTx and MSI are disabled after the Interrupt Disable bit
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* is set and the Bus Master bit is cleared.
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*/
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pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
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r = pci_execute_reset_function(dev);
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rc = pci_dev_reset(dev, 0);
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pci_restore_state(dev);
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if (!dev->msi_enabled && !dev->msix_enabled && dev->irq != 0)
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enable_irq(dev->irq);
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return r;
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return rc;
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}
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EXPORT_SYMBOL_GPL(pci_reset_function);
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@ -702,8 +702,8 @@ int pcix_get_mmrbc(struct pci_dev *dev);
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int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
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int pcie_get_readrq(struct pci_dev *dev);
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int pcie_set_readrq(struct pci_dev *dev, int rq);
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int __pci_reset_function(struct pci_dev *dev);
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int pci_reset_function(struct pci_dev *dev);
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int pci_execute_reset_function(struct pci_dev *dev);
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void pci_update_resource(struct pci_dev *dev, int resno);
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int __must_check pci_assign_resource(struct pci_dev *dev, int i);
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int pci_select_bars(struct pci_dev *dev, unsigned long flags);
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