Staging: r8187se: Remove two private variables that have a fixed value
For the RTL8187SE, the variable priv->rf_chip is always RF_ZEBRA4 and priv->RegThreeWireMode is always HW_THREE_WIRE_SI. Remove these 2 variables. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Larry Finger
Greg Kroah-Hartman
parent
b1b7621b08
commit
8daba6b94d
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@ -366,7 +366,6 @@ typedef struct r8180_priv
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short diversity;
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short diversity;
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u8 cs_treshold;
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u8 cs_treshold;
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short rcr_csense;
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short rcr_csense;
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short rf_chip;
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u32 key0[4];
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u32 key0[4];
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short (*rf_set_sens)(struct net_device *dev,short sens);
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short (*rf_set_sens)(struct net_device *dev,short sens);
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void (*rf_set_chan)(struct net_device *dev,short ch);
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void (*rf_set_chan)(struct net_device *dev,short ch);
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@ -479,9 +478,6 @@ typedef struct r8180_priv
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u8 retry_rts;
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u8 retry_rts;
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u16 rts;
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u16 rts;
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//add for RF power on power off by lizhaoming 080512
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u8 RegThreeWireMode; // See "Three wire mode" defined above, 2006.05.31, by rcnjko.
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//by amy for led
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//by amy for led
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LED_STRATEGY_8185 LedStrategy;
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LED_STRATEGY_8185 LedStrategy;
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//by amy for led
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//by amy for led
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@ -663,11 +663,8 @@ unsigned char STRENGTH_MAP[] = {
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void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
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void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
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{
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{
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struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
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u32 temp;
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u32 temp;
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u32 temp2;
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u32 temp2;
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u32 temp3;
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u32 lsb;
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u32 q;
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u32 q;
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u32 orig_qual;
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u32 orig_qual;
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u8 _rssi;
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u8 _rssi;
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@ -689,88 +686,6 @@ void rtl8180_RSSI_calc(struct net_device *dev, u8 *rssi, u8 *qual)
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*qual = temp;
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*qual = temp;
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temp2 = *rssi;
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temp2 = *rssi;
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switch(priv->rf_chip){
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case RFCHIPID_RFMD:
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lsb = temp2 & 1;
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temp2 &= 0x7e;
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if ( !lsb || !(temp2 <= 0x3c) ) {
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temp2 = 0x64;
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} else {
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temp2 = 100 * temp2 / 0x3c;
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}
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*rssi = temp2 & 0xff;
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_rssi = temp2 & 0xff;
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break;
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case RFCHIPID_INTERSIL:
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lsb = temp2;
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temp2 &= 0xfffffffe;
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temp2 *= 251;
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temp3 = temp2;
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temp2 <<= 6;
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temp3 += temp2;
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temp3 <<= 1;
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temp2 = 0x4950df;
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temp2 -= temp3;
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lsb &= 1;
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if ( temp2 <= 0x3e0000 ) {
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if ( temp2 < 0xffef0000 )
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temp2 = 0xffef0000;
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} else {
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temp2 = 0x3e0000;
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}
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if ( !lsb ) {
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temp2 -= 0xf0000;
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} else {
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temp2 += 0xf0000;
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}
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temp3 = 0x4d0000;
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temp3 -= temp2;
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temp3 *= 100;
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temp3 = temp3 / 0x6d;
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temp3 >>= 0x10;
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_rssi = temp3 & 0xff;
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*rssi = temp3 & 0xff;
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break;
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case RFCHIPID_GCT:
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lsb = temp2 & 1;
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temp2 &= 0x7e;
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if ( ! lsb || !(temp2 <= 0x3c) ){
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temp2 = 0x64;
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} else {
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temp2 = (100 * temp2) / 0x3c;
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}
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*rssi = temp2 & 0xff;
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_rssi = temp2 & 0xff;
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break;
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case RFCHIPID_PHILIPS:
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if( orig_qual <= 0x4e ){
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_rssi = STRENGTH_MAP[orig_qual];
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*rssi = _rssi;
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} else {
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orig_qual -= 0x80;
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if ( !orig_qual ){
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_rssi = 1;
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*rssi = 1;
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} else {
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_rssi = 0x32;
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*rssi = 0x32;
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}
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}
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break;
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case RFCHIPID_MAXIM:
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lsb = temp2 & 1;
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temp2 &= 0x7e;
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temp2 >>= 1;
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temp2 += 0x42;
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if( lsb != 0 ){
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temp2 += 0xa;
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}
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*rssi = temp2 & 0xff;
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_rssi = temp2 & 0xff;
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break;
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}
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if ( _rssi < 0x64 ){
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if ( _rssi < 0x64 ){
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if ( _rssi == 0 ) {
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if ( _rssi == 0 ) {
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*rssi = 1;
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*rssi = 1;
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@ -2707,8 +2622,6 @@ short rtl8180_init(struct net_device *dev)
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priv->txbeaconcount = 2;
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priv->txbeaconcount = 2;
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priv->rx_skb_complete = 1;
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priv->rx_skb_complete = 1;
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priv->RegThreeWireMode = HW_THREE_WIRE_SI;
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priv->RFChangeInProgress = false;
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priv->RFChangeInProgress = false;
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priv->SetRFPowerStateInProgress = false;
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priv->SetRFPowerStateInProgress = false;
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priv->RFProgType = 0;
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priv->RFProgType = 0;
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@ -2999,9 +2912,6 @@ short rtl8180_init(struct net_device *dev)
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priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
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priv->cs_treshold = (eeprom_val & 0xff00) >> 8;
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eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val);
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eeprom_93cx6_read(&eeprom, RFCHIPID, &eeprom_val);
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priv->rf_chip = 0xff & eeprom_val;
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priv->rf_chip = RF_ZEBRA4;
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priv->rf_sleep = rtl8225z4_rf_sleep;
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priv->rf_sleep = rtl8225z4_rf_sleep;
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priv->rf_wakeup = rtl8225z4_rf_wakeup;
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priv->rf_wakeup = rtl8225z4_rf_wakeup;
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DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
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DMESGW("**PLEASE** REPORT SUCCESSFUL/UNSUCCESSFUL TO Realtek!");
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@ -282,30 +282,13 @@ DIG_Zebra(
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// Dispatch DIG implementation according to RF.
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// Dispatch DIG implementation according to RF.
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//
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//
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void
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void
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DynamicInitGain(
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DynamicInitGain(struct net_device *dev)
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struct net_device *dev
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)
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{
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{
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struct r8180_priv *priv = ieee80211_priv(dev);
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DIG_Zebra(dev);
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switch(priv->rf_chip)
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{
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case RF_ZEBRA2: // [AnnieWorkaround] For Zebra2, 2005-08-01.
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case RF_ZEBRA4:
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DIG_Zebra( dev );
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break;
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default:
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printk("DynamicInitGain(): unknown RFChipID(%d) !!!\n", priv->rf_chip);
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break;
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}
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}
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}
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void rtl8180_hw_dig_wq (struct work_struct *work)
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void rtl8180_hw_dig_wq (struct work_struct *work)
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{
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{
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// struct r8180_priv *priv = container_of(work, struct r8180_priv, watch_dog_wq);
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// struct ieee80211_device * ieee = (struct ieee80211_device*)
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// container_of(work, struct ieee80211_device, watch_dog_wq);
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struct delayed_work *dwork = to_delayed_work(work);
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struct delayed_work *dwork = to_delayed_work(work);
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struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_dig_wq);
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struct ieee80211_device *ieee = container_of(dwork,struct ieee80211_device,hw_dig_wq);
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struct net_device *dev = ieee->dev;
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struct net_device *dev = ieee->dev;
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@ -1310,44 +1293,24 @@ SetAntenna8185(
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switch(u1bAntennaIndex)
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switch(u1bAntennaIndex)
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{
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{
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case 0:
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case 0:
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switch(priv->rf_chip)
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/* Mac register, main antenna */
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{
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write_nic_byte(dev, ANTSEL, 0x03);
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case RF_ZEBRA2:
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/* base band */
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case RF_ZEBRA4:
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write_phy_cck(dev, 0x11, 0x9b); /* Config CCK RX antenna. */
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// Mac register, main antenna
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write_phy_ofdm(dev, 0x0d, 0x5c); /* Config OFDM RX antenna. */
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write_nic_byte(dev, ANTSEL, 0x03);
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//base band
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write_phy_cck(dev,0x11, 0x9b); // Config CCK RX antenna.
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write_phy_ofdm(dev, 0x0d, 0x5c); // Config OFDM RX antenna.
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bAntennaSwitched = true;
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bAntennaSwitched = true;
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break;
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default:
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printk("SetAntenna8185: unknown RFChipID(%d)\n", priv->rf_chip);
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break;
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}
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break;
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break;
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case 1:
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case 1:
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switch(priv->rf_chip)
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/* Mac register, aux antenna */
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{
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write_nic_byte(dev, ANTSEL, 0x00);
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case RF_ZEBRA2:
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/* base band */
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case RF_ZEBRA4:
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write_phy_cck(dev, 0x11, 0xbb); /* Config CCK RX antenna. */
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// Mac register, aux antenna
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write_phy_ofdm(dev, 0x0d, 0x54); /* Config OFDM RX antenna. */
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write_nic_byte(dev, ANTSEL, 0x00);
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//base band
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write_phy_cck(dev, 0x11, 0xbb); // Config CCK RX antenna.
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write_phy_ofdm(dev, 0x0d, 0x54); // Config OFDM RX antenna.
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bAntennaSwitched = true;
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bAntennaSwitched = true;
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break;
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default:
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printk("SetAntenna8185: unknown RFChipID(%d)\n", priv->rf_chip);
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break;
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}
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break;
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break;
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default:
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default:
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@ -854,134 +854,48 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
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btConfig3 = read_nic_byte(dev, CONFIG3);
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btConfig3 = read_nic_byte(dev, CONFIG3);
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write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En));
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write_nic_byte(dev, CONFIG3, (btConfig3 | CONFIG3_PARM_En));
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switch (priv->rf_chip) {
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switch (eRFPowerState) {
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case RF_ZEBRA2:
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case eRfOn:
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switch (eRFPowerState) {
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write_nic_word(dev, 0x37C, 0x00EC);
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case eRfOn:
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RF_WriteReg(dev,0x4,0x9FF);
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write_nic_dword(dev, ANAPARAM, ANAPARM_ON);
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/* turn on AFE */
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write_nic_dword(dev, ANAPARAM2, ANAPARM2_ON);
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write_nic_byte(dev, 0x54, 0x00);
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write_nic_byte(dev, 0x62, 0x00);
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write_nic_byte(dev, CONFIG4, priv->RFProgType);
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/* turn on RF */
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RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
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RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
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/* turn on CCK and OFDM */
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/* turn on RF again */
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u1bTmp = read_nic_byte(dev, 0x24E);
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RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
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write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6))));
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RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
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break;
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case eRfSleep:
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/* turn on BB */
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break;
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write_phy_ofdm(dev, 0x10, 0x40);
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case eRfOff:
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write_phy_ofdm(dev, 0x12, 0x40);
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break;
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default:
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/* Avoid power down at init time. */
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bResult = false;
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write_nic_byte(dev, CONFIG4, priv->RFProgType);
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break;
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}
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u1bTmp = read_nic_byte(dev, 0x24E);
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write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6))));
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break;
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break;
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case RF_ZEBRA4:
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case eRfSleep:
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switch (eRFPowerState) {
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for (QueueID = 0, i = 0; QueueID < 6;) {
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case eRfOn:
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if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) {
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write_nic_word(dev, 0x37C, 0x00EC);
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QueueID++;
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continue;
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/* turn on AFE */
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} else {
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write_nic_byte(dev, 0x54, 0x00);
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priv->TxPollingTimes++;
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write_nic_byte(dev, 0x62, 0x00);
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if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
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bActionAllowed = false;
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/* turn on RF */
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RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
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RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
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/* turn on RF again */
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RF_WriteReg(dev, 0x0, 0x009f); udelay(500);
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RF_WriteReg(dev, 0x4, 0x0972); udelay(500);
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/* turn on BB */
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write_phy_ofdm(dev,0x10,0x40);
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write_phy_ofdm(dev,0x12,0x40);
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/* Avoid power down at init time. */
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write_nic_byte(dev, CONFIG4, priv->RFProgType);
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u1bTmp = read_nic_byte(dev, 0x24E);
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write_nic_byte(dev, 0x24E, (u1bTmp & (~(BIT5 | BIT6))));
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break;
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case eRfSleep:
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for (QueueID = 0, i = 0; QueueID < 6;) {
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if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) {
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QueueID++;
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continue;
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} else {
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priv->TxPollingTimes ++;
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if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
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bActionAllowed = false;
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break;
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} else
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udelay(10);
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}
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}
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if (bActionAllowed) {
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/* turn off BB RXIQ matrix to cut off rx signal */
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write_phy_ofdm(dev, 0x10, 0x00);
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write_phy_ofdm(dev, 0x12, 0x00);
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/* turn off RF */
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RF_WriteReg(dev, 0x4, 0x0000);
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RF_WriteReg(dev, 0x0, 0x0000);
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/* turn off AFE except PLL */
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write_nic_byte(dev, 0x62, 0xff);
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write_nic_byte(dev, 0x54, 0xec);
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mdelay(1);
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{
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int i = 0;
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while (true) {
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u8 tmp24F = read_nic_byte(dev, 0x24f);
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if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
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bTurnOffBB = true;
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break;
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} else {
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udelay(10);
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i++;
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priv->TxPollingTimes++;
|
|
||||||
|
|
||||||
if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
|
|
||||||
bTurnOffBB = false;
|
|
||||||
break;
|
|
||||||
} else
|
|
||||||
udelay(10);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
if (bTurnOffBB) {
|
|
||||||
/* turn off BB */
|
|
||||||
u1bTmp = read_nic_byte(dev, 0x24E);
|
|
||||||
write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
|
|
||||||
|
|
||||||
/* turn off AFE PLL */
|
|
||||||
write_nic_byte(dev, 0x54, 0xFC);
|
|
||||||
write_nic_word(dev, 0x37C, 0x00FC);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
case eRfOff:
|
|
||||||
for (QueueID = 0, i = 0; QueueID < 6;) {
|
|
||||||
if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) {
|
|
||||||
QueueID++;
|
|
||||||
continue;
|
|
||||||
} else {
|
|
||||||
udelay(10);
|
|
||||||
i++;
|
|
||||||
}
|
|
||||||
|
|
||||||
if (i >= MAX_DOZE_WAITING_TIMES_85B)
|
|
||||||
break;
|
break;
|
||||||
|
} else
|
||||||
|
udelay(10);
|
||||||
}
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (bActionAllowed) {
|
||||||
/* turn off BB RXIQ matrix to cut off rx signal */
|
/* turn off BB RXIQ matrix to cut off rx signal */
|
||||||
write_phy_ofdm(dev, 0x10, 0x00);
|
write_phy_ofdm(dev, 0x10, 0x00);
|
||||||
write_phy_ofdm(dev, 0x12, 0x00);
|
write_phy_ofdm(dev, 0x12, 0x00);
|
||||||
|
|
@ -998,22 +912,23 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
|
||||||
|
|
||||||
{
|
{
|
||||||
int i = 0;
|
int i = 0;
|
||||||
|
while (true) {
|
||||||
while (true)
|
|
||||||
{
|
|
||||||
u8 tmp24F = read_nic_byte(dev, 0x24f);
|
u8 tmp24F = read_nic_byte(dev, 0x24f);
|
||||||
|
|
||||||
if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
|
if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
|
||||||
bTurnOffBB = true;
|
bTurnOffBB = true;
|
||||||
break;
|
break;
|
||||||
} else {
|
} else {
|
||||||
bTurnOffBB = false;
|
|
||||||
udelay(10);
|
udelay(10);
|
||||||
i++;
|
i++;
|
||||||
}
|
priv->TxPollingTimes++;
|
||||||
|
|
||||||
if (i > MAX_POLLING_24F_TIMES_87SE)
|
if (priv->TxPollingTimes >= LPS_MAX_SLEEP_WAITING_TIMES_87SE) {
|
||||||
break;
|
bTurnOffBB = false;
|
||||||
|
break;
|
||||||
|
} else
|
||||||
|
udelay(10);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -1022,15 +937,68 @@ bool SetZebraRFPowerState8185(struct net_device *dev,
|
||||||
u1bTmp = read_nic_byte(dev, 0x24E);
|
u1bTmp = read_nic_byte(dev, 0x24E);
|
||||||
write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
|
write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
|
||||||
|
|
||||||
/* turn off AFE PLL (80M) */
|
/* turn off AFE PLL */
|
||||||
write_nic_byte(dev, 0x54, 0xFC);
|
write_nic_byte(dev, 0x54, 0xFC);
|
||||||
write_nic_word(dev, 0x37C, 0x00FC);
|
write_nic_word(dev, 0x37C, 0x00FC);
|
||||||
}
|
}
|
||||||
break;
|
}
|
||||||
default:
|
break;
|
||||||
bResult = false;
|
case eRfOff:
|
||||||
printk("SetZebraRFPowerState8185(): unknown state to set: 0x%X!!!\n", eRFPowerState);
|
for (QueueID = 0, i = 0; QueueID < 6;) {
|
||||||
break;
|
if (get_curr_tx_free_desc(dev, QueueID) == priv->txringcount) {
|
||||||
|
QueueID++;
|
||||||
|
continue;
|
||||||
|
} else {
|
||||||
|
udelay(10);
|
||||||
|
i++;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (i >= MAX_DOZE_WAITING_TIMES_85B)
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* turn off BB RXIQ matrix to cut off rx signal */
|
||||||
|
write_phy_ofdm(dev, 0x10, 0x00);
|
||||||
|
write_phy_ofdm(dev, 0x12, 0x00);
|
||||||
|
|
||||||
|
/* turn off RF */
|
||||||
|
RF_WriteReg(dev, 0x4, 0x0000);
|
||||||
|
RF_WriteReg(dev, 0x0, 0x0000);
|
||||||
|
|
||||||
|
/* turn off AFE except PLL */
|
||||||
|
write_nic_byte(dev, 0x62, 0xff);
|
||||||
|
write_nic_byte(dev, 0x54, 0xec);
|
||||||
|
|
||||||
|
mdelay(1);
|
||||||
|
|
||||||
|
{
|
||||||
|
int i = 0;
|
||||||
|
|
||||||
|
while (true) {
|
||||||
|
u8 tmp24F = read_nic_byte(dev, 0x24f);
|
||||||
|
|
||||||
|
if ((tmp24F == 0x01) || (tmp24F == 0x09)) {
|
||||||
|
bTurnOffBB = true;
|
||||||
|
break;
|
||||||
|
} else {
|
||||||
|
bTurnOffBB = false;
|
||||||
|
udelay(10);
|
||||||
|
i++;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (i > MAX_POLLING_24F_TIMES_87SE)
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
if (bTurnOffBB) {
|
||||||
|
/* turn off BB */
|
||||||
|
u1bTmp = read_nic_byte(dev, 0x24E);
|
||||||
|
write_nic_byte(dev, 0x24E, (u1bTmp | BIT5 | BIT6));
|
||||||
|
|
||||||
|
/* turn off AFE PLL (80M) */
|
||||||
|
write_nic_byte(dev, 0x54, 0xFC);
|
||||||
|
write_nic_word(dev, 0x37C, 0x00FC);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -238,22 +238,9 @@ PlatformIORead4Byte(
|
||||||
return data;
|
return data;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void SetOutputEnableOfRfPins(struct net_device *dev)
|
||||||
SetOutputEnableOfRfPins(
|
|
||||||
struct net_device *dev
|
|
||||||
)
|
|
||||||
{
|
{
|
||||||
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
|
write_nic_word(dev, RFPinsEnable, 0x1bff);
|
||||||
|
|
||||||
switch(priv->rf_chip)
|
|
||||||
{
|
|
||||||
case RFCHIPID_RTL8225:
|
|
||||||
case RF_ZEBRA2:
|
|
||||||
case RF_ZEBRA4:
|
|
||||||
write_nic_word(dev, RFPinsEnable, 0x1bff);
|
|
||||||
//write_nic_word(dev, RFPinsEnable, 0x1fff);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
|
|
@ -603,111 +590,27 @@ HwThreeWire(
|
||||||
|
|
||||||
|
|
||||||
void
|
void
|
||||||
RF_WriteReg(
|
RF_WriteReg(struct net_device *dev, u8 offset, u32 data)
|
||||||
struct net_device *dev,
|
|
||||||
u8 offset,
|
|
||||||
u32 data
|
|
||||||
)
|
|
||||||
{
|
{
|
||||||
//RFReg reg;
|
u32 data2Write;
|
||||||
u32 data2Write;
|
u8 len;
|
||||||
u8 len;
|
|
||||||
u8 low2high;
|
|
||||||
//u32 RF_Read = 0;
|
|
||||||
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
|
|
||||||
|
|
||||||
|
/* Pure HW 3-wire. */
|
||||||
|
data2Write = (data << 4) | (u32)(offset & 0x0f);
|
||||||
|
len = 16;
|
||||||
|
|
||||||
switch(priv->rf_chip)
|
HwHSSIThreeWire(dev, (u8 *)(&data2Write), len, 1, 1);
|
||||||
{
|
|
||||||
case RFCHIPID_RTL8225:
|
|
||||||
case RF_ZEBRA2: // Annie 2006-05-12.
|
|
||||||
case RF_ZEBRA4: //by amy
|
|
||||||
switch(priv->RegThreeWireMode)
|
|
||||||
{
|
|
||||||
case SW_THREE_WIRE:
|
|
||||||
{ // Perform SW 3-wire programming by driver.
|
|
||||||
data2Write = (data << 4) | (u32)(offset & 0x0f);
|
|
||||||
len = 16;
|
|
||||||
low2high = 0;
|
|
||||||
ZEBRA_RFSerialWrite(dev, data2Write, len, low2high);
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
case HW_THREE_WIRE:
|
|
||||||
{ // Pure HW 3-wire.
|
|
||||||
data2Write = (data << 4) | (u32)(offset & 0x0f);
|
|
||||||
len = 16;
|
|
||||||
HwThreeWire(
|
|
||||||
dev,
|
|
||||||
(u8 *)(&data2Write), // pDataBuf,
|
|
||||||
len, // nDataBufBitCnt,
|
|
||||||
0, // bHold,
|
|
||||||
1); // bWrite
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
case HW_THREE_WIRE_PI: //Parallel Interface
|
|
||||||
{ // Pure HW 3-wire.
|
|
||||||
data2Write = (data << 4) | (u32)(offset & 0x0f);
|
|
||||||
len = 16;
|
|
||||||
HwHSSIThreeWire(
|
|
||||||
dev,
|
|
||||||
(u8*)(&data2Write), // pDataBuf,
|
|
||||||
len, // nDataBufBitCnt,
|
|
||||||
0, // bSI
|
|
||||||
1); // bWrite
|
|
||||||
|
|
||||||
//printk("33333\n");
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
case HW_THREE_WIRE_SI: //Serial Interface
|
|
||||||
{ // Pure HW 3-wire.
|
|
||||||
data2Write = (data << 4) | (u32)(offset & 0x0f);
|
|
||||||
len = 16;
|
|
||||||
// printk(" enter ZEBRA_RFSerialWrite\n ");
|
|
||||||
// low2high = 0;
|
|
||||||
// ZEBRA_RFSerialWrite(dev, data2Write, len, low2high);
|
|
||||||
|
|
||||||
HwHSSIThreeWire(
|
|
||||||
dev,
|
|
||||||
(u8*)(&data2Write), // pDataBuf,
|
|
||||||
len, // nDataBufBitCnt,
|
|
||||||
1, // bSI
|
|
||||||
1); // bWrite
|
|
||||||
|
|
||||||
// printk(" exit ZEBRA_RFSerialWrite\n ");
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
|
|
||||||
default:
|
|
||||||
DMESGE("RF_WriteReg(): invalid RegThreeWireMode(%d) !!!", priv->RegThreeWireMode);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
DMESGE("RF_WriteReg(): unknown RFChipID: %#X", priv->rf_chip);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void
|
void
|
||||||
ZEBRA_RFSerialRead(
|
ZEBRA_RFSerialRead(struct net_device *dev, u32 data2Write, u8 wLength,
|
||||||
struct net_device *dev,
|
u32 *data2Read, u8 rLength, u8 low2high)
|
||||||
u32 data2Write,
|
|
||||||
u8 wLength,
|
|
||||||
u32 *data2Read,
|
|
||||||
u8 rLength,
|
|
||||||
u8 low2high
|
|
||||||
)
|
|
||||||
{
|
{
|
||||||
ThreeWireReg twreg;
|
ThreeWireReg twreg;
|
||||||
int i;
|
int i;
|
||||||
u16 oval,oval2,oval3,tmp, wReg80;
|
u16 oval, oval2, oval3, tmp, wReg80;
|
||||||
u32 mask;
|
u32 mask;
|
||||||
u8 u1bTmp;
|
u8 u1bTmp;
|
||||||
ThreeWireReg tdata;
|
ThreeWireReg tdata;
|
||||||
//PHAL_DATA_8187 pHalData = GetHalData8187(pAdapter);
|
//PHAL_DATA_8187 pHalData = GetHalData8187(pAdapter);
|
||||||
{ // RTL8187S HSSI Read/Write Function
|
{ // RTL8187S HSSI Read/Write Function
|
||||||
|
|
@ -818,71 +721,16 @@ ZEBRA_RFSerialRead(
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
u32
|
u32 RF_ReadReg(struct net_device *dev, u8 offset)
|
||||||
RF_ReadReg(
|
|
||||||
struct net_device *dev,
|
|
||||||
u8 offset
|
|
||||||
)
|
|
||||||
{
|
{
|
||||||
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
|
u32 data2Write;
|
||||||
u32 data2Write;
|
u8 wlen;
|
||||||
u8 wlen;
|
u32 dataRead;
|
||||||
u8 rlen;
|
|
||||||
u8 low2high;
|
|
||||||
u32 dataRead;
|
|
||||||
|
|
||||||
switch(priv->rf_chip)
|
data2Write = ((u32)(offset & 0x0f));
|
||||||
{
|
wlen = 16;
|
||||||
case RFCHIPID_RTL8225:
|
HwHSSIThreeWire(dev, (u8 *)(&data2Write), wlen, 1, 0);
|
||||||
case RF_ZEBRA2:
|
dataRead = data2Write;
|
||||||
case RF_ZEBRA4:
|
|
||||||
switch(priv->RegThreeWireMode)
|
|
||||||
{
|
|
||||||
case HW_THREE_WIRE_PI: // For 87S Parallel Interface.
|
|
||||||
{
|
|
||||||
data2Write = ((u32)(offset&0x0f));
|
|
||||||
wlen=16;
|
|
||||||
HwHSSIThreeWire(
|
|
||||||
dev,
|
|
||||||
(u8*)(&data2Write), // pDataBuf,
|
|
||||||
wlen, // nDataBufBitCnt,
|
|
||||||
0, // bSI
|
|
||||||
0); // bWrite
|
|
||||||
dataRead= data2Write;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
case HW_THREE_WIRE_SI: // For 87S Serial Interface.
|
|
||||||
{
|
|
||||||
data2Write = ((u32)(offset&0x0f)) ;
|
|
||||||
wlen=16;
|
|
||||||
HwHSSIThreeWire(
|
|
||||||
dev,
|
|
||||||
(u8*)(&data2Write), // pDataBuf,
|
|
||||||
wlen, // nDataBufBitCnt,
|
|
||||||
1, // bSI
|
|
||||||
0 // bWrite
|
|
||||||
);
|
|
||||||
dataRead= data2Write;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
// Perform SW 3-wire programming by driver.
|
|
||||||
default:
|
|
||||||
{
|
|
||||||
data2Write = ((u32)(offset&0x1f)) << 27; // For Zebra E-cut. 2005.04.11, by rcnjko.
|
|
||||||
wlen = 6;
|
|
||||||
rlen = 12;
|
|
||||||
low2high = 0;
|
|
||||||
ZEBRA_RFSerialRead(dev, data2Write, wlen,&dataRead,rlen, low2high);
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
dataRead = 0;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
return dataRead;
|
return dataRead;
|
||||||
}
|
}
|
||||||
|
|
@ -1291,81 +1139,59 @@ UpdateInitialGain(
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|
||||||
switch(priv->rf_chip)
|
switch (priv->InitialGain) {
|
||||||
{
|
case 1: /* m861dBm */
|
||||||
case RF_ZEBRA4:
|
write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
|
||||||
// Dynamic set initial gain, follow 87B
|
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
||||||
switch(priv->InitialGain)
|
write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
|
||||||
{
|
|
||||||
case 1: //m861dBm
|
|
||||||
//DMESG("RTL8187 + 8225 Initial Gain State 1: -82 dBm \n");
|
|
||||||
write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 2: //m862dBm
|
|
||||||
//DMESG("RTL8187 + 8225 Initial Gain State 2: -82 dBm \n");
|
|
||||||
write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 3: //m863dBm
|
|
||||||
//DMESG("RTL8187 + 8225 Initial Gain State 3: -82 dBm \n");
|
|
||||||
write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 4: //m864dBm
|
|
||||||
//DMESG("RTL8187 + 8225 Initial Gain State 4: -78 dBm \n");
|
|
||||||
write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 5: //m82dBm
|
|
||||||
//DMESG("RTL8187 + 8225 Initial Gain State 5: -74 dBm \n");
|
|
||||||
write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 6: //m78dBm
|
|
||||||
//DMESG ("RTL8187 + 8225 Initial Gain State 6: -70 dBm \n");
|
|
||||||
write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 7: //m74dBm
|
|
||||||
//DMESG("RTL8187 + 8225 Initial Gain State 7: -66 dBm \n");
|
|
||||||
write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x24, 0xa6); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 8:
|
|
||||||
//DMESG("RTL8187 + 8225 Initial Gain State 8:\n");
|
|
||||||
write_phy_ofdm(dev, 0x17, 0x66); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x24, 0xb6); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
|
|
||||||
break;
|
|
||||||
|
|
||||||
|
|
||||||
default: //MP
|
|
||||||
//DMESG("RTL8187 + 8225 Initial Gain State 1: -82 dBm (default)\n");
|
|
||||||
write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
|
||||||
write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
break;
|
break;
|
||||||
|
|
||||||
|
case 2: /* m862dBm */
|
||||||
|
write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
|
||||||
|
break;
|
||||||
|
|
||||||
default:
|
case 3: /* m863dBm */
|
||||||
DMESG("UpdateInitialGain(): unknown RFChipID: %#X\n", priv->rf_chip);
|
write_phy_ofdm(dev, 0x17, 0x36); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 4: /* m864dBm */
|
||||||
|
write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 5: /* m82dBm */
|
||||||
|
write_phy_ofdm(dev, 0x17, 0x46); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x05, 0xfb); mdelay(1);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 6: /* m78dBm */
|
||||||
|
write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x24, 0x96); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 7: /* m74dBm */
|
||||||
|
write_phy_ofdm(dev, 0x17, 0x56); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x24, 0xa6); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 8:
|
||||||
|
write_phy_ofdm(dev, 0x17, 0x66); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x24, 0xb6); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x05, 0xfc); mdelay(1);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default: /* MP */
|
||||||
|
write_phy_ofdm(dev, 0x17, 0x26); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x24, 0x86); mdelay(1);
|
||||||
|
write_phy_ofdm(dev, 0x05, 0xfa); mdelay(1);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -1397,14 +1223,8 @@ PhyConfig8185(
|
||||||
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
|
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
|
||||||
write_nic_dword(dev, RCR, priv->ReceiveConfig);
|
write_nic_dword(dev, RCR, priv->ReceiveConfig);
|
||||||
priv->RFProgType = read_nic_byte(dev, CONFIG4) & 0x03;
|
priv->RFProgType = read_nic_byte(dev, CONFIG4) & 0x03;
|
||||||
// RF config
|
/* RF config */
|
||||||
switch(priv->rf_chip)
|
ZEBRA_Config_85BASIC_HardCode(dev);
|
||||||
{
|
|
||||||
case RF_ZEBRA2:
|
|
||||||
case RF_ZEBRA4:
|
|
||||||
ZEBRA_Config_85BASIC_HardCode( dev);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
//{by amy 080312
|
//{by amy 080312
|
||||||
// Set default initial gain state to 4, approved by SD3 DZ, by Bruce, 2007-06-06.
|
// Set default initial gain state to 4, approved by SD3 DZ, by Bruce, 2007-06-06.
|
||||||
if(priv->bDigMechanism)
|
if(priv->bDigMechanism)
|
||||||
|
|
@ -1614,19 +1434,8 @@ GetSupportedWirelessMode8185(
|
||||||
)
|
)
|
||||||
{
|
{
|
||||||
u8 btSupportedWirelessMode = 0;
|
u8 btSupportedWirelessMode = 0;
|
||||||
struct r8180_priv *priv = (struct r8180_priv *)ieee80211_priv(dev);
|
|
||||||
|
|
||||||
switch(priv->rf_chip)
|
|
||||||
{
|
|
||||||
case RF_ZEBRA2:
|
|
||||||
case RF_ZEBRA4:
|
|
||||||
btSupportedWirelessMode = (WIRELESS_MODE_B | WIRELESS_MODE_G);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
btSupportedWirelessMode = WIRELESS_MODE_B;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
|
btSupportedWirelessMode = (WIRELESS_MODE_B | WIRELESS_MODE_G);
|
||||||
return btSupportedWirelessMode;
|
return btSupportedWirelessMode;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -1881,23 +1690,11 @@ ActSetWirelessMode8185(
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
// 2. Swtich band: RF or BB specific actions,
|
/* 2. Swtich band: RF or BB specific actions,
|
||||||
// for example, refresh tables in omc8255, or change initial gain if necessary.
|
* for example, refresh tables in omc8255, or change initial gain if necessary.
|
||||||
switch(priv->rf_chip)
|
* Nothing to do for Zebra to switch band.
|
||||||
{
|
* Update current wireless mode if we swtich to specified band successfully. */
|
||||||
case RF_ZEBRA2:
|
ieee->mode = (WIRELESS_MODE)btWirelessMode;
|
||||||
case RF_ZEBRA4:
|
|
||||||
{
|
|
||||||
// Nothing to do for Zebra to switch band.
|
|
||||||
// Update current wireless mode if we swtich to specified band successfully.
|
|
||||||
ieee->mode = (WIRELESS_MODE)btWirelessMode;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
DMESGW("ActSetWirelessMode8185(): unsupported RF: 0x%X !!!\n", priv->rf_chip);
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
|
|
||||||
// 3. Change related setting.
|
// 3. Change related setting.
|
||||||
if( ieee->mode == WIRELESS_MODE_A ){
|
if( ieee->mode == WIRELESS_MODE_A ){
|
||||||
|
|
@ -2108,18 +1905,7 @@ SetRFPowerState(
|
||||||
return bResult;
|
return bResult;
|
||||||
}
|
}
|
||||||
|
|
||||||
switch(priv->rf_chip)
|
bResult = SetZebraRFPowerState8185(dev, eRFPowerState);
|
||||||
{
|
|
||||||
case RF_ZEBRA2:
|
|
||||||
case RF_ZEBRA4:
|
|
||||||
bResult = SetZebraRFPowerState8185(dev, eRFPowerState);
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
printk("SetRFPowerState8185(): unknown RFChipID: 0x%X!!!\n", priv->rf_chip);
|
|
||||||
break;;
|
|
||||||
}
|
|
||||||
// printk("<--------- SetRFPowerState(): bResult(%d)\n", bResult);
|
|
||||||
|
|
||||||
return bResult;
|
return bResult;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue