irq_remapping/vt-d: Change prototypes to prepare for hierarchical irqdomain
Prepare for the conversion to hierarchical irqdomains by changing function prototypes. No functional changes. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: Joerg Roedel <jroedel@suse.de> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: David Cohen <david.a.cohen@linux.intel.com> Cc: Sander Eikelenboom <linux@eikelenboom.it> Cc: David Vrabel <david.vrabel@citrix.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: iommu@lists.linux-foundation.org Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Borislav Petkov <bp@alien8.de> Cc: Dimitri Sivanich <sivanich@sgi.com> Cc: Joerg Roedel <joro@8bytes.org> Link: http://lkml.kernel.org/r/1428905519-23704-10-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -82,10 +82,10 @@ static int get_irte(int irq, struct irte *entry)
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return 0;
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}
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static int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
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static int alloc_irte(struct intel_iommu *iommu, int irq,
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struct irq_2_iommu *irq_iommu, u16 count)
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{
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struct ir_table *table = iommu->ir_table;
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struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
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struct irq_cfg *cfg = irq_cfg(irq);
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unsigned int mask = 0;
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unsigned long flags;
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@ -173,9 +173,9 @@ static int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subha
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return 0;
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}
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static int modify_irte(int irq, struct irte *irte_modified)
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static int modify_irte(struct irq_2_iommu *irq_iommu,
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struct irte *irte_modified)
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{
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struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
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struct intel_iommu *iommu;
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unsigned long flags;
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struct irte *irte;
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@ -242,7 +242,7 @@ static int clear_entries(struct irq_2_iommu *irq_iommu)
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return 0;
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iommu = irq_iommu->iommu;
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index = irq_iommu->irte_index + irq_iommu->sub_handle;
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index = irq_iommu->irte_index;
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start = iommu->ir_table->base + index;
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end = start + (1 << irq_iommu->irte_mask);
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@ -986,7 +986,7 @@ static int intel_setup_ioapic_entry(int irq,
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pr_warn("No mapping iommu for ioapic %d\n", ioapic_id);
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index = -ENODEV;
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} else {
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index = alloc_irte(iommu, irq, 1);
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index = alloc_irte(iommu, irq, irq_2_iommu(irq), 1);
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if (index < 0) {
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pr_warn("Failed to allocate IRTE for ioapic %d\n",
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ioapic_id);
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@ -1002,7 +1002,7 @@ static int intel_setup_ioapic_entry(int irq,
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/* Set source-id of interrupt request */
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set_ioapic_sid(&irte, ioapic_id);
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modify_irte(irq, &irte);
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modify_irte(irq_2_iommu(irq), &irte);
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apic_printk(APIC_VERBOSE, KERN_DEBUG "IOAPIC[%d]: "
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"Set IRTE entry (P:%d FPD:%d Dst_Mode:%d "
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@ -1089,7 +1089,7 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
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* Atomically updates the IRTE with the new destination, vector
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* and flushes the interrupt entry cache.
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*/
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modify_irte(irq, &irte);
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modify_irte(irq_2_iommu(irq), &irte);
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/*
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* After this point, all the interrupts will start arriving
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@ -1125,7 +1125,7 @@ static void intel_compose_msi_msg(struct pci_dev *pdev,
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else
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set_hpet_sid(&irte, hpet_id);
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modify_irte(irq, &irte);
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modify_irte(irq_2_iommu(irq), &irte);
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msg->address_hi = MSI_ADDR_BASE_HI;
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msg->data = sub_handle;
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@ -1152,7 +1152,7 @@ static int intel_msi_alloc_irq(struct pci_dev *dev, int irq, int nvec)
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"Unable to map PCI %s to iommu\n", pci_name(dev));
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index = -ENOENT;
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} else {
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index = alloc_irte(iommu, irq, nvec);
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index = alloc_irte(iommu, irq, irq_2_iommu(irq), nvec);
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if (index < 0) {
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printk(KERN_ERR
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"Unable to allocate %d IRTE for PCI %s\n",
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@ -1196,7 +1196,7 @@ static int intel_alloc_hpet_msi(unsigned int irq, unsigned int id)
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down_read(&dmar_global_lock);
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iommu = map_hpet_to_ir(id);
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if (iommu) {
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index = alloc_irte(iommu, irq, 1);
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index = alloc_irte(iommu, irq, irq_2_iommu(irq), 1);
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if (index >= 0)
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ret = 0;
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}
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