MIPS: Alchemy: Increase minimum timeout for 32kHz timer.
Since a clocksource change post 3.2-rc1, tasks on my DB1500 board hang after random amounts of time (from a few minutes to a few hours), regardless of load. Debugging showed that the compare-match register value is a few seconds lower than the current counter value. The minimum value of 8 was initialy determined by a trial-and-error approach. Currently it is sufficient for all Alchemys (without PCI apparently), independent of CPU clock; only the DB1500 and DB1550 boards experience these timer-related tasks hangs now. This patch increases the minimum timeout by 1 (to 9 counter ticks) which seems sufficient since the systems are still working perfectly fine after over 24 hours. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3214/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -146,7 +146,7 @@ static int __init alchemy_time_init(unsigned int m2int)
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cd->shift = 32;
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cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift);
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cd->max_delta_ns = clockevent_delta2ns(0xffffffff, cd);
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cd->min_delta_ns = clockevent_delta2ns(8, cd); /* ~0.25ms */
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cd->min_delta_ns = clockevent_delta2ns(9, cd); /* ~0.28ms */
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clockevents_register_device(cd);
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setup_irq(m2int, &au1x_rtcmatch2_irqaction);
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