ARM: dts: AM43xx: clk: Add RNG clk node
Add clk node for RNG module. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -104,6 +104,14 @@
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clock-div = <1>;
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clock-div = <1>;
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};
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};
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rng_fck: rng_fck {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&sys_clkin_ck>;
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clock-mult = <1>;
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clock-div = <1>;
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};
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ehrpwm0_tbclk: ehrpwm0_tbclk@664 {
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ehrpwm0_tbclk: ehrpwm0_tbclk@664 {
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#clock-cells = <0>;
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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compatible = "ti,gate-clock";
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@ -58,6 +58,7 @@ static struct ti_dt_clk am43xx_clks[] = {
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DT_CLK(NULL, "smartreflex1_fck", "smartreflex1_fck"),
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DT_CLK(NULL, "smartreflex1_fck", "smartreflex1_fck"),
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DT_CLK(NULL, "sha0_fck", "sha0_fck"),
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DT_CLK(NULL, "sha0_fck", "sha0_fck"),
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DT_CLK(NULL, "aes0_fck", "aes0_fck"),
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DT_CLK(NULL, "aes0_fck", "aes0_fck"),
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DT_CLK(NULL, "rng_fck", "rng_fck"),
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DT_CLK(NULL, "timer1_fck", "timer1_fck"),
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DT_CLK(NULL, "timer1_fck", "timer1_fck"),
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DT_CLK(NULL, "timer2_fck", "timer2_fck"),
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DT_CLK(NULL, "timer2_fck", "timer2_fck"),
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DT_CLK(NULL, "timer3_fck", "timer3_fck"),
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DT_CLK(NULL, "timer3_fck", "timer3_fck"),
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