Merge 3.8-rc5 into staging-next
This resolves a merge issue with a iio driver, and the zram code. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
commit
8f5f90a872
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@ -116,7 +116,7 @@ my_suspend (struct pci_dev * pci_dev,
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return 0; /* a negative value on error, 0 on success. */
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}
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static void __devexit
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static void
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my_remove (struct pci_dev * pci_dev)
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{
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my_device *my = pci_get_drvdata (pci_dev);
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@ -124,7 +124,7 @@ my_remove (struct pci_dev * pci_dev)
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/* Describe me. */
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}
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static int __devinit
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static int
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my_probe (struct pci_dev * pci_dev,
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const struct pci_device_id * pci_id)
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{
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@ -157,7 +157,7 @@ my_pci_driver = {
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.id_table = my_pci_device_ids,
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.probe = my_probe,
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.remove = __devexit_p (my_remove),
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.remove = my_remove,
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/* Power management functions. */
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.suspend = my_suspend,
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@ -76,7 +76,7 @@ To notify SR-IOV core of Virtual Function Migration:
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Following piece of code illustrates the usage of the SR-IOV API.
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static int __devinit dev_probe(struct pci_dev *dev, const struct pci_device_id *id)
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static int dev_probe(struct pci_dev *dev, const struct pci_device_id *id)
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{
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pci_enable_sriov(dev, NR_VIRTFN);
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@ -85,7 +85,7 @@ static int __devinit dev_probe(struct pci_dev *dev, const struct pci_device_id *
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return 0;
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}
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static void __devexit dev_remove(struct pci_dev *dev)
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static void dev_remove(struct pci_dev *dev)
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{
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pci_disable_sriov(dev);
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@ -131,7 +131,7 @@ static struct pci_driver dev_driver = {
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.name = "SR-IOV Physical Function driver",
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.id_table = dev_id_table,
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.probe = dev_probe,
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.remove = __devexit_p(dev_remove),
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.remove = dev_remove,
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.suspend = dev_suspend,
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.resume = dev_resume,
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.shutdown = dev_shutdown,
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@ -183,12 +183,6 @@ Please mark the initialization and cleanup functions where appropriate
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initializes.
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__exit Exit code. Ignored for non-modular drivers.
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__devinit Device initialization code.
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Identical to __init if the kernel is not compiled
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with CONFIG_HOTPLUG, normal function otherwise.
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__devexit The same for __exit.
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Tips on when/where to use the above attributes:
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o The module_init()/module_exit() functions (and all
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initialization functions called _only_ from these)
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@ -196,20 +190,6 @@ Tips on when/where to use the above attributes:
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o Do not mark the struct pci_driver.
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o The ID table array should be marked __devinitconst; this is done
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automatically if the table is declared with DEFINE_PCI_DEVICE_TABLE().
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o The probe() and remove() functions should be marked __devinit
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and __devexit respectively. All initialization functions
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exclusively called by the probe() routine, can be marked __devinit.
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Ditto for remove() and __devexit.
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o If mydriver_remove() is marked with __devexit(), then all address
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references to mydriver_remove must use __devexit_p(mydriver_remove)
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(in the struct pci_driver declaration for example).
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__devexit_p() will generate the function name _or_ NULL if the
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function will be discarded. For an example, see drivers/net/tg3.c.
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o Do NOT mark a function if you are not sure which mark to use.
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Better to not mark the function than mark the function wrong.
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@ -185,7 +185,7 @@ input driver:
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.acpi_match_table ACPI_PTR(mpu3050_acpi_match),
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},
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.probe = mpu3050_probe,
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.remove = __devexit_p(mpu3050_remove),
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.remove = mpu3050_remove,
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.id_table = mpu3050_ids,
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};
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@ -60,11 +60,6 @@ clks: clkctrl@80040000 {
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compatible = "fsl,imx23-clkctrl";
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reg = <0x80040000 0x2000>;
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#clock-cells = <1>;
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clock-output-names =
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...
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"uart", /* 32 */
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...
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"end_of_list";
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};
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auart0: serial@8006c000 {
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@ -146,10 +146,6 @@ clks: ccm@53f80000 {
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compatible = "fsl,imx25-ccm";
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reg = <0x53f80000 0x4000>;
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interrupts = <31>;
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clock-output-names = ...
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"uart_ipg",
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"uart_serial",
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...;
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};
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uart1: serial@43f90000 {
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|
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@ -83,11 +83,6 @@ clks: clkctrl@80040000 {
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compatible = "fsl,imx28-clkctrl";
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reg = <0x80040000 0x2000>;
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#clock-cells = <1>;
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clock-output-names =
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...
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"uart", /* 45 */
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...
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"end_of_list";
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};
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auart0: serial@8006a000 {
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|
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@ -211,10 +211,6 @@ clks: ccm@020c4000 {
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reg = <0x020c4000 0x4000>;
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interrupts = <0 87 0x04 0 88 0x04>;
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#clock-cells = <1>;
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clock-output-names = ...
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"uart_ipg",
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"uart_serial",
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...;
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};
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uart1: serial@02020000 {
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@ -1,4 +1,19 @@
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GPIO line that should be set high/low to power off a device
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Driver a GPIO line that can be used to turn the power off.
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The driver supports both level triggered and edge triggered power off.
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At driver load time, the driver will request the given gpio line and
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install a pm_power_off handler. If the optional properties 'input' is
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not found, the GPIO line will be driven in the inactive
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state. Otherwise its configured as an input.
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When the pm_power_off is called, the gpio is configured as an output,
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and drive active, so triggering a level triggered power off
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condition. This will also cause an inactive->active edge condition, so
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triggering positive edge triggered power off. After a delay of 100ms,
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the GPIO is set to inactive, thus causing an active->inactive edge,
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triggering negative edge triggered power off. After another 100ms
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delay the GPIO is driver active again. If the power is still on and
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the CPU still running after a 3000ms delay, a WARN_ON(1) is emitted.
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Required properties:
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- compatible : should be "gpio-poweroff".
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@ -13,10 +28,9 @@ Optional properties:
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property is not specified, the GPIO is initialized as an output in its
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inactive state.
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Examples:
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gpio-poweroff {
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compatible = "gpio-poweroff";
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gpios = <&gpio 4 0>; /* GPIO 4 Active Low */
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gpios = <&gpio 4 0>;
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};
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@ -81,7 +81,8 @@ PA31 TXD4
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Required properties for pin configuration node:
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- atmel,pins: 4 integers array, represents a group of pins mux and config
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setting. The format is atmel,pins = <PIN_BANK PIN_BANK_NUM PERIPH CONFIG>.
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The PERIPH 0 means gpio.
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The PERIPH 0 means gpio, PERIPH 1 is periph A, PERIPH 2 is periph B...
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PIN_BANK 0 is pioA, PIN_BANK 1 is pioB...
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Bits used for CONFIG:
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PULL_UP (1 << 0): indicate this pin need a pull up.
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@ -126,7 +127,7 @@ pinctrl@fffff400 {
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pinctrl_dbgu: dbgu-0 {
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atmel,pins =
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<1 14 0x1 0x0 /* PB14 periph A */
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1 15 0x1 0x1>; /* PB15 periph with pullup */
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1 15 0x1 0x1>; /* PB15 periph A with pullup */
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};
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};
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};
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47
Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
Normal file
47
Documentation/devicetree/bindings/pinctrl/pinctrl-sirf.txt
Normal file
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@ -0,0 +1,47 @@
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CSR SiRFprimaII pinmux controller
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Required properties:
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- compatible : "sirf,prima2-pinctrl"
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- reg : Address range of the pinctrl registers
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- interrupts : Interrupts used by every GPIO group
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- gpio-controller : Indicates this device is a GPIO controller
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- interrupt-controller : Marks the device node as an interrupt controller
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Optional properties:
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- sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m
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- sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m
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Please refer to pinctrl-bindings.txt in this directory for details of the common
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pinctrl bindings used by client devices.
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SiRFprimaII's pinmux nodes act as a container for an abitrary number of subnodes.
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Each of these subnodes represents some desired configuration for a group of pins.
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Required subnode-properties:
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- sirf,pins : An array of strings. Each string contains the name of a group.
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- sirf,function: A string containing the name of the function to mux to the
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group.
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Valid values for group and function names can be found from looking at the
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group and function arrays in driver files:
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drivers/pinctrl/pinctrl-sirf.c
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For example, pinctrl might have subnodes like the following:
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uart2_pins_a: uart2@0 {
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uart {
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sirf,pins = "uart2grp";
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sirf,function = "uart2";
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};
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};
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uart2_noflow_pins_a: uart2@1 {
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uart {
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sirf,pins = "uart2_nostreamctrlgrp";
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sirf,function = "uart2_nostreamctrl";
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};
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};
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For a specific board, if it wants to use uart2 without hardware flow control,
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it can add the following to its board-specific .dts file.
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uart2: uart@0xb0070000 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_noflow_pins_a>;
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}
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@ -175,9 +175,9 @@ consists of multiple segments as described below.
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align with the zone size <-|
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|-> align with the segment size
|
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_________________________________________________________________________
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| | | Node | Segment | Segment | |
|
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| Superblock | Checkpoint | Address | Info. | Summary | Main |
|
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| (SB) | (CP) | Table (NAT) | Table (SIT) | Area (SSA) | |
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| | | Segment | Node | Segment | |
|
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| Superblock | Checkpoint | Info. | Address | Summary | Main |
|
||||
| (SB) | (CP) | Table (SIT) | Table (NAT) | Area (SSA) | |
|
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|____________|_____2______|______N______|______N______|______N_____|__N___|
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. .
|
||||
. .
|
||||
|
@ -200,14 +200,14 @@ consists of multiple segments as described below.
|
|||
: It contains file system information, bitmaps for valid NAT/SIT sets, orphan
|
||||
inode lists, and summary entries of current active segments.
|
||||
|
||||
- Node Address Table (NAT)
|
||||
: It is composed of a block address table for all the node blocks stored in
|
||||
Main area.
|
||||
|
||||
- Segment Information Table (SIT)
|
||||
: It contains segment information such as valid block count and bitmap for the
|
||||
validity of all the blocks.
|
||||
|
||||
- Node Address Table (NAT)
|
||||
: It is composed of a block address table for all the node blocks stored in
|
||||
Main area.
|
||||
|
||||
- Segment Summary Area (SSA)
|
||||
: It contains summary entries which contains the owner information of all the
|
||||
data and node blocks stored in Main area.
|
||||
|
@ -236,13 +236,13 @@ For file system consistency, each CP points to which NAT and SIT copies are
|
|||
valid, as shown as below.
|
||||
|
||||
+--------+----------+---------+
|
||||
| CP | NAT | SIT |
|
||||
| CP | SIT | NAT |
|
||||
+--------+----------+---------+
|
||||
. . . .
|
||||
. . . .
|
||||
. . . .
|
||||
+-------+-------+--------+--------+--------+--------+
|
||||
| CP #0 | CP #1 | NAT #0 | NAT #1 | SIT #0 | SIT #1 |
|
||||
| CP #0 | CP #1 | SIT #0 | SIT #1 | NAT #0 | NAT #1 |
|
||||
+-------+-------+--------+--------+--------+--------+
|
||||
| ^ ^
|
||||
| | |
|
||||
|
|
|
@ -91,7 +91,7 @@ Example (from the nxp OHCI driver):
|
|||
|
||||
static const unsigned short normal_i2c[] = { 0x2c, 0x2d, I2C_CLIENT_END };
|
||||
|
||||
static int __devinit usb_hcd_nxp_probe(struct platform_device *pdev)
|
||||
static int usb_hcd_nxp_probe(struct platform_device *pdev)
|
||||
{
|
||||
(...)
|
||||
struct i2c_adapter *i2c_adap;
|
||||
|
|
|
@ -36,7 +36,7 @@ neigh/default/unres_qlen_bytes - INTEGER
|
|||
The maximum number of bytes which may be used by packets
|
||||
queued for each unresolved address by other network layers.
|
||||
(added in linux 3.3)
|
||||
Seting negative value is meaningless and will retrun error.
|
||||
Setting negative value is meaningless and will return error.
|
||||
Default: 65536 Bytes(64KB)
|
||||
|
||||
neigh/default/unres_qlen - INTEGER
|
||||
|
@ -215,7 +215,7 @@ tcp_ecn - INTEGER
|
|||
Possible values are:
|
||||
0 Disable ECN. Neither initiate nor accept ECN.
|
||||
1 Always request ECN on outgoing connection attempts.
|
||||
2 Enable ECN when requested by incomming connections
|
||||
2 Enable ECN when requested by incoming connections
|
||||
but do not request ECN on outgoing connections.
|
||||
Default: 2
|
||||
|
||||
|
@ -503,7 +503,7 @@ tcp_fastopen - INTEGER
|
|||
tcp_syn_retries - INTEGER
|
||||
Number of times initial SYNs for an active TCP connection attempt
|
||||
will be retransmitted. Should not be higher than 255. Default value
|
||||
is 6, which corresponds to 63seconds till the last restransmission
|
||||
is 6, which corresponds to 63seconds till the last retransmission
|
||||
with the current initial RTO of 1second. With this the final timeout
|
||||
for an active TCP connection attempt will happen after 127seconds.
|
||||
|
||||
|
@ -1331,6 +1331,12 @@ force_tllao - BOOLEAN
|
|||
race condition where the sender deletes the cached link-layer address
|
||||
prior to receiving a response to a previous solicitation."
|
||||
|
||||
ndisc_notify - BOOLEAN
|
||||
Define mode for notification of address and device changes.
|
||||
0 - (default): do nothing
|
||||
1 - Generate unsolicited neighbour advertisements when device is brought
|
||||
up or hardware address changes.
|
||||
|
||||
icmp/*:
|
||||
ratelimit - INTEGER
|
||||
Limit the maximal rates for sending ICMPv6 packets.
|
||||
|
@ -1530,7 +1536,7 @@ cookie_hmac_alg - STRING
|
|||
* sha1
|
||||
* none
|
||||
Ability to assign md5 or sha1 as the selected alg is predicated on the
|
||||
configuarion of those algorithms at build time (CONFIG_CRYPTO_MD5 and
|
||||
configuration of those algorithms at build time (CONFIG_CRYPTO_MD5 and
|
||||
CONFIG_CRYPTO_SHA1).
|
||||
|
||||
Default: Dependent on configuration. MD5 if available, else SHA1 if
|
||||
|
@ -1548,7 +1554,7 @@ rcvbuf_policy - INTEGER
|
|||
blocking.
|
||||
|
||||
1: rcvbuf space is per association
|
||||
0: recbuf space is per socket
|
||||
0: rcvbuf space is per socket
|
||||
|
||||
Default: 0
|
||||
|
||||
|
|
|
@ -642,12 +642,13 @@ out the following operations:
|
|||
* During system suspend it calls pm_runtime_get_noresume() and
|
||||
pm_runtime_barrier() for every device right before executing the
|
||||
subsystem-level .suspend() callback for it. In addition to that it calls
|
||||
pm_runtime_disable() for every device right after executing the
|
||||
subsystem-level .suspend() callback for it.
|
||||
__pm_runtime_disable() with 'false' as the second argument for every device
|
||||
right before executing the subsystem-level .suspend_late() callback for it.
|
||||
|
||||
* During system resume it calls pm_runtime_enable() and pm_runtime_put_sync()
|
||||
for every device right before and right after executing the subsystem-level
|
||||
.resume() callback for it, respectively.
|
||||
for every device right after executing the subsystem-level .resume_early()
|
||||
callback and right after executing the subsystem-level .resume() callback
|
||||
for it, respectively.
|
||||
|
||||
7. Generic subsystem callbacks
|
||||
|
||||
|
|
|
@ -236,7 +236,7 @@ static int rpmsg_sample_probe(struct rpmsg_channel *rpdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void __devexit rpmsg_sample_remove(struct rpmsg_channel *rpdev)
|
||||
static void rpmsg_sample_remove(struct rpmsg_channel *rpdev)
|
||||
{
|
||||
dev_info(&rpdev->dev, "rpmsg sample client driver is removed\n");
|
||||
}
|
||||
|
@ -253,7 +253,7 @@ static struct rpmsg_driver rpmsg_sample_client = {
|
|||
.id_table = rpmsg_driver_sample_id_table,
|
||||
.probe = rpmsg_sample_probe,
|
||||
.callback = rpmsg_sample_cb,
|
||||
.remove = __devexit_p(rpmsg_sample_remove),
|
||||
.remove = rpmsg_sample_remove,
|
||||
};
|
||||
|
||||
static int __init init(void)
|
||||
|
|
|
@ -345,7 +345,7 @@ SPI protocol drivers somewhat resemble platform device drivers:
|
|||
},
|
||||
|
||||
.probe = CHIP_probe,
|
||||
.remove = __devexit_p(CHIP_remove),
|
||||
.remove = CHIP_remove,
|
||||
.suspend = CHIP_suspend,
|
||||
.resume = CHIP_resume,
|
||||
};
|
||||
|
@ -355,7 +355,7 @@ device whose board_info gave a modalias of "CHIP". Your probe() code
|
|||
might look like this unless you're creating a device which is managing
|
||||
a bus (appearing under /sys/class/spi_master).
|
||||
|
||||
static int __devinit CHIP_probe(struct spi_device *spi)
|
||||
static int CHIP_probe(struct spi_device *spi)
|
||||
{
|
||||
struct CHIP *chip;
|
||||
struct CHIP_platform_data *pdata;
|
||||
|
|
|
@ -38,6 +38,7 @@ show up in /proc/sys/kernel:
|
|||
- l2cr [ PPC only ]
|
||||
- modprobe ==> Documentation/debugging-modules.txt
|
||||
- modules_disabled
|
||||
- msg_next_id [ sysv ipc ]
|
||||
- msgmax
|
||||
- msgmnb
|
||||
- msgmni
|
||||
|
@ -62,7 +63,9 @@ show up in /proc/sys/kernel:
|
|||
- rtsig-max
|
||||
- rtsig-nr
|
||||
- sem
|
||||
- sem_next_id [ sysv ipc ]
|
||||
- sg-big-buff [ generic SCSI device (sg) ]
|
||||
- shm_next_id [ sysv ipc ]
|
||||
- shm_rmid_forced
|
||||
- shmall
|
||||
- shmmax [ sysv ipc ]
|
||||
|
@ -320,6 +323,22 @@ to false.
|
|||
|
||||
==============================================================
|
||||
|
||||
msg_next_id, sem_next_id, and shm_next_id:
|
||||
|
||||
These three toggles allows to specify desired id for next allocated IPC
|
||||
object: message, semaphore or shared memory respectively.
|
||||
|
||||
By default they are equal to -1, which means generic allocation logic.
|
||||
Possible values to set are in range {0..INT_MAX}.
|
||||
|
||||
Notes:
|
||||
1) kernel doesn't guarantee, that new object will have desired id. So,
|
||||
it's up to userspace, how to handle an object with "wrong" id.
|
||||
2) Toggle with non-default value will be set back to -1 by kernel after
|
||||
successful IPC object allocation.
|
||||
|
||||
==============================================================
|
||||
|
||||
nmi_watchdog:
|
||||
|
||||
Enables/Disables the NMI watchdog on x86 systems. When the value is
|
||||
|
@ -542,6 +561,19 @@ are doing anyway :)
|
|||
|
||||
==============================================================
|
||||
|
||||
shmall:
|
||||
|
||||
This parameter sets the total amount of shared memory pages that
|
||||
can be used system wide. Hence, SHMALL should always be at least
|
||||
ceil(shmmax/PAGE_SIZE).
|
||||
|
||||
If you are not sure what the default PAGE_SIZE is on your Linux
|
||||
system, you can run the following command:
|
||||
|
||||
# getconf PAGE_SIZE
|
||||
|
||||
==============================================================
|
||||
|
||||
shmmax:
|
||||
|
||||
This value can be used to query and set the run time limit
|
||||
|
|
|
@ -174,8 +174,7 @@ The recommended approach is as follows:
|
|||
|
||||
static atomic_t drv_instance = ATOMIC_INIT(0);
|
||||
|
||||
static int __devinit drv_probe(struct pci_dev *pdev,
|
||||
const struct pci_device_id *pci_id)
|
||||
static int drv_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
|
||||
{
|
||||
...
|
||||
state->instance = atomic_inc_return(&drv_instance) - 1;
|
||||
|
|
|
@ -182,8 +182,7 @@ int iterate(void *p)
|
|||
|
||||
static atomic_t drv_instance = ATOMIC_INIT(0);
|
||||
|
||||
static int __devinit drv_probe(struct pci_dev *pdev,
|
||||
const struct pci_device_id *pci_id)
|
||||
static int drv_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
|
||||
{
|
||||
...
|
||||
state->instance = atomic_inc_return(&drv_instance) - 1;
|
||||
|
|
251
MAINTAINERS
251
MAINTAINERS
File diff suppressed because it is too large
Load diff
4
Makefile
4
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 8
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc2
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Terrified Chipmunk
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
@ -169,7 +169,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
|
|||
-e s/arm.*/arm/ -e s/sa110/arm/ \
|
||||
-e s/s390x/s390/ -e s/parisc64/parisc/ \
|
||||
-e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
|
||||
-e s/sh[234].*/sh/ )
|
||||
-e s/sh[234].*/sh/ -e s/aarch64.*/arm64/ )
|
||||
|
||||
# Cross compiling and selecting different set of gcc/bin-utils
|
||||
# ---------------------------------------------------------------------------
|
||||
|
|
|
@ -9,8 +9,8 @@
|
|||
#ifndef _ASM_AXP_PARPORT_H
|
||||
#define _ASM_AXP_PARPORT_H 1
|
||||
|
||||
static int __devinit parport_pc_find_isa_ports (int autoirq, int autodma);
|
||||
static int __devinit parport_pc_find_nonpci_ports (int autoirq, int autodma)
|
||||
static int parport_pc_find_isa_ports (int autoirq, int autodma);
|
||||
static int parport_pc_find_nonpci_ports (int autoirq, int autodma)
|
||||
{
|
||||
return parport_pc_find_isa_ports (autoirq, autodma);
|
||||
}
|
||||
|
|
|
@ -59,13 +59,13 @@ struct pci_controller *pci_isa_hose;
|
|||
* Quirks.
|
||||
*/
|
||||
|
||||
static void __devinit quirk_isa_bridge(struct pci_dev *dev)
|
||||
static void quirk_isa_bridge(struct pci_dev *dev)
|
||||
{
|
||||
dev->class = PCI_CLASS_BRIDGE_ISA << 8;
|
||||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82378, quirk_isa_bridge);
|
||||
|
||||
static void __devinit quirk_cypress(struct pci_dev *dev)
|
||||
static void quirk_cypress(struct pci_dev *dev)
|
||||
{
|
||||
/* The Notorious Cy82C693 chip. */
|
||||
|
||||
|
@ -104,7 +104,7 @@ static void __devinit quirk_cypress(struct pci_dev *dev)
|
|||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, quirk_cypress);
|
||||
|
||||
/* Called for each device after PCI setup is done. */
|
||||
static void __devinit pcibios_fixup_final(struct pci_dev *dev)
|
||||
static void pcibios_fixup_final(struct pci_dev *dev)
|
||||
{
|
||||
unsigned int class = dev->class >> 8;
|
||||
|
||||
|
@ -198,8 +198,7 @@ subsys_initcall(pcibios_init);
|
|||
#ifdef ALPHA_RESTORE_SRM_SETUP
|
||||
static struct pdev_srm_saved_conf *srm_saved_configs;
|
||||
|
||||
void __devinit
|
||||
pdev_save_srm_config(struct pci_dev *dev)
|
||||
void pdev_save_srm_config(struct pci_dev *dev)
|
||||
{
|
||||
struct pdev_srm_saved_conf *tmp;
|
||||
static int printed = 0;
|
||||
|
@ -241,8 +240,7 @@ pci_restore_srm_config(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
void __devinit
|
||||
pcibios_fixup_bus(struct pci_bus *bus)
|
||||
void pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
struct pci_dev *dev = bus->self;
|
||||
|
||||
|
|
|
@ -68,7 +68,7 @@ enum ipi_message_type {
|
|||
};
|
||||
|
||||
/* Set to a secondary's cpuid when it comes online. */
|
||||
static int smp_secondary_alive __devinitdata = 0;
|
||||
static int smp_secondary_alive = 0;
|
||||
|
||||
int smp_num_probed; /* Internal processor count */
|
||||
int smp_num_cpus = 1; /* Number that came online. */
|
||||
|
@ -172,7 +172,7 @@ smp_callin(void)
|
|||
}
|
||||
|
||||
/* Wait until hwrpb->txrdy is clear for cpu. Return -1 on timeout. */
|
||||
static int __devinit
|
||||
static int
|
||||
wait_for_txrdy (unsigned long cpumask)
|
||||
{
|
||||
unsigned long timeout;
|
||||
|
@ -468,7 +468,7 @@ smp_prepare_cpus(unsigned int max_cpus)
|
|||
smp_num_cpus = smp_num_probed;
|
||||
}
|
||||
|
||||
void __devinit
|
||||
void
|
||||
smp_prepare_boot_cpu(void)
|
||||
{
|
||||
}
|
||||
|
|
|
@ -303,7 +303,7 @@ titan_late_init(void)
|
|||
|
||||
}
|
||||
|
||||
static int __devinit
|
||||
static int
|
||||
titan_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
u8 intline;
|
||||
|
|
|
@ -371,7 +371,6 @@ config ARCH_CNS3XXX
|
|||
config ARCH_CLPS711X
|
||||
bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
select AUTO_ZRELADDR
|
||||
select CLKDEV_LOOKUP
|
||||
select COMMON_CLK
|
||||
|
@ -1230,6 +1229,7 @@ config ARM_ERRATA_430973
|
|||
config ARM_ERRATA_458693
|
||||
bool "ARM errata: Processor deadlock when a false hazard is created"
|
||||
depends on CPU_V7
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 458693 Cortex-A8 (r2p0)
|
||||
erratum. For very specific sequences of memory operations, it is
|
||||
|
@ -1243,6 +1243,7 @@ config ARM_ERRATA_458693
|
|||
config ARM_ERRATA_460075
|
||||
bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
|
||||
depends on CPU_V7
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 460075 Cortex-A8 (r2p0)
|
||||
erratum. Any asynchronous access to the L2 cache may encounter a
|
||||
|
@ -1255,6 +1256,7 @@ config ARM_ERRATA_460075
|
|||
config ARM_ERRATA_742230
|
||||
bool "ARM errata: DMB operation may be faulty"
|
||||
depends on CPU_V7 && SMP
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 742230 Cortex-A9
|
||||
(r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
|
||||
|
@ -1267,6 +1269,7 @@ config ARM_ERRATA_742230
|
|||
config ARM_ERRATA_742231
|
||||
bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
|
||||
depends on CPU_V7 && SMP
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 742231 Cortex-A9
|
||||
(r2p0..r2p2) erratum. Under certain conditions, specific to the
|
||||
|
@ -1317,6 +1320,7 @@ config PL310_ERRATA_727915
|
|||
config ARM_ERRATA_743622
|
||||
bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
|
||||
depends on CPU_V7
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 743622 Cortex-A9
|
||||
(r2p*) erratum. Under very rare conditions, a faulty
|
||||
|
@ -1330,6 +1334,7 @@ config ARM_ERRATA_743622
|
|||
config ARM_ERRATA_751472
|
||||
bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
|
||||
depends on CPU_V7
|
||||
depends on !ARCH_MULTIPLATFORM
|
||||
help
|
||||
This option enables the workaround for the 751472 Cortex-A9 (prior
|
||||
to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
|
||||
|
|
|
@ -155,6 +155,7 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07.dtb \
|
|||
dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
|
||||
|
||||
targets += dtbs
|
||||
targets += $(dtb-y)
|
||||
endif
|
||||
|
||||
# *.dtb used to be generated in the directory above. Clean out the
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x20000000>; /* 512 MB */
|
||||
reg = <0x00000000 0x40000000>; /* 1 GB */
|
||||
};
|
||||
|
||||
soc {
|
||||
|
|
|
@ -50,17 +50,19 @@
|
|||
ranges;
|
||||
|
||||
serial@d0012000 {
|
||||
compatible = "ns16550";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xd0012000 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <41>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
serial@d0012100 {
|
||||
compatible = "ns16550";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xd0012100 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <42>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -34,7 +34,14 @@
|
|||
reg = <0>;
|
||||
clocks = <&cpuclk 0>;
|
||||
};
|
||||
}
|
||||
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "marvell,sheeva-v7";
|
||||
reg = <1>;
|
||||
clocks = <&cpuclk 1>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
pinctrl {
|
||||
|
@ -43,27 +50,25 @@
|
|||
};
|
||||
|
||||
gpio0: gpio@d0018100 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018100 0x40>,
|
||||
<0xd0018800 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018100 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <16>, <17>, <18>, <19>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
};
|
||||
|
||||
gpio1: gpio@d0018140 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018140 0x40>,
|
||||
<0xd0018840 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018140 0x40>;
|
||||
ngpios = <17>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <20>, <21>, <22>;
|
||||
interrupts = <87>, <88>, <89>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -51,39 +51,44 @@
|
|||
};
|
||||
|
||||
gpio0: gpio@d0018100 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018100 0x40>,
|
||||
<0xd0018800 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018100 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <16>, <17>, <18>, <19>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
};
|
||||
|
||||
gpio1: gpio@d0018140 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018140 0x40>,
|
||||
<0xd0018840 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018140 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <20>, <21>, <22>, <23>;
|
||||
interrupts = <87>, <88>, <89>, <90>;
|
||||
};
|
||||
|
||||
gpio2: gpio@d0018180 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018180 0x40>,
|
||||
<0xd0018870 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018180 0x40>;
|
||||
ngpios = <3>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <24>;
|
||||
interrupts = <91>;
|
||||
};
|
||||
|
||||
ethernet@d0034000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
reg = <0xd0034000 0x2500>;
|
||||
interrupts = <14>;
|
||||
clocks = <&gateclk 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -66,39 +66,44 @@
|
|||
};
|
||||
|
||||
gpio0: gpio@d0018100 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018100 0x40>,
|
||||
<0xd0018800 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018100 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <16>, <17>, <18>, <19>;
|
||||
interrupts = <82>, <83>, <84>, <85>;
|
||||
};
|
||||
|
||||
gpio1: gpio@d0018140 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018140 0x40>,
|
||||
<0xd0018840 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018140 0x40>;
|
||||
ngpios = <32>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <20>, <21>, <22>, <23>;
|
||||
interrupts = <87>, <88>, <89>, <90>;
|
||||
};
|
||||
|
||||
gpio2: gpio@d0018180 {
|
||||
compatible = "marvell,armadaxp-gpio";
|
||||
reg = <0xd0018180 0x40>,
|
||||
<0xd0018870 0x30>;
|
||||
compatible = "marvell,orion-gpio";
|
||||
reg = <0xd0018180 0x40>;
|
||||
ngpios = <3>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupts-cells = <2>;
|
||||
interrupts = <24>;
|
||||
interrupts = <91>;
|
||||
};
|
||||
|
||||
ethernet@d0034000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
reg = <0xd0034000 0x2500>;
|
||||
interrupts = <14>;
|
||||
clocks = <&gateclk 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -42,17 +42,19 @@
|
|||
|
||||
soc {
|
||||
serial@d0012200 {
|
||||
compatible = "ns16550";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xd0012200 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <43>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
serial@d0012300 {
|
||||
compatible = "ns16550";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0xd0012300 0x100>;
|
||||
reg-shift = <2>;
|
||||
interrupts = <44>;
|
||||
reg-io-width = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -93,14 +95,6 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ethernet@d0034000 {
|
||||
compatible = "marvell,armada-370-neta";
|
||||
reg = <0xd0034000 0x2500>;
|
||||
interrupts = <14>;
|
||||
clocks = <&gateclk 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
xor@d0060900 {
|
||||
compatible = "marvell,orion-xor";
|
||||
reg = <0xd0060900 0x100
|
||||
|
|
|
@ -336,8 +336,8 @@
|
|||
|
||||
i2c@0 {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&pioA 23 0 /* sda */
|
||||
&pioA 24 0 /* scl */
|
||||
gpios = <&pioA 25 0 /* sda */
|
||||
&pioA 26 0 /* scl */
|
||||
>;
|
||||
i2c-gpio,sda-open-drain;
|
||||
i2c-gpio,scl-open-drain;
|
||||
|
|
|
@ -306,6 +306,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<1 16 0x1 0x0 /* PB16 periph A */
|
||||
1 17 0x1 0x0 /* PB17 periph A */
|
||||
1 18 0x1 0x0>; /* PB18 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<1 19 0x1 0x0 /* PB19 periph A */
|
||||
1 20 0x1 0x0 /* PB20 periph A */
|
||||
1 21 0x1 0x0>; /* PB21 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
@ -450,6 +466,8 @@
|
|||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfffbc000 0x4000>;
|
||||
interrupts = <14 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -271,6 +271,38 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<1 0 0x2 0x0 /* PB0 periph B */
|
||||
1 1 0x2 0x0 /* PB1 periph B */
|
||||
1 2 0x2 0x0>; /* PB2 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<1 3 0x2 0x0 /* PB3 periph B */
|
||||
1 4 0x2 0x0 /* PB4 periph B */
|
||||
1 5 0x2 0x0>; /* PB5 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<1 6 0x1 0x0 /* PB6 periph A */
|
||||
1 7 0x1 0x0 /* PB7 periph A */
|
||||
1 8 0x1 0x0>; /* PB8 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<1 9 0x1 0x0 /* PB9 periph A */
|
||||
1 10 0x1 0x0 /* PB10 periph A */
|
||||
1 11 0x1 0x0>; /* PB11 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
|
@ -368,6 +400,8 @@
|
|||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfff98000 0x4000>;
|
||||
interrupts = <16 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -375,6 +409,8 @@
|
|||
compatible = "atmel,at91rm9200-ssc";
|
||||
reg = <0xfff9c000 0x4000>;
|
||||
interrupts = <17 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -290,6 +290,38 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<3 0 0x1 0x0 /* PD0 periph A */
|
||||
3 1 0x1 0x0 /* PD1 periph A */
|
||||
3 2 0x1 0x0>; /* PD2 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<3 3 0x1 0x0 /* PD3 periph A */
|
||||
3 4 0x1 0x0 /* PD4 periph A */
|
||||
3 5 0x1 0x0>; /* PD5 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
ssc1 {
|
||||
pinctrl_ssc1_tx: ssc1_tx-0 {
|
||||
atmel,pins =
|
||||
<3 10 0x1 0x0 /* PD10 periph A */
|
||||
3 11 0x1 0x0 /* PD11 periph A */
|
||||
3 12 0x1 0x0>; /* PD12 periph A */
|
||||
};
|
||||
|
||||
pinctrl_ssc1_rx: ssc1_rx-0 {
|
||||
atmel,pins =
|
||||
<3 13 0x1 0x0 /* PD13 periph A */
|
||||
3 14 0x1 0x0 /* PD14 periph A */
|
||||
3 15 0x1 0x0>; /* PD15 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff200 {
|
||||
compatible = "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff200 0x200>;
|
||||
|
@ -425,6 +457,8 @@
|
|||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xfff9c000 0x4000>;
|
||||
interrupts = <16 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -432,6 +466,8 @@
|
|||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xfffa0000 0x4000>;
|
||||
interrupts = <17 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -28,6 +28,7 @@
|
|||
tcb1 = &tcb1;
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
ssc0 = &ssc0;
|
||||
};
|
||||
cpus {
|
||||
cpu@0 {
|
||||
|
@ -244,6 +245,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<0 24 0x2 0x0 /* PA24 periph B */
|
||||
0 25 0x2 0x0 /* PA25 periph B */
|
||||
0 26 0x2 0x0>; /* PA26 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<0 27 0x2 0x0 /* PA27 periph B */
|
||||
0 28 0x2 0x0 /* PA28 periph B */
|
||||
0 29 0x2 0x0>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
@ -294,6 +311,15 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usart0: serial@f801c000 {
|
||||
compatible = "atmel,at91sam9260-usart";
|
||||
reg = <0xf801c000 0x4000>;
|
||||
|
|
|
@ -88,13 +88,6 @@
|
|||
interrupts = <1 4 7>;
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 4 5>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tcb0: timer@f8008000 {
|
||||
compatible = "atmel,at91sam9x5-tcb";
|
||||
reg = <0xf8008000 0x100>;
|
||||
|
@ -150,6 +143,11 @@
|
|||
atmel,pins =
|
||||
<0 3 0x1 0x0>; /* PA3 periph A */
|
||||
};
|
||||
|
||||
pinctrl_usart0_sck: usart0_sck-0 {
|
||||
atmel,pins =
|
||||
<0 4 0x1 0x0>; /* PA4 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
usart1 {
|
||||
|
@ -161,12 +159,17 @@
|
|||
|
||||
pinctrl_usart1_rts: usart1_rts-0 {
|
||||
atmel,pins =
|
||||
<3 27 0x3 0x0>; /* PC27 periph C */
|
||||
<2 27 0x3 0x0>; /* PC27 periph C */
|
||||
};
|
||||
|
||||
pinctrl_usart1_cts: usart1_cts-0 {
|
||||
atmel,pins =
|
||||
<3 28 0x3 0x0>; /* PC28 periph C */
|
||||
<2 28 0x3 0x0>; /* PC28 periph C */
|
||||
};
|
||||
|
||||
pinctrl_usart1_sck: usart1_sck-0 {
|
||||
atmel,pins =
|
||||
<2 28 0x3 0x0>; /* PC29 periph C */
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -179,46 +182,56 @@
|
|||
|
||||
pinctrl_uart2_rts: uart2_rts-0 {
|
||||
atmel,pins =
|
||||
<0 0 0x2 0x0>; /* PB0 periph B */
|
||||
<1 0 0x2 0x0>; /* PB0 periph B */
|
||||
};
|
||||
|
||||
pinctrl_uart2_cts: uart2_cts-0 {
|
||||
atmel,pins =
|
||||
<0 1 0x2 0x0>; /* PB1 periph B */
|
||||
<1 1 0x2 0x0>; /* PB1 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart2_sck: usart2_sck-0 {
|
||||
atmel,pins =
|
||||
<1 2 0x2 0x0>; /* PB2 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
usart3 {
|
||||
pinctrl_uart3: usart3-0 {
|
||||
atmel,pins =
|
||||
<3 23 0x2 0x1 /* PC22 periph B with pullup */
|
||||
3 23 0x2 0x0>; /* PC23 periph B */
|
||||
<2 23 0x2 0x1 /* PC22 periph B with pullup */
|
||||
2 23 0x2 0x0>; /* PC23 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<3 24 0x2 0x0>; /* PC24 periph B */
|
||||
<2 24 0x2 0x0>; /* PC24 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<3 25 0x2 0x0>; /* PC25 periph B */
|
||||
<2 25 0x2 0x0>; /* PC25 periph B */
|
||||
};
|
||||
|
||||
pinctrl_usart3_sck: usart3_sck-0 {
|
||||
atmel,pins =
|
||||
<2 26 0x2 0x0>; /* PC26 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
uart0 {
|
||||
pinctrl_uart0: uart0-0 {
|
||||
atmel,pins =
|
||||
<3 8 0x3 0x0 /* PC8 periph C */
|
||||
3 9 0x3 0x1>; /* PC9 periph C with pullup */
|
||||
<2 8 0x3 0x0 /* PC8 periph C */
|
||||
2 9 0x3 0x1>; /* PC9 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
uart1 {
|
||||
pinctrl_uart1: uart1-0 {
|
||||
atmel,pins =
|
||||
<3 16 0x3 0x0 /* PC16 periph C */
|
||||
3 17 0x3 0x1>; /* PC17 periph C with pullup */
|
||||
<2 16 0x3 0x0 /* PC16 periph C */
|
||||
2 17 0x3 0x1>; /* PC17 periph C with pullup */
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -247,14 +260,14 @@
|
|||
|
||||
pinctrl_macb0_rmii_mii: macb0_rmii_mii-0 {
|
||||
atmel,pins =
|
||||
<1 8 0x1 0x0 /* PA8 periph A */
|
||||
1 11 0x1 0x0 /* PA11 periph A */
|
||||
1 12 0x1 0x0 /* PA12 periph A */
|
||||
1 13 0x1 0x0 /* PA13 periph A */
|
||||
1 14 0x1 0x0 /* PA14 periph A */
|
||||
1 15 0x1 0x0 /* PA15 periph A */
|
||||
1 16 0x1 0x0 /* PA16 periph A */
|
||||
1 17 0x1 0x0>; /* PA17 periph A */
|
||||
<1 8 0x1 0x0 /* PB8 periph A */
|
||||
1 11 0x1 0x0 /* PB11 periph A */
|
||||
1 12 0x1 0x0 /* PB12 periph A */
|
||||
1 13 0x1 0x0 /* PB13 periph A */
|
||||
1 14 0x1 0x0 /* PB14 periph A */
|
||||
1 15 0x1 0x0 /* PB15 periph A */
|
||||
1 16 0x1 0x0 /* PB16 periph A */
|
||||
1 17 0x1 0x0>; /* PB17 periph A */
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -290,6 +303,22 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0 {
|
||||
pinctrl_ssc0_tx: ssc0_tx-0 {
|
||||
atmel,pins =
|
||||
<0 24 0x2 0x0 /* PA24 periph B */
|
||||
0 25 0x2 0x0 /* PA25 periph B */
|
||||
0 26 0x2 0x0>; /* PA26 periph B */
|
||||
};
|
||||
|
||||
pinctrl_ssc0_rx: ssc0_rx-0 {
|
||||
atmel,pins =
|
||||
<0 27 0x2 0x0 /* PA27 periph B */
|
||||
0 28 0x2 0x0 /* PA28 periph B */
|
||||
0 29 0x2 0x0>; /* PA29 periph B */
|
||||
};
|
||||
};
|
||||
|
||||
pioA: gpio@fffff400 {
|
||||
compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
|
||||
reg = <0xfffff400 0x200>;
|
||||
|
@ -333,6 +362,15 @@
|
|||
};
|
||||
};
|
||||
|
||||
ssc0: ssc@f0010000 {
|
||||
compatible = "atmel,at91sam9g45-ssc";
|
||||
reg = <0xf0010000 0x4000>;
|
||||
interrupts = <28 4 5>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc0: mmc@f0008000 {
|
||||
compatible = "atmel,hsmci";
|
||||
reg = <0xf0008000 0x600>;
|
||||
|
|
|
@ -96,8 +96,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
@ -120,8 +120,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
@ -141,8 +141,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
|
|
@ -170,7 +170,9 @@
|
|||
gpio-bank = <8>;
|
||||
};
|
||||
|
||||
pinctrl {
|
||||
pinctrl@80157000 {
|
||||
// This is actually the PRCMU base address
|
||||
reg = <0x80157000 0x2000>;
|
||||
compatible = "stericsson,nmk_pinctrl";
|
||||
};
|
||||
|
||||
|
|
|
@ -26,10 +26,15 @@
|
|||
};
|
||||
|
||||
&uart0 { status = "okay"; };
|
||||
&sdio0 { status = "okay"; };
|
||||
&sata0 { status = "okay"; };
|
||||
&i2c0 { status = "okay"; };
|
||||
|
||||
&sdio0 {
|
||||
status = "okay";
|
||||
/* sdio0 card detect is connected to wrong pin on CuBox */
|
||||
cd-gpios = <&gpio0 12 1>;
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "okay";
|
||||
|
||||
|
@ -42,9 +47,14 @@
|
|||
};
|
||||
|
||||
&pinctrl {
|
||||
pinctrl-0 = <&pmx_gpio_18>;
|
||||
pinctrl-0 = <&pmx_gpio_12 &pmx_gpio_18>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_gpio_12: pmx-gpio-12 {
|
||||
marvell,pins = "mpp12";
|
||||
marvell,function = "gpio";
|
||||
};
|
||||
|
||||
pmx_gpio_18: pmx-gpio-18 {
|
||||
marvell,pins = "mpp18";
|
||||
marvell,function = "gpio";
|
||||
|
|
|
@ -117,6 +117,7 @@
|
|||
pinctrl: pinctrl@d0200 {
|
||||
compatible = "marvell,dove-pinctrl";
|
||||
reg = <0xd0200 0x10>;
|
||||
clocks = <&gate_clk 22>;
|
||||
};
|
||||
|
||||
spi0: spi@10600 {
|
||||
|
|
|
@ -32,6 +32,7 @@
|
|||
|
||||
cpu@0 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
@ -39,6 +40,7 @@
|
|||
|
||||
cpu@1 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <1>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
@ -46,6 +48,7 @@
|
|||
|
||||
cpu@2 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
@ -53,6 +56,7 @@
|
|||
|
||||
cpu@3 {
|
||||
compatible = "arm,cortex-a15";
|
||||
device_type = "cpu";
|
||||
reg = <3>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC2,115200 init=/linuxrc";
|
||||
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x41000000,8M console=ttySAC1,115200 init=/linuxrc";
|
||||
};
|
||||
|
||||
sdhci@12530000 {
|
||||
|
|
|
@ -115,8 +115,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
@ -139,8 +139,8 @@
|
|||
fifo-depth = <0x80>;
|
||||
card-detect-delay = <200>;
|
||||
samsung,dw-mshc-ciu-div = <3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2 3>;
|
||||
samsung,dw-mshc-sdr-timing = <2 3>;
|
||||
samsung,dw-mshc-ddr-timing = <1 2>;
|
||||
|
||||
slot@0 {
|
||||
reg = <0>;
|
||||
|
|
|
@ -574,7 +574,7 @@
|
|||
|
||||
hdmi {
|
||||
compatible = "samsung,exynos5-hdmi";
|
||||
reg = <0x14530000 0x100000>;
|
||||
reg = <0x14530000 0x70000>;
|
||||
interrupts = <0 95 0>;
|
||||
};
|
||||
|
||||
|
|
|
@ -21,7 +21,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC2,115200 init=/linuxrc";
|
||||
bootargs = "root=/dev/ram0 rw ramdisk=8192 initrd=0x81000000,8M console=ttySAC0,115200 init=/linuxrc";
|
||||
};
|
||||
|
||||
spi {
|
||||
|
|
|
@ -30,33 +30,37 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
cpu@900 {
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0>;
|
||||
device_type = "cpu";
|
||||
reg = <0x900>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
cpu@901 {
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <1>;
|
||||
device_type = "cpu";
|
||||
reg = <0x901>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
cpu@902 {
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <2>;
|
||||
device_type = "cpu";
|
||||
reg = <0x902>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
};
|
||||
|
||||
cpu@3 {
|
||||
cpu@903 {
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <3>;
|
||||
device_type = "cpu";
|
||||
reg = <0x903>;
|
||||
next-level-cache = <&L2>;
|
||||
clocks = <&a9pll>;
|
||||
clock-names = "cpu";
|
||||
|
|
|
@ -39,17 +39,17 @@
|
|||
hog_pins_a: hog@0 {
|
||||
reg = <0>;
|
||||
fsl,pinmux-ids = <
|
||||
0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
|
||||
0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
|
||||
>;
|
||||
fsl,drive-strength = <0>;
|
||||
fsl,voltage = <1>;
|
||||
fsl,pull-up = <0>;
|
||||
};
|
||||
|
||||
led_pin_gpio0_17: led_gpio0_17@0 {
|
||||
led_pin_gpio2_1: led_gpio2_1@0 {
|
||||
reg = <0>;
|
||||
fsl,pinmux-ids = <
|
||||
0x0113 /* MX23_PAD_GPMI_ALE__GPIO_0_17 */
|
||||
0x2013 /* MX23_PAD_SSP1_DETECT__GPIO_2_1 */
|
||||
>;
|
||||
fsl,drive-strength = <0>;
|
||||
fsl,voltage = <1>;
|
||||
|
@ -110,7 +110,7 @@
|
|||
leds {
|
||||
compatible = "gpio-leds";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&led_pin_gpio0_17>;
|
||||
pinctrl-0 = <&led_pin_gpio2_1>;
|
||||
|
||||
user {
|
||||
label = "green";
|
||||
|
|
|
@ -14,7 +14,7 @@
|
|||
|
||||
/ {
|
||||
model = "Buglabs i.MX31 Bug 1.x";
|
||||
compatible = "fsl,imx31-bug", "fsl,imx31";
|
||||
compatible = "buglabs,imx31-bug", "fsl,imx31";
|
||||
|
||||
memory {
|
||||
reg = <0x80000000 0x8000000>; /* 128M */
|
||||
|
|
|
@ -492,7 +492,7 @@
|
|||
compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan";
|
||||
reg = <0x53fcc000 0x4000>;
|
||||
interrupts = <83>;
|
||||
clocks = <&clks 158>, <&clks 157>;
|
||||
clocks = <&clks 87>, <&clks 86>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -39,6 +39,7 @@
|
|||
#size-cells = <0>;
|
||||
interrupts = <32>;
|
||||
clock-frequency = <100000>;
|
||||
clocks = <&gate_clk 7>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -1,4 +1,5 @@
|
|||
/include/ "kirkwood.dtsi"
|
||||
/include/ "kirkwood-6281.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
|
@ -6,6 +7,21 @@
|
|||
};
|
||||
|
||||
ocp@f1000000 {
|
||||
pinctrl: pinctrl@10000 {
|
||||
pinctrl-0 = < &pmx_spi &pmx_twsi0 &pmx_uart0
|
||||
&pmx_ns2_sata0 &pmx_ns2_sata1>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
pmx_ns2_sata0: pmx-ns2-sata0 {
|
||||
marvell,pins = "mpp21";
|
||||
marvell,function = "sata0";
|
||||
};
|
||||
pmx_ns2_sata1: pmx-ns2-sata1 {
|
||||
marvell,pins = "mpp20";
|
||||
marvell,function = "sata1";
|
||||
};
|
||||
};
|
||||
|
||||
serial@12000 {
|
||||
clock-frequency = <166666667>;
|
||||
status = "okay";
|
||||
|
|
|
@ -82,4 +82,21 @@
|
|||
gpios = <&gpio1 16 1>;
|
||||
};
|
||||
};
|
||||
regulators {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
sata0_power: regulator@1 {
|
||||
compatible = "regulator-fixed";
|
||||
reg = <1>;
|
||||
regulator-name = "SATA0 Power";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
enable-active-high;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpio = <&gpio1 4 0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -36,6 +36,7 @@
|
|||
reg = <0x10100 0x40>;
|
||||
ngpios = <32>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <35>, <36>, <37>, <38>;
|
||||
};
|
||||
|
||||
|
@ -46,6 +47,7 @@
|
|||
reg = <0x10140 0x40>;
|
||||
ngpios = <18>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
interrupts = <39>, <40>, <41>;
|
||||
};
|
||||
|
||||
|
@ -144,6 +146,7 @@
|
|||
compatible = "marvell,orion-ehci";
|
||||
reg = <0x50000 0x1000>;
|
||||
interrupts = <19>;
|
||||
clocks = <&gate_clk 3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -48,6 +48,8 @@
|
|||
|
||||
macb0: ethernet@fffc4000 {
|
||||
phy-mode = "mii";
|
||||
pinctrl-0 = <&pinctrl_macb_rmii
|
||||
&pinctrl_macb_rmii_mii_alt>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
|
|
@ -60,19 +60,21 @@
|
|||
};
|
||||
|
||||
uart0: uart@01c28000 {
|
||||
compatible = "ns8250";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x01c28000 0x400>;
|
||||
interrupts = <1>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <24000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: uart@01c28400 {
|
||||
compatible = "ns8250";
|
||||
compatible = "snps,dw-apb-uart";
|
||||
reg = <0x01c28400 0x400>;
|
||||
interrupts = <2>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clock-frequency = <24000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -45,7 +45,6 @@
|
|||
reg = <1>;
|
||||
};
|
||||
|
||||
/* A7s disabled till big.LITTLE patches are available...
|
||||
cpu2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
|
@ -63,7 +62,6 @@
|
|||
compatible = "arm,cortex-a7";
|
||||
reg = <0x102>;
|
||||
};
|
||||
*/
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
|
|
|
@ -686,8 +686,7 @@ sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
|
|||
* %-EINVAL no platform data passed
|
||||
* %0 successful.
|
||||
*/
|
||||
static int __devinit
|
||||
__sa1111_probe(struct device *me, struct resource *mem, int irq)
|
||||
static int __sa1111_probe(struct device *me, struct resource *mem, int irq)
|
||||
{
|
||||
struct sa1111_platform_data *pd = me->platform_data;
|
||||
struct sa1111 *sachip;
|
||||
|
@ -1011,7 +1010,7 @@ static int sa1111_resume(struct platform_device *dev)
|
|||
#define sa1111_resume NULL
|
||||
#endif
|
||||
|
||||
static int __devinit sa1111_probe(struct platform_device *pdev)
|
||||
static int sa1111_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct resource *mem;
|
||||
int irq;
|
||||
|
|
|
@ -176,7 +176,7 @@ static int scoop_resume(struct platform_device *dev)
|
|||
#define scoop_resume NULL
|
||||
#endif
|
||||
|
||||
static int __devinit scoop_probe(struct platform_device *pdev)
|
||||
static int scoop_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct scoop_dev *devptr;
|
||||
struct scoop_config *inf;
|
||||
|
@ -243,7 +243,7 @@ err_ioremap:
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __devexit scoop_remove(struct platform_device *pdev)
|
||||
static int scoop_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct scoop_dev *sdev = platform_get_drvdata(pdev);
|
||||
int ret;
|
||||
|
@ -268,7 +268,7 @@ static int __devexit scoop_remove(struct platform_device *pdev)
|
|||
|
||||
static struct platform_driver scoop_driver = {
|
||||
.probe = scoop_probe,
|
||||
.remove = __devexit_p(scoop_remove),
|
||||
.remove = scoop_remove,
|
||||
.suspend = scoop_suspend,
|
||||
.resume = scoop_resume,
|
||||
.driver = {
|
||||
|
|
|
@ -206,6 +206,7 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
|
|||
struct device_node *node)
|
||||
{
|
||||
struct vic_device *v;
|
||||
int i;
|
||||
|
||||
if (vic_id >= ARRAY_SIZE(vic_devices)) {
|
||||
printk(KERN_ERR "%s: too few VICs, increase CONFIG_ARM_VIC_NR\n", __func__);
|
||||
|
@ -220,6 +221,10 @@ static void __init vic_register(void __iomem *base, unsigned int irq,
|
|||
vic_id++;
|
||||
v->domain = irq_domain_add_simple(node, fls(valid_sources), irq,
|
||||
&vic_irqdomain_ops, v);
|
||||
/* create an IRQ mapping for each valid IRQ */
|
||||
for (i = 0; i < fls(valid_sources); i++)
|
||||
if (valid_sources & (1 << i))
|
||||
irq_create_mapping(v->domain, i);
|
||||
}
|
||||
|
||||
static void vic_ack_irq(struct irq_data *d)
|
||||
|
@ -416,9 +421,9 @@ int __init vic_of_init(struct device_node *node, struct device_node *parent)
|
|||
return -EIO;
|
||||
|
||||
/*
|
||||
* Passing -1 as first IRQ makes the simple domain allocate descriptors
|
||||
* Passing 0 as first IRQ makes the simple domain allocate descriptors
|
||||
*/
|
||||
__vic_init(regs, -1, ~0, ~0, node);
|
||||
__vic_init(regs, 0, ~0, ~0, node);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -19,6 +19,7 @@ CONFIG_SOC_AT91SAM9260=y
|
|||
CONFIG_SOC_AT91SAM9263=y
|
||||
CONFIG_SOC_AT91SAM9G45=y
|
||||
CONFIG_SOC_AT91SAM9X5=y
|
||||
CONFIG_SOC_AT91SAM9N12=y
|
||||
CONFIG_MACH_AT91SAM_DT=y
|
||||
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
|
||||
CONFIG_AT91_TIMER_HZ=128
|
||||
|
@ -31,7 +32,7 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
|
|||
CONFIG_ZBOOT_ROM_BSS=0x0
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
CONFIG_ARM_ATAG_DTB_COMPAT=y
|
||||
CONFIG_CMDLINE="mem=128M console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
|
||||
CONFIG_CMDLINE="console=ttyS0,115200 initrd=0x21100000,25165824 root=/dev/ram0 rw"
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
|
||||
|
|
|
@ -33,9 +33,7 @@ CONFIG_MVNETA=y
|
|||
CONFIG_MARVELL_PHY=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_MV64XXX=y
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
|
|
|
@ -78,7 +78,7 @@ void pcibios_report_status(u_int status_mask, int warn)
|
|||
* Bug 3 is responsible for the sound DMA grinding to a halt. We now
|
||||
* live with bug 2.
|
||||
*/
|
||||
static void __devinit pci_fixup_83c553(struct pci_dev *dev)
|
||||
static void pci_fixup_83c553(struct pci_dev *dev)
|
||||
{
|
||||
/*
|
||||
* Set memory region to start at address 0, and enable IO
|
||||
|
@ -130,7 +130,7 @@ static void __devinit pci_fixup_83c553(struct pci_dev *dev)
|
|||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, pci_fixup_83c553);
|
||||
|
||||
static void __devinit pci_fixup_unassign(struct pci_dev *dev)
|
||||
static void pci_fixup_unassign(struct pci_dev *dev)
|
||||
{
|
||||
dev->resource[0].end -= dev->resource[0].start;
|
||||
dev->resource[0].start = 0;
|
||||
|
@ -142,7 +142,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_89C940F,
|
|||
* if it is the host bridge by marking it as such. These resources are of
|
||||
* no consequence to the PCI layer (they are handled elsewhere).
|
||||
*/
|
||||
static void __devinit pci_fixup_dec21285(struct pci_dev *dev)
|
||||
static void pci_fixup_dec21285(struct pci_dev *dev)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
@ -161,7 +161,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_d
|
|||
/*
|
||||
* PCI IDE controllers use non-standard I/O port decoding, respect it.
|
||||
*/
|
||||
static void __devinit pci_fixup_ide_bases(struct pci_dev *dev)
|
||||
static void pci_fixup_ide_bases(struct pci_dev *dev)
|
||||
{
|
||||
struct resource *r;
|
||||
int i;
|
||||
|
@ -182,7 +182,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
|
|||
/*
|
||||
* Put the DEC21142 to sleep
|
||||
*/
|
||||
static void __devinit pci_fixup_dec21142(struct pci_dev *dev)
|
||||
static void pci_fixup_dec21142(struct pci_dev *dev)
|
||||
{
|
||||
pci_write_config_dword(dev, 0x40, 0x80000000);
|
||||
}
|
||||
|
@ -204,7 +204,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142, pci_fixup_d
|
|||
* functional. However, The CY82C693U _does not work_ in bus
|
||||
* master mode without locking the PCI bus solid.
|
||||
*/
|
||||
static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
|
||||
static void pci_fixup_cy82c693(struct pci_dev *dev)
|
||||
{
|
||||
if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
|
||||
u32 base0, base1;
|
||||
|
@ -254,7 +254,7 @@ static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
|
|||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693, pci_fixup_cy82c693);
|
||||
|
||||
static void __devinit pci_fixup_it8152(struct pci_dev *dev)
|
||||
static void pci_fixup_it8152(struct pci_dev *dev)
|
||||
{
|
||||
int i;
|
||||
/* fixup for ITE 8152 devices */
|
||||
|
@ -361,9 +361,7 @@ void pcibios_fixup_bus(struct pci_bus *bus)
|
|||
printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n",
|
||||
bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis");
|
||||
}
|
||||
#ifdef CONFIG_HOTPLUG
|
||||
EXPORT_SYMBOL(pcibios_fixup_bus);
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Swizzle the device pin each time we cross a bridge. If a platform does
|
||||
|
@ -380,7 +378,7 @@ EXPORT_SYMBOL(pcibios_fixup_bus);
|
|||
* PCI standard swizzle is implemented on plug-in cards and Cardbus based
|
||||
* PCI extenders, so it can not be ignored.
|
||||
*/
|
||||
static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin)
|
||||
static u8 pcibios_swizzle(struct pci_dev *dev, u8 *pin)
|
||||
{
|
||||
struct pci_sys_data *sys = dev->sysdata;
|
||||
int slot, oldpin = *pin;
|
||||
|
|
|
@ -100,12 +100,14 @@ ENTRY(printch)
|
|||
b 1b
|
||||
ENDPROC(printch)
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
ENTRY(debug_ll_addr)
|
||||
addruart r2, r3, ip
|
||||
str r2, [r0]
|
||||
str r3, [r1]
|
||||
mov pc, lr
|
||||
ENDPROC(debug_ll_addr)
|
||||
#endif
|
||||
|
||||
#else
|
||||
|
||||
|
|
|
@ -339,7 +339,7 @@ static struct miscdevice etb_miscdev = {
|
|||
.fops = &etb_fops,
|
||||
};
|
||||
|
||||
static int __devinit etb_probe(struct amba_device *dev, const struct amba_id *id)
|
||||
static int etb_probe(struct amba_device *dev, const struct amba_id *id)
|
||||
{
|
||||
struct tracectx *t = &tracer;
|
||||
int ret = 0;
|
||||
|
@ -531,7 +531,7 @@ static ssize_t trace_mode_store(struct kobject *kobj,
|
|||
static struct kobj_attribute trace_mode_attr =
|
||||
__ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store);
|
||||
|
||||
static int __devinit etm_probe(struct amba_device *dev, const struct amba_id *id)
|
||||
static int etm_probe(struct amba_device *dev, const struct amba_id *id)
|
||||
{
|
||||
struct tracectx *t = &tracer;
|
||||
int ret = 0;
|
||||
|
|
|
@ -246,6 +246,7 @@ __create_page_tables:
|
|||
|
||||
/*
|
||||
* Then map boot params address in r2 if specified.
|
||||
* We map 2 sections in case the ATAGs/DTB crosses a section boundary.
|
||||
*/
|
||||
mov r0, r2, lsr #SECTION_SHIFT
|
||||
movs r0, r0, lsl #SECTION_SHIFT
|
||||
|
@ -253,6 +254,8 @@ __create_page_tables:
|
|||
addne r3, r3, #PAGE_OFFSET
|
||||
addne r3, r4, r3, lsr #(SECTION_SHIFT - PMD_ORDER)
|
||||
orrne r6, r7, r0
|
||||
strne r6, [r3], #1 << PMD_ORDER
|
||||
addne r6, r6, #1 << SECTION_SHIFT
|
||||
strne r6, [r3]
|
||||
|
||||
#ifdef CONFIG_DEBUG_LL
|
||||
|
@ -331,7 +334,7 @@ ENTRY(secondary_startup)
|
|||
* as it has already been validated by the primary processor.
|
||||
*/
|
||||
#ifdef CONFIG_ARM_VIRT_EXT
|
||||
bl __hyp_stub_install
|
||||
bl __hyp_stub_install_secondary
|
||||
#endif
|
||||
safe_svcmode_maskall r9
|
||||
|
||||
|
|
|
@ -99,7 +99,7 @@ ENTRY(__hyp_stub_install_secondary)
|
|||
* immediately.
|
||||
*/
|
||||
compare_cpu_mode_with_primary r4, r5, r6, r7
|
||||
bxne lr
|
||||
movne pc, lr
|
||||
|
||||
/*
|
||||
* Once we have given up on one CPU, we do not try to install the
|
||||
|
@ -111,7 +111,7 @@ ENTRY(__hyp_stub_install_secondary)
|
|||
*/
|
||||
|
||||
cmp r4, #HYP_MODE
|
||||
bxne lr @ give up if the CPU is not in HYP mode
|
||||
movne pc, lr @ give up if the CPU is not in HYP mode
|
||||
|
||||
/*
|
||||
* Configure HSCTLR to set correct exception endianness/instruction set
|
||||
|
@ -120,7 +120,8 @@ ENTRY(__hyp_stub_install_secondary)
|
|||
* Eventually, CPU-specific code might be needed -- assume not for now
|
||||
*
|
||||
* This code relies on the "eret" instruction to synchronize the
|
||||
* various coprocessor accesses.
|
||||
* various coprocessor accesses. This is done when we switch to SVC
|
||||
* (see safe_svcmode_maskall).
|
||||
*/
|
||||
@ Now install the hypervisor stub:
|
||||
adr r7, __hyp_stub_vectors
|
||||
|
@ -155,14 +156,7 @@ THUMB( orr r7, #(1 << 30) ) @ HSCTLR.TE
|
|||
1:
|
||||
#endif
|
||||
|
||||
bic r7, r4, #MODE_MASK
|
||||
orr r7, r7, #SVC_MODE
|
||||
THUMB( orr r7, r7, #PSR_T_BIT )
|
||||
msr spsr_cxsf, r7 @ This is SPSR_hyp.
|
||||
|
||||
__MSR_ELR_HYP(14) @ msr elr_hyp, lr
|
||||
__ERET @ return, switching to SVC mode
|
||||
@ The boot CPU mode is left in r4.
|
||||
bx lr @ The boot CPU mode is left in r4.
|
||||
ENDPROC(__hyp_stub_install_secondary)
|
||||
|
||||
__hyp_stub_do_trap:
|
||||
|
@ -200,7 +194,7 @@ ENDPROC(__hyp_get_vectors)
|
|||
@ fall through
|
||||
ENTRY(__hyp_set_vectors)
|
||||
__HVC(0)
|
||||
bx lr
|
||||
mov pc, lr
|
||||
ENDPROC(__hyp_set_vectors)
|
||||
|
||||
#ifndef ZIMAGE
|
||||
|
|
|
@ -132,7 +132,7 @@ static int cpu_pmu_request_irq(struct arm_pmu *cpu_pmu, irq_handler_t handler)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void __devinit cpu_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static void cpu_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
int cpu;
|
||||
for_each_possible_cpu(cpu) {
|
||||
|
@ -178,7 +178,7 @@ static struct notifier_block __cpuinitdata cpu_pmu_hotplug_notifier = {
|
|||
/*
|
||||
* PMU platform driver and devicetree bindings.
|
||||
*/
|
||||
static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = {
|
||||
static struct of_device_id cpu_pmu_of_device_ids[] = {
|
||||
{.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
|
||||
{.compatible = "arm,cortex-a9-pmu", .data = armv7_a9_pmu_init},
|
||||
{.compatible = "arm,cortex-a8-pmu", .data = armv7_a8_pmu_init},
|
||||
|
@ -190,7 +190,7 @@ static struct of_device_id __devinitdata cpu_pmu_of_device_ids[] = {
|
|||
{},
|
||||
};
|
||||
|
||||
static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = {
|
||||
static struct platform_device_id cpu_pmu_plat_device_ids[] = {
|
||||
{.name = "arm-pmu"},
|
||||
{},
|
||||
};
|
||||
|
@ -198,7 +198,7 @@ static struct platform_device_id __devinitdata cpu_pmu_plat_device_ids[] = {
|
|||
/*
|
||||
* CPU PMU identification and probing.
|
||||
*/
|
||||
static int __devinit probe_current_pmu(struct arm_pmu *pmu)
|
||||
static int probe_current_pmu(struct arm_pmu *pmu)
|
||||
{
|
||||
int cpu = get_cpu();
|
||||
unsigned long cpuid = read_cpuid_id();
|
||||
|
@ -252,7 +252,7 @@ static int __devinit probe_current_pmu(struct arm_pmu *pmu)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int __devinit cpu_pmu_device_probe(struct platform_device *pdev)
|
||||
static int cpu_pmu_device_probe(struct platform_device *pdev)
|
||||
{
|
||||
const struct of_device_id *of_id;
|
||||
int (*init_fn)(struct arm_pmu *);
|
||||
|
|
|
@ -653,7 +653,7 @@ static int armv6_map_event(struct perf_event *event)
|
|||
&armv6_perf_cache_map, 0xFF);
|
||||
}
|
||||
|
||||
static int __devinit armv6pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv6pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
cpu_pmu->name = "v6";
|
||||
cpu_pmu->handle_irq = armv6pmu_handle_irq;
|
||||
|
@ -685,7 +685,7 @@ static int armv6mpcore_map_event(struct perf_event *event)
|
|||
&armv6mpcore_perf_cache_map, 0xFF);
|
||||
}
|
||||
|
||||
static int __devinit armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv6mpcore_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
cpu_pmu->name = "v6mpcore";
|
||||
cpu_pmu->handle_irq = armv6pmu_handle_irq;
|
||||
|
|
|
@ -1226,7 +1226,7 @@ static void armv7pmu_init(struct arm_pmu *cpu_pmu)
|
|||
cpu_pmu->max_period = (1LLU << 32) - 1;
|
||||
};
|
||||
|
||||
static u32 __devinit armv7_read_num_pmnc_events(void)
|
||||
static u32 armv7_read_num_pmnc_events(void)
|
||||
{
|
||||
u32 nb_cnt;
|
||||
|
||||
|
@ -1237,7 +1237,7 @@ static u32 __devinit armv7_read_num_pmnc_events(void)
|
|||
return nb_cnt + 1;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A8";
|
||||
|
@ -1246,7 +1246,7 @@ static int __devinit armv7_a8_pmu_init(struct arm_pmu *cpu_pmu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A9";
|
||||
|
@ -1255,7 +1255,7 @@ static int __devinit armv7_a9_pmu_init(struct arm_pmu *cpu_pmu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A5";
|
||||
|
@ -1264,7 +1264,7 @@ static int __devinit armv7_a5_pmu_init(struct arm_pmu *cpu_pmu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A15";
|
||||
|
@ -1274,7 +1274,7 @@ static int __devinit armv7_a15_pmu_init(struct arm_pmu *cpu_pmu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devinit armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int armv7_a7_pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
armv7pmu_init(cpu_pmu);
|
||||
cpu_pmu->name = "ARMv7 Cortex-A7";
|
||||
|
|
|
@ -440,7 +440,7 @@ static int xscale_map_event(struct perf_event *event)
|
|||
&xscale_perf_cache_map, 0xFF);
|
||||
}
|
||||
|
||||
static int __devinit xscale1pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int xscale1pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
cpu_pmu->name = "xscale1";
|
||||
cpu_pmu->handle_irq = xscale1pmu_handle_irq;
|
||||
|
@ -810,7 +810,7 @@ static inline void xscale2pmu_write_counter(struct perf_event *event, u32 val)
|
|||
}
|
||||
}
|
||||
|
||||
static int __devinit xscale2pmu_init(struct arm_pmu *cpu_pmu)
|
||||
static int xscale2pmu_init(struct arm_pmu *cpu_pmu)
|
||||
{
|
||||
cpu_pmu->name = "xscale2";
|
||||
cpu_pmu->handle_irq = xscale2pmu_handle_irq;
|
||||
|
|
|
@ -105,6 +105,8 @@ static void __init soc_detect(u32 dbgu_base)
|
|||
switch (socid) {
|
||||
case ARCH_ID_AT91RM9200:
|
||||
at91_soc_initdata.type = AT91_SOC_RM9200;
|
||||
if (at91_soc_initdata.subtype == AT91_SOC_SUBTYPE_NONE)
|
||||
at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA;
|
||||
at91_boot_soc = at91rm9200_soc;
|
||||
break;
|
||||
|
||||
|
|
|
@ -358,7 +358,7 @@ static int cpld_video_probe(struct i2c_client *client,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devexit cpld_video_remove(struct i2c_client *client)
|
||||
static int cpld_video_remove(struct i2c_client *client)
|
||||
{
|
||||
cpld_client = NULL;
|
||||
return 0;
|
||||
|
|
|
@ -256,7 +256,7 @@ static int cdce_probe(struct i2c_client *client,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __devexit cdce_remove(struct i2c_client *client)
|
||||
static int cdce_remove(struct i2c_client *client)
|
||||
{
|
||||
cdce_i2c_client = NULL;
|
||||
return 0;
|
||||
|
@ -274,7 +274,7 @@ static struct i2c_driver cdce_driver = {
|
|||
.name = "cdce949",
|
||||
},
|
||||
.probe = cdce_probe,
|
||||
.remove = __devexit_p(cdce_remove),
|
||||
.remove = cdce_remove,
|
||||
.id_table = cdce_id,
|
||||
};
|
||||
|
||||
|
|
|
@ -135,7 +135,7 @@ static struct pci_ops pcie_ops = {
|
|||
.write = pcie_wr_conf,
|
||||
};
|
||||
|
||||
static void __devinit rc_pci_fixup(struct pci_dev *dev)
|
||||
static void rc_pci_fixup(struct pci_dev *dev)
|
||||
{
|
||||
/*
|
||||
* Prevent enumeration of root complex.
|
||||
|
|
|
@ -74,6 +74,8 @@ config SOC_EXYNOS5440
|
|||
depends on ARCH_EXYNOS5
|
||||
select ARM_ARCH_TIMER
|
||||
select AUTO_ZRELADDR
|
||||
select PINCTRL
|
||||
select PINCTRL_EXYNOS5440
|
||||
help
|
||||
Enable EXYNOS5440 SoC support
|
||||
|
||||
|
|
|
@ -424,11 +424,18 @@ static void __init exynos5_init_clocks(int xtal)
|
|||
{
|
||||
printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
|
||||
|
||||
/* EXYNOS5440 can support only common clock framework */
|
||||
|
||||
if (soc_is_exynos5440())
|
||||
return;
|
||||
|
||||
#ifdef CONFIG_SOC_EXYNOS5250
|
||||
s3c24xx_register_baseclocks(xtal);
|
||||
s5p_register_clocks(xtal);
|
||||
|
||||
exynos5_register_clocks();
|
||||
exynos5_setup_clocks();
|
||||
#endif
|
||||
}
|
||||
|
||||
#define COMBINER_ENABLE_SET 0x0
|
||||
|
|
|
@ -135,7 +135,7 @@ static struct sys_timer highbank_timer = {
|
|||
|
||||
static void highbank_power_off(void)
|
||||
{
|
||||
hignbank_set_pwr_shutdown();
|
||||
highbank_set_pwr_shutdown();
|
||||
|
||||
while (1)
|
||||
cpu_do_idle();
|
||||
|
|
|
@ -30,7 +30,7 @@ void __ref highbank_cpu_die(unsigned int cpu)
|
|||
{
|
||||
flush_cache_all();
|
||||
|
||||
highbank_set_cpu_jump(cpu, secondary_startup);
|
||||
highbank_set_cpu_jump(cpu, phys_to_virt(0));
|
||||
highbank_set_core_pwr();
|
||||
|
||||
cpu_do_idle();
|
||||
|
|
|
@ -32,6 +32,7 @@ static void __cpuinit highbank_secondary_init(unsigned int cpu)
|
|||
|
||||
static int __cpuinit highbank_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
||||
{
|
||||
highbank_set_cpu_jump(cpu, secondary_startup);
|
||||
gic_raise_softirq(cpumask_of(cpu), 0);
|
||||
return 0;
|
||||
}
|
||||
|
@ -61,19 +62,8 @@ static void __init highbank_smp_init_cpus(void)
|
|||
|
||||
static void __init highbank_smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
int i;
|
||||
|
||||
if (scu_base_addr)
|
||||
scu_enable(scu_base_addr);
|
||||
|
||||
/*
|
||||
* Write the address of secondary startup into the jump table
|
||||
* The cores are in wfi and wait until they receive a soft interrupt
|
||||
* and a non-zero value to jump to. Then the secondary CPU branches
|
||||
* to this address.
|
||||
*/
|
||||
for (i = 1; i < max_cpus; i++)
|
||||
highbank_set_cpu_jump(i, secondary_startup);
|
||||
}
|
||||
|
||||
struct smp_operations highbank_smp_ops __initdata = {
|
||||
|
|
|
@ -14,10 +14,12 @@
|
|||
* this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#include <linux/cpu_pm.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/suspend.h>
|
||||
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/proc-fns.h>
|
||||
#include <asm/suspend.h>
|
||||
|
||||
|
@ -26,16 +28,31 @@
|
|||
|
||||
static int highbank_suspend_finish(unsigned long val)
|
||||
{
|
||||
outer_flush_all();
|
||||
outer_disable();
|
||||
|
||||
highbank_set_pwr_suspend();
|
||||
|
||||
cpu_do_idle();
|
||||
|
||||
highbank_clear_pwr_request();
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int highbank_pm_enter(suspend_state_t state)
|
||||
{
|
||||
hignbank_set_pwr_suspend();
|
||||
cpu_pm_enter();
|
||||
cpu_cluster_pm_enter();
|
||||
|
||||
highbank_set_cpu_jump(0, cpu_resume);
|
||||
cpu_suspend(0, highbank_suspend_finish);
|
||||
|
||||
cpu_cluster_pm_exit();
|
||||
cpu_pm_exit();
|
||||
|
||||
highbank_smc1(0x102, 0x1);
|
||||
if (scu_base_addr)
|
||||
scu_enable(scu_base_addr);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -44,28 +44,43 @@ static inline void highbank_set_core_pwr(void)
|
|||
writel_relaxed(1, sregs_base + SREG_CPU_PWR_CTRL(cpu));
|
||||
}
|
||||
|
||||
static inline void hignbank_set_pwr_suspend(void)
|
||||
static inline void highbank_clear_core_pwr(void)
|
||||
{
|
||||
int cpu = cpu_logical_map(smp_processor_id());
|
||||
if (scu_base_addr)
|
||||
scu_power_mode(scu_base_addr, SCU_PM_NORMAL);
|
||||
else
|
||||
writel_relaxed(0, sregs_base + SREG_CPU_PWR_CTRL(cpu));
|
||||
}
|
||||
|
||||
static inline void highbank_set_pwr_suspend(void)
|
||||
{
|
||||
writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_set_core_pwr();
|
||||
}
|
||||
|
||||
static inline void hignbank_set_pwr_shutdown(void)
|
||||
static inline void highbank_set_pwr_shutdown(void)
|
||||
{
|
||||
writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_set_core_pwr();
|
||||
}
|
||||
|
||||
static inline void hignbank_set_pwr_soft_reset(void)
|
||||
static inline void highbank_set_pwr_soft_reset(void)
|
||||
{
|
||||
writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_set_core_pwr();
|
||||
}
|
||||
|
||||
static inline void hignbank_set_pwr_hard_reset(void)
|
||||
static inline void highbank_set_pwr_hard_reset(void)
|
||||
{
|
||||
writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_set_core_pwr();
|
||||
}
|
||||
|
||||
static inline void highbank_clear_pwr_request(void)
|
||||
{
|
||||
writel(~0UL, sregs_base + HB_SREG_A9_PWR_REQ);
|
||||
highbank_clear_core_pwr();
|
||||
}
|
||||
|
||||
#endif
|
||||
|
|
|
@ -22,9 +22,9 @@
|
|||
void highbank_restart(char mode, const char *cmd)
|
||||
{
|
||||
if (mode == 'h')
|
||||
hignbank_set_pwr_hard_reset();
|
||||
highbank_set_pwr_hard_reset();
|
||||
else
|
||||
hignbank_set_pwr_soft_reset();
|
||||
highbank_set_pwr_soft_reset();
|
||||
|
||||
while (1)
|
||||
cpu_do_idle();
|
||||
|
|
|
@ -841,8 +841,6 @@ config SOC_IMX6Q
|
|||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_OPP
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_ERRATA_743622
|
||||
select ARM_ERRATA_751472
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_764369 if SMP
|
||||
select ARM_ERRATA_775420
|
||||
|
@ -853,6 +851,7 @@ config SOC_IMX6Q
|
|||
select HAVE_CAN_FLEXCAN if CAN
|
||||
select HAVE_IMX_GPC
|
||||
select HAVE_IMX_MMDC
|
||||
select HAVE_IMX_SRC
|
||||
select HAVE_SMP
|
||||
select MFD_SYSCON
|
||||
select PINCTRL
|
||||
|
|
|
@ -254,9 +254,9 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
|
||||
/* i.mx25 has the i.mx35 type cspi */
|
||||
clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
|
||||
|
|
|
@ -236,9 +236,9 @@ int __init mx27_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[per4_gate], "per", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.0");
|
||||
|
|
|
@ -139,9 +139,9 @@ int __init mx31_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[usb_div_post], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_div_post], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div_post], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usb_gate], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
|
||||
/* i.mx31 has the i.mx21 type uart */
|
||||
clk_register_clkdev(clk[uart1_gate], "per", "imx21-uart.0");
|
||||
|
|
|
@ -251,9 +251,9 @@ int __init mx35_clocks_init()
|
|||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "imx-udc-mx27");
|
||||
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
|
||||
|
|
|
@ -269,9 +269,9 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
|
|||
clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_per_gate], "per", "imx-udc-mx51");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "imx-udc-mx51");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "imx-udc-mx51");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand");
|
||||
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
|
||||
|
|
|
@ -436,6 +436,9 @@ int __init mx6q_clocks_init(void)
|
|||
for (i = 0; i < ARRAY_SIZE(clks_init_on); i++)
|
||||
clk_prepare_enable(clk[clks_init_on[i]]);
|
||||
|
||||
/* Set initial power mode */
|
||||
imx6q_set_lpm(WAIT_CLOCKED);
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpt");
|
||||
base = of_iomap(np, 0);
|
||||
WARN_ON(!base);
|
||||
|
|
|
@ -142,6 +142,7 @@ extern int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
|
|||
extern void imx6q_clock_map_io(void);
|
||||
|
||||
extern void imx_cpu_die(unsigned int cpu);
|
||||
extern int imx_cpu_kill(unsigned int cpu);
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
extern void imx6q_pm_init(void);
|
||||
|
|
|
@ -188,7 +188,7 @@ static struct cpufreq_driver mxc_driver = {
|
|||
.name = "imx",
|
||||
};
|
||||
|
||||
static int __devinit mxc_cpufreq_driver_init(void)
|
||||
static int mxc_cpufreq_driver_init(void)
|
||||
{
|
||||
return cpufreq_register_driver(&mxc_driver);
|
||||
}
|
||||
|
|
|
@ -63,6 +63,7 @@ struct platform_device *__init imx_add_flexcan(
|
|||
|
||||
#include <linux/fsl_devices.h>
|
||||
struct imx_fsl_usb2_udc_data {
|
||||
const char *devid;
|
||||
resource_size_t iobase;
|
||||
resource_size_t irq;
|
||||
};
|
||||
|
|
|
@ -11,35 +11,36 @@
|
|||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_fsl_usb2_udc_data_entry_single(soc) \
|
||||
#define imx_fsl_usb2_udc_data_entry_single(soc, _devid) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.iobase = soc ## _USB_OTG_BASE_ADDR, \
|
||||
.irq = soc ## _INT_USB_OTG, \
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SOC_IMX25
|
||||
const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX25);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX25, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX25 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX27
|
||||
const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX27);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX27, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX27 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX31
|
||||
const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX31);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX31, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX31 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX35
|
||||
const struct imx_fsl_usb2_udc_data imx35_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX35);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX35, "imx-udc-mx27");
|
||||
#endif /* ifdef CONFIG_SOC_IMX35 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX51
|
||||
const struct imx_fsl_usb2_udc_data imx51_fsl_usb2_udc_data __initconst =
|
||||
imx_fsl_usb2_udc_data_entry_single(MX51);
|
||||
imx_fsl_usb2_udc_data_entry_single(MX51, "imx-udc-mx51");
|
||||
#endif
|
||||
|
||||
struct platform_device *__init imx_add_fsl_usb2_udc(
|
||||
|
@ -57,7 +58,7 @@ struct platform_device *__init imx_add_fsl_usb2_udc(
|
|||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
return imx_add_platform_device_dmamask("fsl-usb2-udc", -1,
|
||||
return imx_add_platform_device_dmamask(data->devid, -1,
|
||||
res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
|
||||
}
|
||||
|
|
|
@ -54,7 +54,7 @@ struct platform_device *__init imx_add_imx_fb(
|
|||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
return imx_add_platform_device_dmamask("imx-fb", 0,
|
||||
return imx_add_platform_device_dmamask(data->devid, 0,
|
||||
res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
|
||||
}
|
||||
|
|
|
@ -46,9 +46,11 @@ static inline void cpu_enter_lowpower(void)
|
|||
void imx_cpu_die(unsigned int cpu)
|
||||
{
|
||||
cpu_enter_lowpower();
|
||||
imx_enable_cpu(cpu, false);
|
||||
|
||||
/* spin here until hardware takes it down */
|
||||
while (1)
|
||||
;
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
||||
int imx_cpu_kill(unsigned int cpu)
|
||||
{
|
||||
imx_enable_cpu(cpu, false);
|
||||
return 1;
|
||||
}
|
||||
|
|
|
@ -22,8 +22,7 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/genalloc.h>
|
||||
|
||||
#include "iram.h"
|
||||
#include "linux/platform_data/imx-iram.h"
|
||||
|
||||
static unsigned long iram_phys_base;
|
||||
static void __iomem *iram_virt_base;
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue