[SPARC64]: Beginnings of SUN4V PCI controller support.
Abstract out IOMMU operations so that we can have a different set of calls on sun4v, which needs to do things through hypervisor calls. Signed-off-by: David S. Miller <davem@davemloft.net>wifi-calibration
David S. Miller
parent
4cce4b7cc5
commit
8f6a93a196
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@ -14,7 +14,7 @@ obj-y := process.o setup.o cpu.o idprom.o \
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power.o sbus.o iommu_common.o sparc64_ksyms.o chmc.o
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obj-$(CONFIG_PCI) += ebus.o isa.o pci_common.o pci_iommu.o \
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pci_psycho.o pci_sabre.o pci_schizo.o
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pci_psycho.o pci_sabre.o pci_schizo.o pci_sun4v.o
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obj-$(CONFIG_SMP) += smp.o trampoline.o
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obj-$(CONFIG_SPARC32_COMPAT) += sys32.o sys_sparc32.o signal32.o
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obj-$(CONFIG_BINFMT_ELF32) += binfmt_elf32.o
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@ -188,6 +188,7 @@ extern void psycho_init(int, char *);
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extern void schizo_init(int, char *);
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extern void schizo_plus_init(int, char *);
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extern void tomatillo_init(int, char *);
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extern void sun4v_pci_init(int, char *);
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static struct {
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char *model_name;
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@ -204,6 +205,7 @@ static struct {
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{ "pci108e,8002", schizo_plus_init },
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{ "SUNW,tomatillo", tomatillo_init },
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{ "pci108e,a801", tomatillo_init },
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{ "SUNW,sun4v-pci", sun4v_pci_init },
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};
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#define PCI_NUM_CONTROLLER_TYPES (sizeof(pci_controller_table) / \
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sizeof(pci_controller_table[0]))
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@ -283,6 +285,12 @@ int __init pcic_present(void)
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return pci_controller_scan(pci_is_controller);
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}
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struct pci_iommu_ops *pci_iommu_ops;
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EXPORT_SYMBOL(pci_iommu_ops);
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extern struct pci_iommu_ops pci_sun4u_iommu_ops,
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pci_sun4v_iommu_ops;
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/* Find each controller in the system, attach and initialize
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* software state structure for each and link into the
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* pci_controller_root. Setup the controller enough such
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@ -290,6 +298,11 @@ int __init pcic_present(void)
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*/
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static void __init pci_controller_probe(void)
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{
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if (tlb_type == hypervisor)
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pci_iommu_ops = &pci_sun4v_iommu_ops;
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else
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pci_iommu_ops = &pci_sun4u_iommu_ops;
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printk("PCI: Probing for controllers.\n");
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pci_controller_scan(pci_controller_init);
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@ -219,7 +219,7 @@ static inline void iommu_free_ctx(struct pci_iommu *iommu, int ctx)
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* DMA for PCI device PDEV. Return non-NULL cpu-side address if
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* successful and set *DMA_ADDRP to the PCI side dma address.
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*/
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void *pci_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp)
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static void *pci_4u_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp)
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{
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struct pcidev_cookie *pcp;
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struct pci_iommu *iommu;
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@ -267,7 +267,7 @@ void *pci_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_ad
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}
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/* Free and unmap a consistent DMA translation. */
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void pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma)
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static void pci_4u_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma)
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{
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struct pcidev_cookie *pcp;
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struct pci_iommu *iommu;
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@ -294,7 +294,7 @@ void pci_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_
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/* Map a single buffer at PTR of SZ bytes for PCI DMA
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* in streaming mode.
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*/
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dma_addr_t pci_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction)
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static dma_addr_t pci_4u_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction)
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{
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struct pcidev_cookie *pcp;
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struct pci_iommu *iommu;
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@ -415,7 +415,7 @@ do_flush_sync:
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}
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/* Unmap a single streaming mode DMA translation. */
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void pci_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
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static void pci_4u_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
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{
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struct pcidev_cookie *pcp;
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struct pci_iommu *iommu;
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@ -548,7 +548,7 @@ static inline void fill_sg(iopte_t *iopte, struct scatterlist *sg,
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* When making changes here, inspect the assembly output. I was having
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* hard time to kepp this routine out of using stack slots for holding variables.
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*/
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int pci_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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static int pci_4u_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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{
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struct pcidev_cookie *pcp;
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struct pci_iommu *iommu;
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@ -635,7 +635,7 @@ bad_no_ctx:
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}
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/* Unmap a set of streaming mode DMA translations. */
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void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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static void pci_4u_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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{
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struct pcidev_cookie *pcp;
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struct pci_iommu *iommu;
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@ -695,7 +695,7 @@ void pci_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems,
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/* Make physical memory consistent for a single
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* streaming mode DMA translation after a transfer.
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*/
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void pci_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
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static void pci_4u_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
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{
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struct pcidev_cookie *pcp;
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struct pci_iommu *iommu;
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@ -735,7 +735,7 @@ void pci_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size
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/* Make physical memory consistent for a set of streaming
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* mode DMA translations after a transfer.
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*/
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void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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static void pci_4u_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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{
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struct pcidev_cookie *pcp;
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struct pci_iommu *iommu;
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@ -776,6 +776,17 @@ void pci_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, i
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spin_unlock_irqrestore(&iommu->lock, flags);
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}
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struct pci_iommu_ops pci_sun4u_iommu_ops = {
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.alloc_consistent = pci_4u_alloc_consistent,
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.free_consistent = pci_4u_free_consistent,
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.map_single = pci_4u_map_single,
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.unmap_single = pci_4u_unmap_single,
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.map_sg = pci_4u_map_sg,
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.unmap_sg = pci_4u_unmap_sg,
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.dma_sync_single_for_cpu = pci_4u_dma_sync_single_for_cpu,
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.dma_sync_sg_for_cpu = pci_4u_dma_sync_sg_for_cpu,
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};
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static void ali_sound_dma_hack(struct pci_dev *pdev, int set_bit)
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{
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struct pci_dev *ali_isa_bridge;
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@ -0,0 +1,74 @@
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/* pci_sun4v.c: SUN4V specific PCI controller support.
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*
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* Copyright (C) 2006 David S. Miller (davem@davemloft.net)
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <asm/pbm.h>
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#include <asm/iommu.h>
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#include <asm/irq.h>
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#include <asm/upa.h>
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#include <asm/pstate.h>
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#include <asm/oplib.h>
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#include <asm/hypervisor.h>
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#include "pci_impl.h"
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#include "iommu_common.h"
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static void *pci_4v_alloc_consistent(struct pci_dev *pdev, size_t size, dma_addr_t *dma_addrp)
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{
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return NULL;
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}
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static void pci_4v_free_consistent(struct pci_dev *pdev, size_t size, void *cpu, dma_addr_t dvma)
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{
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}
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static dma_addr_t pci_4v_map_single(struct pci_dev *pdev, void *ptr, size_t sz, int direction)
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{
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return 0;
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}
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static void pci_4v_unmap_single(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
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{
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}
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static int pci_4v_map_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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{
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return nelems;
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}
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static void pci_4v_unmap_sg(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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{
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}
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static void pci_4v_dma_sync_single_for_cpu(struct pci_dev *pdev, dma_addr_t bus_addr, size_t sz, int direction)
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{
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}
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static void pci_4v_dma_sync_sg_for_cpu(struct pci_dev *pdev, struct scatterlist *sglist, int nelems, int direction)
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{
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}
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struct pci_iommu_ops pci_sun4v_iommu_ops = {
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.alloc_consistent = pci_4v_alloc_consistent,
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.free_consistent = pci_4v_free_consistent,
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.map_single = pci_4v_map_single,
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.unmap_single = pci_4v_unmap_single,
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.map_sg = pci_4v_map_sg,
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.unmap_sg = pci_4v_unmap_sg,
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.dma_sync_single_for_cpu = pci_4v_dma_sync_single_for_cpu,
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.dma_sync_sg_for_cpu = pci_4v_dma_sync_sg_for_cpu,
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};
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void sun4v_pci_init(int node, char *model_name)
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{
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prom_printf("sun4v_pci_init: Implement me.\n");
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prom_halt();
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}
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@ -41,10 +41,26 @@ static inline void pcibios_penalize_isa_irq(int irq, int active)
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struct pci_dev;
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struct pci_iommu_ops {
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void *(*alloc_consistent)(struct pci_dev *, size_t, dma_addr_t *);
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void (*free_consistent)(struct pci_dev *, size_t, void *, dma_addr_t);
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dma_addr_t (*map_single)(struct pci_dev *, void *, size_t, int);
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void (*unmap_single)(struct pci_dev *, dma_addr_t, size_t, int);
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int (*map_sg)(struct pci_dev *, struct scatterlist *, int, int);
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void (*unmap_sg)(struct pci_dev *, struct scatterlist *, int, int);
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void (*dma_sync_single_for_cpu)(struct pci_dev *, dma_addr_t, size_t, int);
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void (*dma_sync_sg_for_cpu)(struct pci_dev *, struct scatterlist *, int, int);
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};
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extern struct pci_iommu_ops *pci_iommu_ops;
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/* Allocate and map kernel buffer using consistent mode DMA for a device.
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* hwdev should be valid struct pci_dev pointer for PCI devices.
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*/
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extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle);
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static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t *dma_handle)
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{
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return pci_iommu_ops->alloc_consistent(hwdev, size, dma_handle);
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}
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/* Free and unmap a consistent DMA buffer.
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* cpu_addr is what was returned from pci_alloc_consistent,
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@ -54,7 +70,10 @@ extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, dma_addr_t
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* References to the memory and mappings associated with cpu_addr/dma_addr
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* past this call are illegal.
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*/
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extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle);
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static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr, dma_addr_t dma_handle)
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{
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return pci_iommu_ops->free_consistent(hwdev, size, vaddr, dma_handle);
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}
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/* Map a single buffer of the indicated size for DMA in streaming mode.
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* The 32-bit bus address to use is returned.
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@ -62,7 +81,10 @@ extern void pci_free_consistent(struct pci_dev *hwdev, size_t size, void *vaddr,
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* Once the device is given the dma address, the device owns this memory
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* until either pci_unmap_single or pci_dma_sync_single_for_cpu is performed.
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*/
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extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction);
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static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size, int direction)
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{
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return pci_iommu_ops->map_single(hwdev, ptr, size, direction);
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}
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/* Unmap a single streaming mode DMA translation. The dma_addr and size
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* must match what was provided for in a previous pci_map_single call. All
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@ -71,7 +93,10 @@ extern dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr, size_t size,
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* After this call, reads by the cpu to the buffer are guaranteed to see
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* whatever the device wrote there.
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*/
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extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction);
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static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t size, int direction)
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{
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pci_iommu_ops->unmap_single(hwdev, dma_addr, size, direction);
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}
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/* No highmem on sparc64, plus we have an IOMMU, so mapping pages is easy. */
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#define pci_map_page(dev, page, off, size, dir) \
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@ -107,15 +132,19 @@ extern void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr, size_t
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* Device ownership issues as mentioned above for pci_map_single are
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* the same here.
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*/
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extern int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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int nents, int direction);
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static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nents, int direction)
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{
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return pci_iommu_ops->map_sg(hwdev, sg, nents, direction);
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}
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/* Unmap a set of streaming mode DMA translations.
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* Again, cpu read rules concerning calls here are the same as for
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* pci_unmap_single() above.
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*/
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extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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int nhwents, int direction);
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static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg, int nhwents, int direction)
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{
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pci_iommu_ops->unmap_sg(hwdev, sg, nhwents, direction);
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}
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/* Make physical memory consistent for a single
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* streaming mode DMA translation after a transfer.
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@ -127,8 +156,10 @@ extern void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,
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* must first perform a pci_dma_sync_for_device, and then the
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* device again owns the buffer.
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*/
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extern void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle,
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size_t size, int direction);
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static inline void pci_dma_sync_single_for_cpu(struct pci_dev *hwdev, dma_addr_t dma_handle, size_t size, int direction)
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{
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pci_iommu_ops->dma_sync_single_for_cpu(hwdev, dma_handle, size, direction);
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}
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static inline void
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pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle,
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@ -144,7 +175,10 @@ pci_dma_sync_single_for_device(struct pci_dev *hwdev, dma_addr_t dma_handle,
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* The same as pci_dma_sync_single_* but for a scatter-gather list,
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* same rules and usage.
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*/
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extern void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction);
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static inline void pci_dma_sync_sg_for_cpu(struct pci_dev *hwdev, struct scatterlist *sg, int nelems, int direction)
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{
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pci_iommu_ops->dma_sync_sg_for_cpu(hwdev, sg, nelems, direction);
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}
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static inline void
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pci_dma_sync_sg_for_device(struct pci_dev *hwdev, struct scatterlist *sg,
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