cpupower: Show Intel turbo ratio support via ./cpupower frequency-info
This adds the last piece missing from turbostat (if called with -v). It shows on Intel machines supporting Turbo Boost how many cores have to be active/idle to enter which boost mode (frequency). Whether the HW really enters these boost modes can be verified via ./cpupower monitor. Signed-off-by: Thomas Renninger <trenn@suse.de> CC: lenb@kernel.org CC: linux@dominikbrodowski.net CC: cpufreq@vger.kernel.org Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
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@ -165,26 +165,56 @@ static int get_boost_mode(unsigned int cpu)
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printf(_(" Supported: %s\n"), support ? _("yes") : _("no"));
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printf(_(" Active: %s\n"), active ? _("yes") : _("no"));
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/* ToDo: Only works for AMD for now... */
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if (cpupower_cpu_info.vendor == X86_VENDOR_AMD &&
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cpupower_cpu_info.family >= 0x10) {
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ret = decode_pstates(cpu, cpupower_cpu_info.family, b_states,
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pstates, &pstate_no);
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if (ret)
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return ret;
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} else
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return 0;
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printf(_(" Boost States: %d\n"), b_states);
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printf(_(" Total States: %d\n"), pstate_no);
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for (i = 0; i < pstate_no; i++) {
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if (i < b_states)
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printf(_(" Pstate-Pb%d: %luMHz (boost state)\n"),
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i, pstates[i]);
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printf(_(" Boost States: %d\n"), b_states);
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printf(_(" Total States: %d\n"), pstate_no);
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for (i = 0; i < pstate_no; i++) {
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if (i < b_states)
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printf(_(" Pstate-Pb%d: %luMHz (boost state)"
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"\n"), i, pstates[i]);
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else
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printf(_(" Pstate-P%d: %luMHz\n"),
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i - b_states, pstates[i]);
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}
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} else if (cpupower_cpu_info.caps & CPUPOWER_CAP_HAS_TURBO_RATIO) {
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double bclk;
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unsigned long long intel_turbo_ratio = 0;
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unsigned int ratio;
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/* Any way to autodetect this ? */
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if (cpupower_cpu_info.caps & CPUPOWER_CAP_IS_SNB)
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bclk = 100.00;
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else
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printf(_(" Pstate-P%d: %luMHz\n"),
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i - b_states, pstates[i]);
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bclk = 133.33;
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intel_turbo_ratio = msr_intel_get_turbo_ratio(cpu);
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dprint (" Ratio: 0x%llx - bclk: %f\n",
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intel_turbo_ratio, bclk);
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ratio = (intel_turbo_ratio >> 24) & 0xFF;
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if (ratio)
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printf(_(" %.0f MHz max turbo 4 active cores\n"),
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ratio * bclk);
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ratio = (intel_turbo_ratio >> 16) & 0xFF;
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if (ratio)
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printf(_(" %.0f MHz max turbo 3 active cores\n"),
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ratio * bclk);
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ratio = (intel_turbo_ratio >> 8) & 0xFF;
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if (ratio)
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printf(_(" %.0f MHz max turbo 2 active cores\n"),
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ratio * bclk);
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ratio = (intel_turbo_ratio >> 0) & 0xFF;
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if (ratio)
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printf(_(" %.0f MHz max turbo 1 active cores\n"),
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ratio * bclk);
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}
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return 0;
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}
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@ -130,10 +130,37 @@ out:
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cpu_info->caps |= CPUPOWER_CAP_AMD_CBP;
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}
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/* Intel's perf-bias MSR support */
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if (cpu_info->vendor == X86_VENDOR_INTEL) {
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/* Intel's perf-bias MSR support */
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if (cpuid_level >= 6 && (cpuid_ecx(6) & (1 << 3)))
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cpu_info->caps |= CPUPOWER_CAP_PERF_BIAS;
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/* Intel's Turbo Ratio Limit support */
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if (cpu_info->family == 6) {
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switch (cpu_info->model) {
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case 0x1A: /* Core i7, Xeon 5500 series
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* Bloomfield, Gainstown NHM-EP
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*/
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case 0x1E: /* Core i7 and i5 Processor
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* Clarksfield, Lynnfield, Jasper Forest
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*/
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case 0x1F: /* Core i7 and i5 Processor - Nehalem */
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case 0x25: /* Westmere Client
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* Clarkdale, Arrandale
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*/
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case 0x2C: /* Westmere EP - Gulftown */
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cpu_info->caps |= CPUPOWER_CAP_HAS_TURBO_RATIO;
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case 0x2A: /* SNB */
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case 0x2D: /* SNB Xeon */
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cpu_info->caps |= CPUPOWER_CAP_HAS_TURBO_RATIO;
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cpu_info->caps |= CPUPOWER_CAP_IS_SNB;
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break;
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case 0x2E: /* Nehalem-EX Xeon - Beckton */
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case 0x2F: /* Westmere-EX Xeon - Eagleton */
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default:
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break;
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}
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}
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}
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/* printf("ID: %u - Extid: 0x%x - Caps: 0x%llx\n",
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@ -52,10 +52,12 @@ extern int be_verbose;
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enum cpupower_cpu_vendor {X86_VENDOR_UNKNOWN = 0, X86_VENDOR_INTEL,
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X86_VENDOR_AMD, X86_VENDOR_MAX};
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#define CPUPOWER_CAP_INV_TSC 0x00000001
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#define CPUPOWER_CAP_APERF 0x00000002
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#define CPUPOWER_CAP_AMD_CBP 0x00000004
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#define CPUPOWER_CAP_PERF_BIAS 0x00000008
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#define CPUPOWER_CAP_INV_TSC 0x00000001
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#define CPUPOWER_CAP_APERF 0x00000002
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#define CPUPOWER_CAP_AMD_CBP 0x00000004
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#define CPUPOWER_CAP_PERF_BIAS 0x00000008
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#define CPUPOWER_CAP_HAS_TURBO_RATIO 0x00000010
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#define CPUPOWER_CAP_IS_SNB 0x00000011
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#define MAX_HW_PSTATES 10
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@ -111,6 +113,7 @@ extern int write_msr(int cpu, unsigned int idx, unsigned long long val);
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extern int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val);
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extern int msr_intel_get_perf_bias(unsigned int cpu);
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extern unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu);
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extern int msr_intel_has_boost_support(unsigned int cpu);
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extern int msr_intel_boost_is_active(unsigned int cpu);
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@ -157,6 +160,8 @@ static inline int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val)
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{ return -1; };
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static inline int msr_intel_get_perf_bias(unsigned int cpu)
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{ return -1; };
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static inline unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu)
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{ return 0; };
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static inline int msr_intel_has_boost_support(unsigned int cpu)
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{ return -1; };
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@ -11,6 +11,7 @@
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#define MSR_IA32_PERF_STATUS 0x198
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#define MSR_IA32_MISC_ENABLES 0x1a0
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#define MSR_IA32_ENERGY_PERF_BIAS 0x1b0
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#define MSR_NEHALEM_TURBO_RATIO_LIMIT 0x1ad
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/*
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* read_msr
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@ -79,6 +80,7 @@ int msr_intel_has_boost_support(unsigned int cpu)
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ret = read_msr(cpu, MSR_IA32_MISC_ENABLES, &misc_enables);
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if (ret)
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return ret;
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return (misc_enables >> 38) & 0x1;
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}
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@ -119,4 +121,18 @@ int msr_intel_set_perf_bias(unsigned int cpu, unsigned int val)
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return ret;
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return 0;
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}
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unsigned long long msr_intel_get_turbo_ratio(unsigned int cpu)
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{
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unsigned long long val;
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int ret;
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if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_HAS_TURBO_RATIO))
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return -1;
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ret = read_msr(cpu, MSR_NEHALEM_TURBO_RATIO_LIMIT, &val);
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if (ret)
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return ret;
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return val;
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}
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#endif
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