[MIPS] SB1250: Fix bugs/warnings by creative use of volatile.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
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41a8198f61
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8fb303c7f1
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@ -218,8 +218,7 @@ void sb1_dma_init(void)
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for (i = 0; i < DM_NUM_CHANNELS; i++) {
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for (i = 0; i < DM_NUM_CHANNELS; i++) {
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const u64 base_val = CPHYSADDR(&page_descr[i]) |
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const u64 base_val = CPHYSADDR(&page_descr[i]) |
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V_DM_DSCR_BASE_RINGSZ(1);
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V_DM_DSCR_BASE_RINGSZ(1);
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volatile void *base_reg =
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void *base_reg = IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
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IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
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__raw_writeq(base_val, base_reg);
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__raw_writeq(base_val, base_reg);
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__raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg);
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__raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg);
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@ -216,7 +216,7 @@ static int __init bcm1480_pcibios_init(void)
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/*
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/*
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* See if the PCI bus has been configured by the firmware.
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* See if the PCI bus has been configured by the firmware.
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*/
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*/
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reg = *((volatile uint64_t *) IOADDR(A_SCD_SYSTEM_CFG));
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reg = __raw_readq(IOADDR(A_SCD_SYSTEM_CFG));
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if (!(reg & M_BCM1480_SYS_PCI_HOST)) {
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if (!(reg & M_BCM1480_SYS_PCI_HOST)) {
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bcm1480_bus_status |= PCI_DEVICE_MODE;
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bcm1480_bus_status |= PCI_DEVICE_MODE;
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} else {
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} else {
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@ -228,7 +228,7 @@ static int __init sb1250_pcibios_init(void)
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/*
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/*
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* See if the PCI bus has been configured by the firmware.
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* See if the PCI bus has been configured by the firmware.
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*/
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*/
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reg = *((volatile uint64_t *) IOADDR(A_SCD_SYSTEM_CFG));
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reg = __raw_readq(IOADDR(A_SCD_SYSTEM_CFG));
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if (!(reg & M_SYS_PCI_HOST)) {
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if (!(reg & M_SYS_PCI_HOST)) {
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sb1250_bus_status |= PCI_DEVICE_MODE;
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sb1250_bus_status |= PCI_DEVICE_MODE;
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} else {
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} else {
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@ -34,21 +34,21 @@ extern void smp_call_function_interrupt(void);
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* independent of board/firmware
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* independent of board/firmware
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*/
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*/
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static volatile void *mailbox_0_set_regs[] = {
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static void *mailbox_0_set_regs[] = {
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IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
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IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
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IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
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IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
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IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
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IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
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IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
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IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_SET_CPU),
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};
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};
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static volatile void *mailbox_0_clear_regs[] = {
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static void *mailbox_0_clear_regs[] = {
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IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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IOADDR(A_BCM1480_IMR_CPU3_BASE + R_BCM1480_IMR_MAILBOX_0_CLR_CPU),
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};
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};
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static volatile void *mailbox_0_regs[] = {
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static void *mailbox_0_regs[] = {
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IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
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IOADDR(A_BCM1480_IMR_CPU0_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
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IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
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IOADDR(A_BCM1480_IMR_CPU1_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
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IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
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IOADDR(A_BCM1480_IMR_CPU2_BASE + R_BCM1480_IMR_MAILBOX_0_CPU),
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@ -169,17 +169,19 @@ void __init plat_mem_setup(void)
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#define LEDS_PHYS MLEDS_PHYS
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#define LEDS_PHYS MLEDS_PHYS
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#endif
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#endif
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#define setled(index, c) \
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((unsigned char *)(IOADDR(LEDS_PHYS)+0x20))[(3-(index))<<3] = (c)
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void setleds(char *str)
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void setleds(char *str)
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{
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{
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void *reg;
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int i;
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int i;
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for (i = 0; i < 4; i++) {
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for (i = 0; i < 4; i++) {
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if (!str[i]) {
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reg = IOADDR(LEDS_PHYS) + 0x20 + ((3 - i) << 3);
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setled(i, ' ');
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} else {
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if (!str[i])
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setled(i, str[i]);
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writeb(' ', reg);
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}
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else
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writeb(str[i], reg);
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}
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}
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}
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}
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#endif
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#endif /* LEDS_PHYS */
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@ -243,7 +243,7 @@ struct sbmac_softc {
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* Controller-specific things
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* Controller-specific things
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*/
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*/
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volatile void __iomem *sbm_base; /* MAC's base address */
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void __iomem *sbm_base; /* MAC's base address */
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sbmac_state_t sbm_state; /* current state */
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sbmac_state_t sbm_state; /* current state */
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volatile void __iomem *sbm_macenable; /* MAC Enable Register */
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volatile void __iomem *sbm_macenable; /* MAC Enable Register */
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@ -67,6 +67,6 @@ extern void bcm1480_smp_finish(void);
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#endif
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#endif
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#define IOADDR(a) ((volatile void __iomem *)(IO_BASE + (a)))
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#define IOADDR(a) ((void __iomem *)(IO_BASE + (a)))
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#endif
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#endif
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