ASoC: Updates for v4.2
The big thing this release has been Liam's addition of topology support to the core. We've also seen quite a bit of driver work and the continuation of Lars' refactoring for component support. - Support for loading ASoC topology maps from firmware, intended to be used to allow self-describing DSP firmware images to be built which can map controls added by the DSP to userspace without the kernel needing to know about individual DSP firmwares. - Lots of refactoring to avoid direct access to snd_soc_codec where it's not needed supporting future refactoring. - Big refactoring and cleanup serieses for the Wolfson ADSP and TI TAS2552 drivers. - Support for TI TAS571x power amplifiers. - Support for Qualcomm APQ8016 and ZTE ZX296702 SoCs. - Support for x86 systems with RT5650 and Qualcomm Storm. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJVddV1AAoJECTWi3JdVIfQQQsH/RG3lgOeot5jLWMsxJSKChEl KI+aaMcOw6Dj2LDccN8i6vUp8q44cKSXIc7lGLOzJW4K+OydCCGAvE+sJGyRE1dd yOHwcbvjJi4zFlt01RZchJ/Wa/S6zFucl5N9HxWsV4bEtfAA59IuhJLtospUlwsA mf9mpvSdeUAeh3lM2+AqAbXhTo6dYfD5ky5nrtpAkZjG8gqUG0u8Tpauja0lLcHi 72/3EkzKR6KHaefyPw3LdN+/H/YK79uHCVcctZnQg5xUUymcO16ReoTxKwV9cnDb lBJ6wO8RpUAO9evoG2Yj/l4p+czDCm5VkHMq0nPklHVRh7s/2PwKfox1aw4Pumg= =wolq -----END PGP SIGNATURE----- Merge tag 'asoc-v4.2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next ASoC: Updates for v4.2 The big thing this release has been Liam's addition of topology support to the core. We've also seen quite a bit of driver work and the continuation of Lars' refactoring for component support. - Support for loading ASoC topology maps from firmware, intended to be used to allow self-describing DSP firmware images to be built which can map controls added by the DSP to userspace without the kernel needing to know about individual DSP firmwares. - Lots of refactoring to avoid direct access to snd_soc_codec where it's not needed supporting future refactoring. - Big refactoring and cleanup serieses for the Wolfson ADSP and TI TAS2552 drivers. - Support for TI TAS571x power amplifiers. - Support for Qualcomm APQ8016 and ZTE ZX296702 SoCs. - Support for x86 systems with RT5650 and Qualcomm Storm.
This commit is contained in:
commit
8ffc57093b
|
@ -162,7 +162,7 @@ Description: Discover CPUs in the same CPU frequency coordination domain
|
|||
What: /sys/devices/system/cpu/cpu*/cache/index3/cache_disable_{0,1}
|
||||
Date: August 2008
|
||||
KernelVersion: 2.6.27
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||||
Contact: discuss@x86-64.org
|
||||
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
|
||||
Description: Disable L3 cache indices
|
||||
|
||||
These files exist in every CPU's cache/index3 directory. Each
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||||
|
|
|
@ -17,7 +17,8 @@ Required properties:
|
|||
- #clock-cells: from common clock binding; shall be set to 1.
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- clocks: from common clock binding; list of parent clock
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handles, shall be xtal reference clock or xtal and clkin for
|
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si5351c only.
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si5351c only. Corresponding clock input names are "xtal" and
|
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"clkin" respectively.
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- #address-cells: shall be set to 1.
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- #size-cells: shall be set to 0.
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|
@ -71,6 +72,7 @@ i2c-master-node {
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/* connect xtal input to 25MHz reference */
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clocks = <&ref25>;
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clock-names = "xtal";
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/* connect xtal input as source of pll0 and pll1 */
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silabs,pll-source = <0 0>, <1 0>;
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|
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|
@ -8,8 +8,8 @@ Required properties:
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is not Linux-only, but in case of Linux, see the "m25p_ids"
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table in drivers/mtd/devices/m25p80.c for the list of supported
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chips.
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Must also include "nor-jedec" for any SPI NOR flash that can be
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identified by the JEDEC READ ID opcode (0x9F).
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Must also include "jedec,spi-nor" for any SPI NOR flash that can
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be identified by the JEDEC READ ID opcode (0x9F).
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- reg : Chip-Select number
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- spi-max-frequency : Maximum frequency of the SPI bus the chip can operate at
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|
@ -25,7 +25,7 @@ Example:
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flash: m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spansion,m25p80", "nor-jedec";
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compatible = "spansion,m25p80", "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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m25p,fast-read;
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|
@ -3,7 +3,8 @@
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Required properties:
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- compatible: Should be "cdns,[<chip>-]{emac}"
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Use "cdns,at91rm9200-emac" Atmel at91rm9200 SoC.
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or the generic form: "cdns,emac".
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Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC.
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Or the generic form: "cdns,emac".
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- reg: Address and length of the register set for the device
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- interrupts: Should contain macb interrupt
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- phy-mode: see ethernet.txt file in the same directory.
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|
|
|
@ -20,6 +20,8 @@ Optional properties:
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pin configurations as described in the datasheet,
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||||
table 53. Note that the value of this property has
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to be prefixed with '/bits/ 8'.
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- avdd-supply: Power supply for AVDD, providing 3.3V
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- dvdd-supply: Power supply for DVDD, providing 3.3V
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Examples:
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|
@ -28,6 +30,8 @@ Examples:
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compatible = "adi,adau1701";
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reg = <0x34>;
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reset-gpio = <&gpio 23 0>;
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avdd-supply = <&vdd_3v3_reg>;
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dvdd-supply = <&vdd_3v3_reg>;
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adi,pll-mode-gpios = <&gpio 24 0 &gpio 25 0>;
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adi,pin-config = /bits/ 8 <0x4 0x7 0x5 0x5 0x4 0x4
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||||
0x4 0x4 0x4 0x4 0x4 0x4>;
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||||
|
|
13
Documentation/devicetree/bindings/sound/bt-sco.txt
Normal file
13
Documentation/devicetree/bindings/sound/bt-sco.txt
Normal file
|
@ -0,0 +1,13 @@
|
|||
Bluetooth-SCO audio CODEC
|
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|
||||
This device support generic Bluetooth SCO link.
|
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|
||||
Required properties:
|
||||
|
||||
- compatible : "delta,dfbmcs320"
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|
||||
Example:
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||||
|
||||
codec: bt_sco {
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compatible = "delta,dfbmcs320";
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};
|
13
Documentation/devicetree/bindings/sound/gtm601.txt
Normal file
13
Documentation/devicetree/bindings/sound/gtm601.txt
Normal file
|
@ -0,0 +1,13 @@
|
|||
GTM601 UMTS modem audio interface CODEC
|
||||
|
||||
This device has no configuration interface. Sample rate is fixed - 8kHz.
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|
||||
Required properties:
|
||||
|
||||
- compatible : "option,gtm601"
|
||||
|
||||
Example:
|
||||
|
||||
codec: gtm601_codec {
|
||||
compatible = "option,gtm601";
|
||||
};
|
|
@ -18,6 +18,12 @@ Optional properties:
|
|||
|
||||
- maxim,dmic-freq: Frequency at which to clock DMIC
|
||||
|
||||
- maxim,micbias: Micbias voltage applies to the analog mic, valid voltages value are:
|
||||
0 - 2.2v
|
||||
1 - 2.55v
|
||||
2 - 2.4v
|
||||
3 - 2.8v
|
||||
|
||||
Pins on the device (for linking into audio routes):
|
||||
|
||||
* MIC1
|
||||
|
|
|
@ -4,12 +4,21 @@ This node models the Qualcomm Technologies Low-Power Audio SubSystem (LPASS).
|
|||
|
||||
Required properties:
|
||||
|
||||
- compatible : "qcom,lpass-cpu"
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||||
- compatible : "qcom,lpass-cpu" or "qcom,apq8016-lpass-cpu"
|
||||
- clocks : Must contain an entry for each entry in clock-names.
|
||||
- clock-names : A list which must include the following entries:
|
||||
* "ahbix-clk"
|
||||
* "mi2s-osr-clk"
|
||||
* "mi2s-bit-clk"
|
||||
: required clocks for "qcom,lpass-cpu-apq8016"
|
||||
* "ahbix-clk"
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||||
* "mi2s-bit-clk0"
|
||||
* "mi2s-bit-clk1"
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* "mi2s-bit-clk2"
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||||
* "mi2s-bit-clk3"
|
||||
* "pcnoc-mport-clk"
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||||
* "pcnoc-sway-clk"
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|
||||
- interrupts : Must contain an entry for each entry in
|
||||
interrupt-names.
|
||||
- interrupt-names : A list which must include the following entries:
|
||||
|
@ -22,6 +31,8 @@ Required properties:
|
|||
- reg-names : A list which must include the following entries:
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||||
* "lpass-lpaif"
|
||||
|
||||
|
||||
|
||||
Optional properties:
|
||||
|
||||
- qcom,adsp : Phandle for the audio DSP node
|
||||
|
|
|
@ -5,6 +5,7 @@ Required properties:
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|||
"renesas,rcar_sound-gen1" if generation1, and
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"renesas,rcar_sound-gen2" if generation2
|
||||
Examples with soctypes are:
|
||||
- "renesas,rcar_sound-r8a7778" (R-Car M1A)
|
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- "renesas,rcar_sound-r8a7790" (R-Car H2)
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- "renesas,rcar_sound-r8a7791" (R-Car M2-W)
|
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- reg : Should contain the register physical address.
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||||
|
@ -47,7 +48,7 @@ DAI subnode properties:
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|||
|
||||
Example:
|
||||
|
||||
rcar_sound: rcar_sound@ec500000 {
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||||
rcar_sound: sound@ec500000 {
|
||||
#sound-dai-cells = <1>;
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compatible = "renesas,rcar_sound-r8a7791", "renesas,rcar_sound-gen2";
|
||||
reg = <0 0xec500000 0 0x1000>, /* SCU */
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||||
|
|
|
@ -18,6 +18,7 @@ Required properties:
|
|||
Optional properties:
|
||||
|
||||
- realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
|
||||
- realtek,reset-gpio : The GPIO that controls the CODEC's RESET pin.
|
||||
|
||||
- realtek,in1-differential
|
||||
- realtek,in2-differential
|
||||
|
@ -70,6 +71,7 @@ rt5677 {
|
|||
|
||||
realtek,pow-ldo2-gpio =
|
||||
<&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
|
||||
realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>;
|
||||
realtek,in1-differential = "true";
|
||||
realtek,gpio-config = /bits/ 8 <0 0 0 0 0 2>; /* pull up GPIO6 */
|
||||
realtek,jd2-gpio = <3>; /* Enables Jack detection for GPIO6 */
|
||||
|
|
41
Documentation/devicetree/bindings/sound/tas571x.txt
Normal file
41
Documentation/devicetree/bindings/sound/tas571x.txt
Normal file
|
@ -0,0 +1,41 @@
|
|||
Texas Instruments TAS5711/TAS5717/TAS5719 stereo power amplifiers
|
||||
|
||||
The codec is controlled through an I2C interface. It also has two other
|
||||
signals that can be wired up to GPIOs: reset (strongly recommended), and
|
||||
powerdown (optional).
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: "ti,tas5711", "ti,tas5717", or "ti,tas5719"
|
||||
- reg: The I2C address of the device
|
||||
- #sound-dai-cells: must be equal to 0
|
||||
|
||||
Optional properties:
|
||||
|
||||
- reset-gpios: GPIO specifier for the TAS571x's active low reset line
|
||||
- pdn-gpios: GPIO specifier for the TAS571x's active low powerdown line
|
||||
- clocks: clock phandle for the MCLK input
|
||||
- clock-names: should be "mclk"
|
||||
- AVDD-supply: regulator phandle for the AVDD supply (all chips)
|
||||
- DVDD-supply: regulator phandle for the DVDD supply (all chips)
|
||||
- HPVDD-supply: regulator phandle for the HPVDD supply (5717/5719)
|
||||
- PVDD_AB-supply: regulator phandle for the PVDD_AB supply (5717/5719)
|
||||
- PVDD_CD-supply: regulator phandle for the PVDD_CD supply (5717/5719)
|
||||
- PVDD_A-supply: regulator phandle for the PVDD_A supply (5711)
|
||||
- PVDD_B-supply: regulator phandle for the PVDD_B supply (5711)
|
||||
- PVDD_C-supply: regulator phandle for the PVDD_C supply (5711)
|
||||
- PVDD_D-supply: regulator phandle for the PVDD_D supply (5711)
|
||||
|
||||
Example:
|
||||
|
||||
tas5717: audio-codec@2a {
|
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compatible = "ti,tas5717";
|
||||
reg = <0x2a>;
|
||||
#sound-dai-cells = <0>;
|
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|
||||
reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>;
|
||||
pdn-gpios = <&gpio5 2 GPIO_ACTIVE_LOW>;
|
||||
|
||||
clocks = <&clk_core CLK_I2S>;
|
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clock-names = "mclk";
|
||||
};
|
|
@ -10,9 +10,20 @@ Required properties:
|
|||
- reg : the I2C address of the device for I2C, the chip select
|
||||
number for SPI.
|
||||
|
||||
Optional properties:
|
||||
|
||||
- diff-mode: Differential output mode configuration. Default value for field
|
||||
DIFF in register R8 (MODE_CONTROL_2). If absent, the default is 0, shall be:
|
||||
0 = stereo
|
||||
1 = mono left
|
||||
2 = stereo reversed
|
||||
3 = mono right
|
||||
|
||||
Example:
|
||||
|
||||
codec: wm8741@1a {
|
||||
compatible = "wlf,wm8741";
|
||||
reg = <0x1a>;
|
||||
|
||||
diff-mode = <3>;
|
||||
};
|
||||
|
|
44
Documentation/devicetree/bindings/sound/zte,zx-i2s.txt
Normal file
44
Documentation/devicetree/bindings/sound/zte,zx-i2s.txt
Normal file
|
@ -0,0 +1,44 @@
|
|||
ZTE ZX296702 I2S controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Must be "zte,zx296702-i2s"
|
||||
- reg : Must contain I2S core's registers location and length
|
||||
- clocks : Pairs of phandle and specifier referencing the controller's clocks.
|
||||
- clock-names: "tx" for the clock to the I2S interface.
|
||||
- dmas: Pairs of phandle and specifier for the DMA channel that is used by
|
||||
the core. The core expects two dma channels for transmit.
|
||||
- dma-names : Must be "tx" and "rx"
|
||||
|
||||
For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
|
||||
please check:
|
||||
* resource-names.txt
|
||||
* clock/clock-bindings.txt
|
||||
* dma/dma.txt
|
||||
|
||||
Example:
|
||||
i2s0: i2s0@0b005000 {
|
||||
#sound-dai-cells = <0>;
|
||||
compatible = "zte,zx296702-i2s";
|
||||
reg = <0x0b005000 0x1000>;
|
||||
clocks = <&lsp0clk ZX296702_I2S0_DIV>;
|
||||
clock-names = "tx";
|
||||
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&dma 5>, <&dma 6>;
|
||||
dma-names = "tx", "rx";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
sound {
|
||||
compatible = "simple-audio-card";
|
||||
simple-audio-card,name = "zx296702_snd";
|
||||
simple-audio-card,format = "left_j";
|
||||
simple-audio-card,bitclock-master = <&sndcodec>;
|
||||
simple-audio-card,frame-master = <&sndcodec>;
|
||||
sndcpu: simple-audio-card,cpu {
|
||||
sound-dai = <&i2s0>;
|
||||
};
|
||||
|
||||
sndcodec: simple-audio-card,codec {
|
||||
sound-dai = <&acodec>;
|
||||
};
|
||||
};
|
28
Documentation/devicetree/bindings/sound/zte,zx-spdif.txt
Normal file
28
Documentation/devicetree/bindings/sound/zte,zx-spdif.txt
Normal file
|
@ -0,0 +1,28 @@
|
|||
ZTE ZX296702 SPDIF controller
|
||||
|
||||
Required properties:
|
||||
- compatible : Must be "zte,zx296702-spdif"
|
||||
- reg : Must contain SPDIF core's registers location and length
|
||||
- clocks : Pairs of phandle and specifier referencing the controller's clocks.
|
||||
- clock-names: "tx" for the clock to the SPDIF interface.
|
||||
- dmas: Pairs of phandle and specifier for the DMA channel that is used by
|
||||
the core. The core expects one dma channel for transmit.
|
||||
- dma-names : Must be "tx"
|
||||
|
||||
For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
|
||||
please check:
|
||||
* resource-names.txt
|
||||
* clock/clock-bindings.txt
|
||||
* dma/dma.txt
|
||||
|
||||
Example:
|
||||
spdif0: spdif0@0b004000 {
|
||||
compatible = "zte,zx296702-spdif";
|
||||
reg = <0x0b004000 0x1000>;
|
||||
clocks = <&lsp0clk ZX296702_SPDIF0_DIV>;
|
||||
clock-names = "tx";
|
||||
interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&dma 4>;
|
||||
dma-names = "tx";
|
||||
status = "okay";
|
||||
};
|
|
@ -54,6 +54,7 @@ cosmic Cosmic Circuits
|
|||
crystalfontz Crystalfontz America, Inc.
|
||||
dallas Maxim Integrated Products (formerly Dallas Semiconductor)
|
||||
davicom DAVICOM Semiconductor, Inc.
|
||||
delta Delta Electronics, Inc.
|
||||
denx Denx Software Engineering
|
||||
digi Digi International Inc.
|
||||
digilent Diglent, Inc.
|
||||
|
|
|
@ -20,7 +20,7 @@ Supported chips:
|
|||
Datasheet: http://focus.ti.com/docs/prod/folders/print/tmp432.html
|
||||
* Texas Instruments TMP435
|
||||
Prefix: 'tmp435'
|
||||
Addresses scanned: I2C 0x37, 0x48 - 0x4f
|
||||
Addresses scanned: I2C 0x48 - 0x4f
|
||||
Datasheet: http://focus.ti.com/docs/prod/folders/print/tmp435.html
|
||||
|
||||
Authors:
|
||||
|
|
|
@ -198,6 +198,9 @@ TTY_IO_ERROR If set, causes all subsequent userspace read/write
|
|||
|
||||
TTY_OTHER_CLOSED Device is a pty and the other side has closed.
|
||||
|
||||
TTY_OTHER_DONE Device is a pty and the other side has closed and
|
||||
all pending input processing has been completed.
|
||||
|
||||
TTY_NO_WRITE_SPLIT Prevent driver from splitting up writes into
|
||||
smaller chunks.
|
||||
|
||||
|
|
|
@ -15,8 +15,7 @@ Contents:
|
|||
a) Discovering and configuring TCMU uio devices
|
||||
b) Waiting for events on the device(s)
|
||||
c) Managing the command ring
|
||||
3) Command filtering and pass_level
|
||||
4) A final note
|
||||
3) A final note
|
||||
|
||||
|
||||
TCM Userspace Design
|
||||
|
@ -324,7 +323,7 @@ int handle_device_events(int fd, void *map)
|
|||
/* Process events from cmd ring until we catch up with cmd_head */
|
||||
while (ent != (void *)mb + mb->cmdr_off + mb->cmd_head) {
|
||||
|
||||
if (tcmu_hdr_get_op(&ent->hdr) == TCMU_OP_CMD) {
|
||||
if (tcmu_hdr_get_op(ent->hdr.len_op) == TCMU_OP_CMD) {
|
||||
uint8_t *cdb = (void *)mb + ent->req.cdb_off;
|
||||
bool success = true;
|
||||
|
||||
|
@ -339,8 +338,12 @@ int handle_device_events(int fd, void *map)
|
|||
ent->rsp.scsi_status = SCSI_CHECK_CONDITION;
|
||||
}
|
||||
}
|
||||
else if (tcmu_hdr_get_op(ent->hdr.len_op) != TCMU_OP_PAD) {
|
||||
/* Tell the kernel we didn't handle unknown opcodes */
|
||||
ent->hdr.uflags |= TCMU_UFLAG_UNKNOWN_OP;
|
||||
}
|
||||
else {
|
||||
/* Do nothing for PAD entries */
|
||||
/* Do nothing for PAD entries except update cmd_tail */
|
||||
}
|
||||
|
||||
/* update cmd_tail */
|
||||
|
@ -360,28 +363,6 @@ int handle_device_events(int fd, void *map)
|
|||
}
|
||||
|
||||
|
||||
Command filtering and pass_level
|
||||
--------------------------------
|
||||
|
||||
TCMU supports a "pass_level" option with valid values of 0 or 1. When
|
||||
the value is 0 (the default), nearly all SCSI commands received for
|
||||
the device are passed through to the handler. This allows maximum
|
||||
flexibility but increases the amount of code required by the handler,
|
||||
to support all mandatory SCSI commands. If pass_level is set to 1,
|
||||
then only IO-related commands are presented, and the rest are handled
|
||||
by LIO's in-kernel command emulation. The commands presented at level
|
||||
1 include all versions of:
|
||||
|
||||
READ
|
||||
WRITE
|
||||
WRITE_VERIFY
|
||||
XDWRITEREAD
|
||||
WRITE_SAME
|
||||
COMPARE_AND_WRITE
|
||||
SYNCHRONIZE_CACHE
|
||||
UNMAP
|
||||
|
||||
|
||||
A final note
|
||||
------------
|
||||
|
||||
|
|
|
@ -169,6 +169,10 @@ Shadow pages contain the following information:
|
|||
Contains the value of cr4.smep && !cr0.wp for which the page is valid
|
||||
(pages for which this is true are different from other pages; see the
|
||||
treatment of cr0.wp=0 below).
|
||||
role.smap_andnot_wp:
|
||||
Contains the value of cr4.smap && !cr0.wp for which the page is valid
|
||||
(pages for which this is true are different from other pages; see the
|
||||
treatment of cr0.wp=0 below).
|
||||
gfn:
|
||||
Either the guest page table containing the translations shadowed by this
|
||||
page, or the base page frame for linear translations. See role.direct.
|
||||
|
@ -344,10 +348,16 @@ on fault type:
|
|||
|
||||
(user write faults generate a #PF)
|
||||
|
||||
In the first case there is an additional complication if CR4.SMEP is
|
||||
enabled: since we've turned the page into a kernel page, the kernel may now
|
||||
execute it. We handle this by also setting spte.nx. If we get a user
|
||||
fetch or read fault, we'll change spte.u=1 and spte.nx=gpte.nx back.
|
||||
In the first case there are two additional complications:
|
||||
- if CR4.SMEP is enabled: since we've turned the page into a kernel page,
|
||||
the kernel may now execute it. We handle this by also setting spte.nx.
|
||||
If we get a user fetch or read fault, we'll change spte.u=1 and
|
||||
spte.nx=gpte.nx back.
|
||||
- if CR4.SMAP is disabled: since the page has been changed to a kernel
|
||||
page, it can not be reused when CR4.SMAP is enabled. We set
|
||||
CR4.SMAP && !CR0.WP into shadow page's role to avoid this case. Note,
|
||||
here we do not care the case that CR4.SMAP is enabled since KVM will
|
||||
directly inject #PF to guest due to failed permission check.
|
||||
|
||||
To prevent an spte that was converted into a kernel page with cr0.wp=0
|
||||
from being written by the kernel after cr0.wp has changed to 1, we make
|
||||
|
|
72
MAINTAINERS
72
MAINTAINERS
|
@ -974,7 +974,7 @@ S: Maintained
|
|||
ARM/CORTINA SYSTEMS GEMINI ARM ARCHITECTURE
|
||||
M: Hans Ulli Kroll <ulli.kroll@googlemail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
T: git git://git.berlios.de/gemini-board
|
||||
T: git git://github.com/ulli-kroll/linux.git
|
||||
S: Maintained
|
||||
F: arch/arm/mach-gemini/
|
||||
|
||||
|
@ -1193,7 +1193,7 @@ ARM/MAGICIAN MACHINE SUPPORT
|
|||
M: Philipp Zabel <philipp.zabel@gmail.com>
|
||||
S: Maintained
|
||||
|
||||
ARM/Marvell Armada 370 and Armada XP SOC support
|
||||
ARM/Marvell Kirkwood and Armada 370, 375, 38x, XP SOC support
|
||||
M: Jason Cooper <jason@lakedaemon.net>
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Gregory Clement <gregory.clement@free-electrons.com>
|
||||
|
@ -1202,12 +1202,17 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
|||
S: Maintained
|
||||
F: arch/arm/mach-mvebu/
|
||||
F: drivers/rtc/rtc-armada38x.c
|
||||
F: arch/arm/boot/dts/armada*
|
||||
F: arch/arm/boot/dts/kirkwood*
|
||||
|
||||
|
||||
ARM/Marvell Berlin SoC support
|
||||
M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-berlin/
|
||||
F: arch/arm/boot/dts/berlin*
|
||||
|
||||
|
||||
ARM/Marvell Dove/MV78xx0/Orion SOC support
|
||||
M: Jason Cooper <jason@lakedaemon.net>
|
||||
|
@ -1220,6 +1225,9 @@ F: arch/arm/mach-dove/
|
|||
F: arch/arm/mach-mv78xx0/
|
||||
F: arch/arm/mach-orion5x/
|
||||
F: arch/arm/plat-orion/
|
||||
F: arch/arm/boot/dts/dove*
|
||||
F: arch/arm/boot/dts/orion5x*
|
||||
|
||||
|
||||
ARM/Orion SoC/Technologic Systems TS-78xx platform support
|
||||
M: Alexander Clouter <alex@digriz.org.uk>
|
||||
|
@ -1371,6 +1379,7 @@ N: rockchip
|
|||
|
||||
ARM/SAMSUNG EXYNOS ARM ARCHITECTURES
|
||||
M: Kukjin Kim <kgene@kernel.org>
|
||||
M: Krzysztof Kozlowski <k.kozlowski@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
|
@ -1935,7 +1944,7 @@ S: Maintained
|
|||
F: drivers/net/wireless/b43legacy/
|
||||
|
||||
BACKLIGHT CLASS/SUBSYSTEM
|
||||
M: Jingoo Han <jg1.han@samsung.com>
|
||||
M: Jingoo Han <jingoohan1@gmail.com>
|
||||
M: Lee Jones <lee.jones@linaro.org>
|
||||
S: Maintained
|
||||
F: drivers/video/backlight/
|
||||
|
@ -2418,7 +2427,6 @@ L: linux-security-module@vger.kernel.org
|
|||
S: Supported
|
||||
F: include/linux/capability.h
|
||||
F: include/uapi/linux/capability.h
|
||||
F: security/capability.c
|
||||
F: security/commoncap.c
|
||||
F: kernel/capability.c
|
||||
|
||||
|
@ -3816,10 +3824,11 @@ M: David Woodhouse <dwmw2@infradead.org>
|
|||
L: linux-embedded@vger.kernel.org
|
||||
S: Maintained
|
||||
|
||||
EMULEX LPFC FC SCSI DRIVER
|
||||
M: James Smart <james.smart@emulex.com>
|
||||
EMULEX/AVAGO LPFC FC/FCOE SCSI DRIVER
|
||||
M: James Smart <james.smart@avagotech.com>
|
||||
M: Dick Kennedy <dick.kennedy@avagotech.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
W: http://sourceforge.net/projects/lpfcxxxx
|
||||
W: http://www.avagotech.com
|
||||
S: Supported
|
||||
F: drivers/scsi/lpfc/
|
||||
|
||||
|
@ -3918,7 +3927,7 @@ F: drivers/extcon/
|
|||
F: Documentation/extcon/
|
||||
|
||||
EXYNOS DP DRIVER
|
||||
M: Jingoo Han <jg1.han@samsung.com>
|
||||
M: Jingoo Han <jingoohan1@gmail.com>
|
||||
L: dri-devel@lists.freedesktop.org
|
||||
S: Maintained
|
||||
F: drivers/gpu/drm/exynos/exynos_dp*
|
||||
|
@ -4377,11 +4386,10 @@ F: fs/gfs2/
|
|||
F: include/uapi/linux/gfs2_ondisk.h
|
||||
|
||||
GIGASET ISDN DRIVERS
|
||||
M: Hansjoerg Lipp <hjlipp@web.de>
|
||||
M: Tilman Schmidt <tilman@imap.cc>
|
||||
M: Paul Bolle <pebolle@tiscali.nl>
|
||||
L: gigaset307x-common@lists.sourceforge.net
|
||||
W: http://gigaset307x.sourceforge.net/
|
||||
S: Maintained
|
||||
S: Odd Fixes
|
||||
F: Documentation/isdn/README.gigaset
|
||||
F: drivers/isdn/gigaset/
|
||||
F: include/uapi/linux/gigaset_dev.h
|
||||
|
@ -4528,7 +4536,7 @@ M: Jean Delvare <jdelvare@suse.de>
|
|||
M: Guenter Roeck <linux@roeck-us.net>
|
||||
L: lm-sensors@lm-sensors.org
|
||||
W: http://www.lm-sensors.org/
|
||||
T: quilt kernel.org/pub/linux/kernel/people/jdelvare/linux-2.6/jdelvare-hwmon/
|
||||
T: quilt http://jdelvare.nerim.net/devel/linux/jdelvare-hwmon/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git
|
||||
S: Maintained
|
||||
F: Documentation/hwmon/
|
||||
|
@ -5054,7 +5062,7 @@ M: Hal Rosenstock <hal.rosenstock@gmail.com>
|
|||
L: linux-rdma@vger.kernel.org
|
||||
W: http://www.openfabrics.org/
|
||||
Q: http://patchwork.kernel.org/project/linux-rdma/list/
|
||||
T: git git://github.com/dledford/linux.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma.git
|
||||
S: Supported
|
||||
F: Documentation/infiniband/
|
||||
F: drivers/infiniband/
|
||||
|
@ -6959,6 +6967,17 @@ T: git git://git.rocketboards.org/linux-socfpga-next.git
|
|||
S: Maintained
|
||||
F: arch/nios2/
|
||||
|
||||
NOKIA N900 POWER SUPPLY DRIVERS
|
||||
M: Pali Rohár <pali.rohar@gmail.com>
|
||||
S: Maintained
|
||||
F: include/linux/power/bq2415x_charger.h
|
||||
F: include/linux/power/bq27x00_battery.h
|
||||
F: include/linux/power/isp1704_charger.h
|
||||
F: drivers/power/bq2415x_charger.c
|
||||
F: drivers/power/bq27x00_battery.c
|
||||
F: drivers/power/isp1704_charger.c
|
||||
F: drivers/power/rx51_battery.c
|
||||
|
||||
NTB DRIVER
|
||||
M: Jon Mason <jdmason@kudzu.us>
|
||||
M: Dave Jiang <dave.jiang@intel.com>
|
||||
|
@ -7547,7 +7566,7 @@ S: Maintained
|
|||
F: drivers/pci/host/*rcar*
|
||||
|
||||
PCI DRIVER FOR SAMSUNG EXYNOS
|
||||
M: Jingoo Han <jg1.han@samsung.com>
|
||||
M: Jingoo Han <jingoohan1@gmail.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
|
@ -7555,7 +7574,7 @@ S: Maintained
|
|||
F: drivers/pci/host/pci-exynos.c
|
||||
|
||||
PCI DRIVER FOR SYNOPSIS DESIGNWARE
|
||||
M: Jingoo Han <jg1.han@samsung.com>
|
||||
M: Jingoo Han <jingoohan1@gmail.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/pci/host/*designware*
|
||||
|
@ -8511,7 +8530,7 @@ S: Supported
|
|||
F: sound/soc/samsung/
|
||||
|
||||
SAMSUNG FRAMEBUFFER DRIVER
|
||||
M: Jingoo Han <jg1.han@samsung.com>
|
||||
M: Jingoo Han <jingoohan1@gmail.com>
|
||||
L: linux-fbdev@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/video/fbdev/s3c-fb.c
|
||||
|
@ -8810,16 +8829,19 @@ F: drivers/misc/phantom.c
|
|||
F: include/uapi/linux/phantom.h
|
||||
|
||||
SERVER ENGINES 10Gbps iSCSI - BladeEngine 2 DRIVER
|
||||
M: Jayamohan Kallickal <jayamohan.kallickal@emulex.com>
|
||||
M: Jayamohan Kallickal <jayamohan.kallickal@avagotech.com>
|
||||
M: Minh Tran <minh.tran@avagotech.com>
|
||||
M: John Soni Jose <sony.john-n@avagotech.com>
|
||||
L: linux-scsi@vger.kernel.org
|
||||
W: http://www.emulex.com
|
||||
W: http://www.avagotech.com
|
||||
S: Supported
|
||||
F: drivers/scsi/be2iscsi/
|
||||
|
||||
SERVER ENGINES 10Gbps NIC - BladeEngine 2 DRIVER
|
||||
M: Sathya Perla <sathya.perla@emulex.com>
|
||||
M: Subbu Seetharaman <subbu.seetharaman@emulex.com>
|
||||
M: Ajit Khaparde <ajit.khaparde@emulex.com>
|
||||
Emulex 10Gbps NIC BE2, BE3-R, Lancer, Skyhawk-R DRIVER
|
||||
M: Sathya Perla <sathya.perla@avagotech.com>
|
||||
M: Ajit Khaparde <ajit.khaparde@avagotech.com>
|
||||
M: Padmanabh Ratnakar <padmanabh.ratnakar@avagotech.com>
|
||||
M: Sriharsha Basavapatna <sriharsha.basavapatna@avagotech.com>
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.emulex.com
|
||||
S: Supported
|
||||
|
@ -9900,6 +9922,12 @@ L: netdev@vger.kernel.org
|
|||
S: Maintained
|
||||
F: drivers/net/ethernet/ti/netcp*
|
||||
|
||||
TI TAS571X FAMILY ASoC CODEC DRIVER
|
||||
M: Kevin Cernekee <cernekee@chromium.org>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
S: Odd Fixes
|
||||
F: sound/soc/codecs/tas571x*
|
||||
|
||||
TI TWL4030 SERIES SOC CODEC DRIVER
|
||||
M: Peter Ujfalusi <peter.ujfalusi@ti.com>
|
||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 1
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc3
|
||||
EXTRAVERSION = -rc6
|
||||
NAME = Hurr durr I'ma sheep
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -14,6 +14,9 @@ targets := vmlinux.gz vmlinux \
|
|||
tools/bootpzh bootloader bootpheader bootpzheader
|
||||
OBJSTRIP := $(obj)/tools/objstrip
|
||||
|
||||
HOSTCFLAGS := -Wall -I$(objtree)/usr/include
|
||||
BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj)
|
||||
|
||||
# SRM bootable image. Copy to offset 512 of a partition.
|
||||
$(obj)/bootimage: $(addprefix $(obj)/tools/,mkbb lxboot bootlx) $(obj)/vmlinux.nh
|
||||
( cat $(obj)/tools/lxboot $(obj)/tools/bootlx $(obj)/vmlinux.nh ) > $@
|
||||
|
@ -96,13 +99,14 @@ $(obj)/tools/bootph: $(obj)/bootpheader $(OBJSTRIP) FORCE
|
|||
$(obj)/tools/bootpzh: $(obj)/bootpzheader $(OBJSTRIP) FORCE
|
||||
$(call if_changed,objstrip)
|
||||
|
||||
LDFLAGS_bootloader := -static -uvsprintf -T #-N -relax
|
||||
LDFLAGS_bootpheader := -static -uvsprintf -T #-N -relax
|
||||
LDFLAGS_bootpzheader := -static -uvsprintf -T #-N -relax
|
||||
LDFLAGS_bootloader := -static -T # -N -relax
|
||||
LDFLAGS_bootloader := -static -T # -N -relax
|
||||
LDFLAGS_bootpheader := -static -T # -N -relax
|
||||
LDFLAGS_bootpzheader := -static -T # -N -relax
|
||||
|
||||
OBJ_bootlx := $(obj)/head.o $(obj)/main.o
|
||||
OBJ_bootph := $(obj)/head.o $(obj)/bootp.o
|
||||
OBJ_bootpzh := $(obj)/head.o $(obj)/bootpz.o $(obj)/misc.o
|
||||
OBJ_bootlx := $(obj)/head.o $(obj)/stdio.o $(obj)/main.o
|
||||
OBJ_bootph := $(obj)/head.o $(obj)/stdio.o $(obj)/bootp.o
|
||||
OBJ_bootpzh := $(obj)/head.o $(obj)/stdio.o $(obj)/bootpz.o $(obj)/misc.o
|
||||
|
||||
$(obj)/bootloader: $(obj)/bootloader.lds $(OBJ_bootlx) $(LIBS_Y) FORCE
|
||||
$(call if_changed,ld)
|
||||
|
|
|
@ -19,7 +19,6 @@
|
|||
|
||||
#include "ksize.h"
|
||||
|
||||
extern int vsprintf(char *, const char *, va_list);
|
||||
extern unsigned long switch_to_osf_pal(unsigned long nr,
|
||||
struct pcb_struct * pcb_va, struct pcb_struct * pcb_pa,
|
||||
unsigned long *vptb);
|
||||
|
|
306
arch/alpha/boot/stdio.c
Normal file
306
arch/alpha/boot/stdio.c
Normal file
|
@ -0,0 +1,306 @@
|
|||
/*
|
||||
* Copyright (C) Paul Mackerras 1997.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
#include <stdarg.h>
|
||||
#include <stddef.h>
|
||||
|
||||
size_t strnlen(const char * s, size_t count)
|
||||
{
|
||||
const char *sc;
|
||||
|
||||
for (sc = s; count-- && *sc != '\0'; ++sc)
|
||||
/* nothing */;
|
||||
return sc - s;
|
||||
}
|
||||
|
||||
# define do_div(n, base) ({ \
|
||||
unsigned int __base = (base); \
|
||||
unsigned int __rem; \
|
||||
__rem = ((unsigned long long)(n)) % __base; \
|
||||
(n) = ((unsigned long long)(n)) / __base; \
|
||||
__rem; \
|
||||
})
|
||||
|
||||
|
||||
static int skip_atoi(const char **s)
|
||||
{
|
||||
int i, c;
|
||||
|
||||
for (i = 0; '0' <= (c = **s) && c <= '9'; ++*s)
|
||||
i = i*10 + c - '0';
|
||||
return i;
|
||||
}
|
||||
|
||||
#define ZEROPAD 1 /* pad with zero */
|
||||
#define SIGN 2 /* unsigned/signed long */
|
||||
#define PLUS 4 /* show plus */
|
||||
#define SPACE 8 /* space if plus */
|
||||
#define LEFT 16 /* left justified */
|
||||
#define SPECIAL 32 /* 0x */
|
||||
#define LARGE 64 /* use 'ABCDEF' instead of 'abcdef' */
|
||||
|
||||
static char * number(char * str, unsigned long long num, int base, int size, int precision, int type)
|
||||
{
|
||||
char c,sign,tmp[66];
|
||||
const char *digits="0123456789abcdefghijklmnopqrstuvwxyz";
|
||||
int i;
|
||||
|
||||
if (type & LARGE)
|
||||
digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ";
|
||||
if (type & LEFT)
|
||||
type &= ~ZEROPAD;
|
||||
if (base < 2 || base > 36)
|
||||
return 0;
|
||||
c = (type & ZEROPAD) ? '0' : ' ';
|
||||
sign = 0;
|
||||
if (type & SIGN) {
|
||||
if ((signed long long)num < 0) {
|
||||
sign = '-';
|
||||
num = - (signed long long)num;
|
||||
size--;
|
||||
} else if (type & PLUS) {
|
||||
sign = '+';
|
||||
size--;
|
||||
} else if (type & SPACE) {
|
||||
sign = ' ';
|
||||
size--;
|
||||
}
|
||||
}
|
||||
if (type & SPECIAL) {
|
||||
if (base == 16)
|
||||
size -= 2;
|
||||
else if (base == 8)
|
||||
size--;
|
||||
}
|
||||
i = 0;
|
||||
if (num == 0)
|
||||
tmp[i++]='0';
|
||||
else while (num != 0) {
|
||||
tmp[i++] = digits[do_div(num, base)];
|
||||
}
|
||||
if (i > precision)
|
||||
precision = i;
|
||||
size -= precision;
|
||||
if (!(type&(ZEROPAD+LEFT)))
|
||||
while(size-->0)
|
||||
*str++ = ' ';
|
||||
if (sign)
|
||||
*str++ = sign;
|
||||
if (type & SPECIAL) {
|
||||
if (base==8)
|
||||
*str++ = '0';
|
||||
else if (base==16) {
|
||||
*str++ = '0';
|
||||
*str++ = digits[33];
|
||||
}
|
||||
}
|
||||
if (!(type & LEFT))
|
||||
while (size-- > 0)
|
||||
*str++ = c;
|
||||
while (i < precision--)
|
||||
*str++ = '0';
|
||||
while (i-- > 0)
|
||||
*str++ = tmp[i];
|
||||
while (size-- > 0)
|
||||
*str++ = ' ';
|
||||
return str;
|
||||
}
|
||||
|
||||
int vsprintf(char *buf, const char *fmt, va_list args)
|
||||
{
|
||||
int len;
|
||||
unsigned long long num;
|
||||
int i, base;
|
||||
char * str;
|
||||
const char *s;
|
||||
|
||||
int flags; /* flags to number() */
|
||||
|
||||
int field_width; /* width of output field */
|
||||
int precision; /* min. # of digits for integers; max
|
||||
number of chars for from string */
|
||||
int qualifier; /* 'h', 'l', or 'L' for integer fields */
|
||||
/* 'z' support added 23/7/1999 S.H. */
|
||||
/* 'z' changed to 'Z' --davidm 1/25/99 */
|
||||
|
||||
|
||||
for (str=buf ; *fmt ; ++fmt) {
|
||||
if (*fmt != '%') {
|
||||
*str++ = *fmt;
|
||||
continue;
|
||||
}
|
||||
|
||||
/* process flags */
|
||||
flags = 0;
|
||||
repeat:
|
||||
++fmt; /* this also skips first '%' */
|
||||
switch (*fmt) {
|
||||
case '-': flags |= LEFT; goto repeat;
|
||||
case '+': flags |= PLUS; goto repeat;
|
||||
case ' ': flags |= SPACE; goto repeat;
|
||||
case '#': flags |= SPECIAL; goto repeat;
|
||||
case '0': flags |= ZEROPAD; goto repeat;
|
||||
}
|
||||
|
||||
/* get field width */
|
||||
field_width = -1;
|
||||
if ('0' <= *fmt && *fmt <= '9')
|
||||
field_width = skip_atoi(&fmt);
|
||||
else if (*fmt == '*') {
|
||||
++fmt;
|
||||
/* it's the next argument */
|
||||
field_width = va_arg(args, int);
|
||||
if (field_width < 0) {
|
||||
field_width = -field_width;
|
||||
flags |= LEFT;
|
||||
}
|
||||
}
|
||||
|
||||
/* get the precision */
|
||||
precision = -1;
|
||||
if (*fmt == '.') {
|
||||
++fmt;
|
||||
if ('0' <= *fmt && *fmt <= '9')
|
||||
precision = skip_atoi(&fmt);
|
||||
else if (*fmt == '*') {
|
||||
++fmt;
|
||||
/* it's the next argument */
|
||||
precision = va_arg(args, int);
|
||||
}
|
||||
if (precision < 0)
|
||||
precision = 0;
|
||||
}
|
||||
|
||||
/* get the conversion qualifier */
|
||||
qualifier = -1;
|
||||
if (*fmt == 'l' && *(fmt + 1) == 'l') {
|
||||
qualifier = 'q';
|
||||
fmt += 2;
|
||||
} else if (*fmt == 'h' || *fmt == 'l' || *fmt == 'L'
|
||||
|| *fmt == 'Z') {
|
||||
qualifier = *fmt;
|
||||
++fmt;
|
||||
}
|
||||
|
||||
/* default base */
|
||||
base = 10;
|
||||
|
||||
switch (*fmt) {
|
||||
case 'c':
|
||||
if (!(flags & LEFT))
|
||||
while (--field_width > 0)
|
||||
*str++ = ' ';
|
||||
*str++ = (unsigned char) va_arg(args, int);
|
||||
while (--field_width > 0)
|
||||
*str++ = ' ';
|
||||
continue;
|
||||
|
||||
case 's':
|
||||
s = va_arg(args, char *);
|
||||
if (!s)
|
||||
s = "<NULL>";
|
||||
|
||||
len = strnlen(s, precision);
|
||||
|
||||
if (!(flags & LEFT))
|
||||
while (len < field_width--)
|
||||
*str++ = ' ';
|
||||
for (i = 0; i < len; ++i)
|
||||
*str++ = *s++;
|
||||
while (len < field_width--)
|
||||
*str++ = ' ';
|
||||
continue;
|
||||
|
||||
case 'p':
|
||||
if (field_width == -1) {
|
||||
field_width = 2*sizeof(void *);
|
||||
flags |= ZEROPAD;
|
||||
}
|
||||
str = number(str,
|
||||
(unsigned long) va_arg(args, void *), 16,
|
||||
field_width, precision, flags);
|
||||
continue;
|
||||
|
||||
|
||||
case 'n':
|
||||
if (qualifier == 'l') {
|
||||
long * ip = va_arg(args, long *);
|
||||
*ip = (str - buf);
|
||||
} else if (qualifier == 'Z') {
|
||||
size_t * ip = va_arg(args, size_t *);
|
||||
*ip = (str - buf);
|
||||
} else {
|
||||
int * ip = va_arg(args, int *);
|
||||
*ip = (str - buf);
|
||||
}
|
||||
continue;
|
||||
|
||||
case '%':
|
||||
*str++ = '%';
|
||||
continue;
|
||||
|
||||
/* integer number formats - set up the flags and "break" */
|
||||
case 'o':
|
||||
base = 8;
|
||||
break;
|
||||
|
||||
case 'X':
|
||||
flags |= LARGE;
|
||||
case 'x':
|
||||
base = 16;
|
||||
break;
|
||||
|
||||
case 'd':
|
||||
case 'i':
|
||||
flags |= SIGN;
|
||||
case 'u':
|
||||
break;
|
||||
|
||||
default:
|
||||
*str++ = '%';
|
||||
if (*fmt)
|
||||
*str++ = *fmt;
|
||||
else
|
||||
--fmt;
|
||||
continue;
|
||||
}
|
||||
if (qualifier == 'l') {
|
||||
num = va_arg(args, unsigned long);
|
||||
if (flags & SIGN)
|
||||
num = (signed long) num;
|
||||
} else if (qualifier == 'q') {
|
||||
num = va_arg(args, unsigned long long);
|
||||
if (flags & SIGN)
|
||||
num = (signed long long) num;
|
||||
} else if (qualifier == 'Z') {
|
||||
num = va_arg(args, size_t);
|
||||
} else if (qualifier == 'h') {
|
||||
num = (unsigned short) va_arg(args, int);
|
||||
if (flags & SIGN)
|
||||
num = (signed short) num;
|
||||
} else {
|
||||
num = va_arg(args, unsigned int);
|
||||
if (flags & SIGN)
|
||||
num = (signed int) num;
|
||||
}
|
||||
str = number(str, num, base, field_width, precision, flags);
|
||||
}
|
||||
*str = '\0';
|
||||
return str-buf;
|
||||
}
|
||||
|
||||
int sprintf(char * buf, const char *fmt, ...)
|
||||
{
|
||||
va_list args;
|
||||
int i;
|
||||
|
||||
va_start(args, fmt);
|
||||
i=vsprintf(buf,fmt,args);
|
||||
va_end(args);
|
||||
return i;
|
||||
}
|
|
@ -27,6 +27,9 @@
|
|||
#include <linux/param.h>
|
||||
#ifdef __ELF__
|
||||
# include <linux/elf.h>
|
||||
# define elfhdr elf64_hdr
|
||||
# define elf_phdr elf64_phdr
|
||||
# define elf_check_arch(x) ((x)->e_machine == EM_ALPHA)
|
||||
#endif
|
||||
|
||||
/* bootfile size must be multiple of BLOCK_SIZE: */
|
||||
|
|
|
@ -2,6 +2,5 @@
|
|||
#define _ALPHA_TYPES_H
|
||||
|
||||
#include <asm-generic/int-ll64.h>
|
||||
#include <uapi/asm/types.h>
|
||||
|
||||
#endif /* _ALPHA_TYPES_H */
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
|
||||
#include <uapi/asm/unistd.h>
|
||||
|
||||
#define NR_SYSCALLS 511
|
||||
#define NR_SYSCALLS 514
|
||||
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
#define __ARCH_WANT_STAT64
|
||||
|
|
|
@ -472,5 +472,8 @@
|
|||
#define __NR_sched_setattr 508
|
||||
#define __NR_sched_getattr 509
|
||||
#define __NR_renameat2 510
|
||||
#define __NR_getrandom 511
|
||||
#define __NR_memfd_create 512
|
||||
#define __NR_execveat 513
|
||||
|
||||
#endif /* _UAPI_ALPHA_UNISTD_H */
|
||||
|
|
|
@ -6,7 +6,6 @@
|
|||
* Error handling code supporting Alpha systems
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/sched.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
|
|
|
@ -19,7 +19,6 @@
|
|||
#include <linux/ptrace.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/random.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/proc_fs.h>
|
||||
#include <linux/seq_file.h>
|
||||
|
|
|
@ -1019,14 +1019,13 @@ SYSCALL_DEFINE2(osf_settimeofday, struct timeval32 __user *, tv,
|
|||
if (tv) {
|
||||
if (get_tv32((struct timeval *)&kts, tv))
|
||||
return -EFAULT;
|
||||
kts.tv_nsec *= 1000;
|
||||
}
|
||||
if (tz) {
|
||||
if (copy_from_user(&ktz, tz, sizeof(*tz)))
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
kts.tv_nsec *= 1000;
|
||||
|
||||
return do_sys_settimeofday(tv ? &kts : NULL, tz ? &ktz : NULL);
|
||||
}
|
||||
|
||||
|
|
|
@ -236,12 +236,11 @@ release_thread(struct task_struct *dead_task)
|
|||
}
|
||||
|
||||
/*
|
||||
* Copy an alpha thread..
|
||||
* Copy architecture-specific thread state
|
||||
*/
|
||||
|
||||
int
|
||||
copy_thread(unsigned long clone_flags, unsigned long usp,
|
||||
unsigned long arg,
|
||||
unsigned long kthread_arg,
|
||||
struct task_struct *p)
|
||||
{
|
||||
extern void ret_from_fork(void);
|
||||
|
@ -262,7 +261,7 @@ copy_thread(unsigned long clone_flags, unsigned long usp,
|
|||
sizeof(struct switch_stack) + sizeof(struct pt_regs));
|
||||
childstack->r26 = (unsigned long) ret_from_kernel_thread;
|
||||
childstack->r9 = usp; /* function */
|
||||
childstack->r10 = arg;
|
||||
childstack->r10 = kthread_arg;
|
||||
childregs->hae = alpha_mv.hae_cache,
|
||||
childti->pcb.usp = 0;
|
||||
return 0;
|
||||
|
|
|
@ -63,7 +63,6 @@ static struct {
|
|||
enum ipi_message_type {
|
||||
IPI_RESCHEDULE,
|
||||
IPI_CALL_FUNC,
|
||||
IPI_CALL_FUNC_SINGLE,
|
||||
IPI_CPU_STOP,
|
||||
};
|
||||
|
||||
|
@ -506,7 +505,6 @@ setup_profiling_timer(unsigned int multiplier)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
send_ipi_message(const struct cpumask *to_whom, enum ipi_message_type operation)
|
||||
{
|
||||
|
@ -552,10 +550,6 @@ handle_ipi(struct pt_regs *regs)
|
|||
generic_smp_call_function_interrupt();
|
||||
break;
|
||||
|
||||
case IPI_CALL_FUNC_SINGLE:
|
||||
generic_smp_call_function_single_interrupt();
|
||||
break;
|
||||
|
||||
case IPI_CPU_STOP:
|
||||
halt();
|
||||
|
||||
|
@ -606,7 +600,7 @@ void arch_send_call_function_ipi_mask(const struct cpumask *mask)
|
|||
|
||||
void arch_send_call_function_single_ipi(int cpu)
|
||||
{
|
||||
send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
|
||||
send_ipi_message(cpumask_of(cpu), IPI_CALL_FUNC);
|
||||
}
|
||||
|
||||
static void
|
||||
|
|
|
@ -237,8 +237,7 @@ srmcons_init(void)
|
|||
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
module_init(srmcons_init);
|
||||
device_initcall(srmcons_init);
|
||||
|
||||
|
||||
/*
|
||||
|
|
|
@ -331,7 +331,7 @@ marvel_map_irq(const struct pci_dev *cdev, u8 slot, u8 pin)
|
|||
pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &intline);
|
||||
irq = intline;
|
||||
|
||||
msi_loc = pci_find_capability(dev, PCI_CAP_ID_MSI);
|
||||
msi_loc = dev->msi_cap;
|
||||
msg_ctl = 0;
|
||||
if (msi_loc)
|
||||
pci_read_config_word(dev, msi_loc + PCI_MSI_FLAGS, &msg_ctl);
|
||||
|
|
|
@ -529,6 +529,9 @@ sys_call_table:
|
|||
.quad sys_sched_setattr
|
||||
.quad sys_sched_getattr
|
||||
.quad sys_renameat2 /* 510 */
|
||||
.quad sys_getrandom
|
||||
.quad sys_memfd_create
|
||||
.quad sys_execveat
|
||||
|
||||
.size sys_call_table, . - sys_call_table
|
||||
.type sys_call_table, @object
|
||||
|
|
|
@ -14,7 +14,6 @@
|
|||
#include <linux/tty.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/kallsyms.h>
|
||||
#include <linux/ratelimit.h>
|
||||
|
||||
|
|
|
@ -8,7 +8,6 @@
|
|||
*/
|
||||
|
||||
#include <linux/oprofile.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/smp.h>
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
|
|
|
@ -8,7 +8,6 @@
|
|||
*/
|
||||
|
||||
#include <linux/oprofile.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/smp.h>
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
|
|
|
@ -8,7 +8,6 @@
|
|||
*/
|
||||
|
||||
#include <linux/oprofile.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/smp.h>
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
|
|
|
@ -9,7 +9,6 @@
|
|||
*/
|
||||
|
||||
#include <linux/oprofile.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/smp.h>
|
||||
#include <asm/ptrace.h>
|
||||
|
||||
|
|
|
@ -2,19 +2,6 @@ menu "Kernel hacking"
|
|||
|
||||
source "lib/Kconfig.debug"
|
||||
|
||||
config EARLY_PRINTK
|
||||
bool "Early printk" if EMBEDDED
|
||||
default y
|
||||
help
|
||||
Write kernel log output directly into the VGA buffer or to a serial
|
||||
port.
|
||||
|
||||
This is useful for kernel debugging when your machine crashes very
|
||||
early before the console code is initialized. For normal operation
|
||||
it is not recommended because it looks ugly and doesn't cooperate
|
||||
with klogd/syslogd or the X server. You should normally N here,
|
||||
unless you want to debug such a crash.
|
||||
|
||||
config 16KSTACKS
|
||||
bool "Use 16Kb for kernel stacks instead of 8Kb"
|
||||
help
|
||||
|
|
|
@ -99,7 +99,7 @@ static inline void atomic_##op(int i, atomic_t *v) \
|
|||
atomic_ops_unlock(flags); \
|
||||
}
|
||||
|
||||
#define ATOMIC_OP_RETURN(op, c_op) \
|
||||
#define ATOMIC_OP_RETURN(op, c_op, asm_op) \
|
||||
static inline int atomic_##op##_return(int i, atomic_t *v) \
|
||||
{ \
|
||||
unsigned long flags; \
|
||||
|
|
|
@ -266,7 +266,7 @@ static inline void __cache_line_loop(unsigned long paddr, unsigned long vaddr,
|
|||
* Machine specific helpers for Entire D-Cache or Per Line ops
|
||||
*/
|
||||
|
||||
static unsigned int __before_dc_op(const int op)
|
||||
static inline unsigned int __before_dc_op(const int op)
|
||||
{
|
||||
unsigned int reg = reg;
|
||||
|
||||
|
@ -284,7 +284,7 @@ static unsigned int __before_dc_op(const int op)
|
|||
return reg;
|
||||
}
|
||||
|
||||
static void __after_dc_op(const int op, unsigned int reg)
|
||||
static inline void __after_dc_op(const int op, unsigned int reg)
|
||||
{
|
||||
if (op & OP_FLUSH) /* flush / flush-n-inv both wait */
|
||||
while (read_aux_reg(ARC_REG_DC_CTRL) & DC_CTRL_FLUSH_STATUS);
|
||||
|
|
|
@ -223,7 +223,7 @@ dtb-$(CONFIG_SOC_IMX25) += \
|
|||
imx25-eukrea-mbimxsd25-baseboard-dvi-vga.dtb \
|
||||
imx25-karo-tx25.dtb \
|
||||
imx25-pdk.dtb
|
||||
dtb-$(CONFIG_SOC_IMX31) += \
|
||||
dtb-$(CONFIG_SOC_IMX27) += \
|
||||
imx27-apf27.dtb \
|
||||
imx27-apf27dev.dtb \
|
||||
imx27-eukrea-mbimxsd27-baseboard.dtb \
|
||||
|
|
|
@ -80,7 +80,3 @@
|
|||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&rtc {
|
||||
system-power-controller;
|
||||
};
|
||||
|
|
|
@ -654,7 +654,7 @@
|
|||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1271";
|
||||
reg = <2>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupt-parent = <&gpio0>;
|
||||
interrupts = <31 IRQ_TYPE_LEVEL_HIGH>; /* gpio 31 */
|
||||
ref-clock-frequency = <38400000>;
|
||||
};
|
||||
|
|
|
@ -69,7 +69,7 @@
|
|||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <2000000000>;
|
||||
clock-frequency = <1000000000>;
|
||||
};
|
||||
/* 25 MHz reference crystal */
|
||||
refclk: oscillator {
|
||||
|
|
|
@ -585,7 +585,7 @@
|
|||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <2000000000>;
|
||||
clock-frequency = <1000000000>;
|
||||
};
|
||||
|
||||
/* 25 MHz reference crystal */
|
||||
|
|
|
@ -502,7 +502,7 @@
|
|||
mainpll: mainpll {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <2000000000>;
|
||||
clock-frequency = <1000000000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -87,6 +87,7 @@
|
|||
|
||||
/* connect xtal input to 25MHz reference */
|
||||
clocks = <&ref25>;
|
||||
clock-names = "xtal";
|
||||
|
||||
/* connect xtal input as source of pll0 and pll1 */
|
||||
silabs,pll-source = <0 0>, <1 0>;
|
||||
|
|
|
@ -736,7 +736,7 @@
|
|||
|
||||
display-timings {
|
||||
timing-0 {
|
||||
clock-frequency = <0>;
|
||||
clock-frequency = <57153600>;
|
||||
hactive = <720>;
|
||||
vactive = <1280>;
|
||||
hfront-porch = <5>;
|
||||
|
|
|
@ -711,6 +711,7 @@
|
|||
num-slots = <1>;
|
||||
broken-cd;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
card-detect-delay = <200>;
|
||||
clock-frequency = <400000000>;
|
||||
samsung,dw-mshc-ciu-div = <1>;
|
||||
|
|
|
@ -674,6 +674,7 @@
|
|||
num-slots = <1>;
|
||||
broken-cd;
|
||||
cap-sdio-irq;
|
||||
keep-power-in-suspend;
|
||||
card-detect-delay = <200>;
|
||||
clock-frequency = <400000000>;
|
||||
samsung,dw-mshc-ciu-div = <1>;
|
||||
|
|
|
@ -533,7 +533,7 @@
|
|||
|
||||
fec: ethernet@1002b000 {
|
||||
compatible = "fsl,imx27-fec";
|
||||
reg = <0x1002b000 0x4000>;
|
||||
reg = <0x1002b000 0x1000>;
|
||||
interrupts = <50>;
|
||||
clocks = <&clks IMX27_CLK_FEC_IPG_GATE>,
|
||||
<&clks IMX27_CLK_FEC_AHB_GATE>;
|
||||
|
|
|
@ -110,6 +110,8 @@
|
|||
nand@0,0 {
|
||||
reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
|
||||
nand-bus-width = <16>;
|
||||
gpmc,device-width = <2>;
|
||||
ti,nand-ecc-opt = "sw";
|
||||
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
|
|
|
@ -826,7 +826,7 @@
|
|||
<&tegra_car TEGRA124_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA124_CLK_USBD>;
|
||||
clock-names = "reg", "pll_u", "utmi-pads";
|
||||
resets = <&tegra_car 59>, <&tegra_car 22>;
|
||||
resets = <&tegra_car 22>, <&tegra_car 22>;
|
||||
reset-names = "usb", "utmi-pads";
|
||||
nvidia,hssync-start-delay = <0>;
|
||||
nvidia,idle-wait-delay = <17>;
|
||||
|
@ -838,6 +838,7 @@
|
|||
nvidia,hssquelch-level = <2>;
|
||||
nvidia,hsdiscon-level = <5>;
|
||||
nvidia,xcvr-hsslew = <12>;
|
||||
nvidia,has-utmi-pad-registers;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -862,7 +863,7 @@
|
|||
<&tegra_car TEGRA124_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA124_CLK_USBD>;
|
||||
clock-names = "reg", "pll_u", "utmi-pads";
|
||||
resets = <&tegra_car 22>, <&tegra_car 22>;
|
||||
resets = <&tegra_car 58>, <&tegra_car 22>;
|
||||
reset-names = "usb", "utmi-pads";
|
||||
nvidia,hssync-start-delay = <0>;
|
||||
nvidia,idle-wait-delay = <17>;
|
||||
|
@ -874,7 +875,6 @@
|
|||
nvidia,hssquelch-level = <2>;
|
||||
nvidia,hsdiscon-level = <5>;
|
||||
nvidia,xcvr-hsslew = <12>;
|
||||
nvidia,has-utmi-pad-registers;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -899,7 +899,7 @@
|
|||
<&tegra_car TEGRA124_CLK_PLL_U>,
|
||||
<&tegra_car TEGRA124_CLK_USBD>;
|
||||
clock-names = "reg", "pll_u", "utmi-pads";
|
||||
resets = <&tegra_car 58>, <&tegra_car 22>;
|
||||
resets = <&tegra_car 59>, <&tegra_car 22>;
|
||||
reset-names = "usb", "utmi-pads";
|
||||
nvidia,hssync-start-delay = <0>;
|
||||
nvidia,idle-wait-delay = <17>;
|
||||
|
|
|
@ -191,6 +191,7 @@
|
|||
compatible = "arm,cortex-a15-pmu";
|
||||
interrupts = <0 68 4>,
|
||||
<0 69 4>;
|
||||
interrupt-affinity = <&cpu0>, <&cpu1>;
|
||||
};
|
||||
|
||||
oscclk6a: oscclk6a {
|
||||
|
|
|
@ -33,28 +33,28 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
A9_0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu@1 {
|
||||
A9_1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <1>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu@2 {
|
||||
A9_2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <2>;
|
||||
next-level-cache = <&L2>;
|
||||
};
|
||||
|
||||
cpu@3 {
|
||||
A9_3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <3>;
|
||||
|
@ -170,6 +170,7 @@
|
|||
compatible = "arm,pl310-cache";
|
||||
reg = <0x1e00a000 0x1000>;
|
||||
interrupts = <0 43 4>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
arm,data-latency = <1 1 1>;
|
||||
arm,tag-latency = <1 1 1>;
|
||||
|
@ -181,6 +182,8 @@
|
|||
<0 61 4>,
|
||||
<0 62 4>,
|
||||
<0 63 4>;
|
||||
interrupt-affinity = <&A9_0>, <&A9_1>, <&A9_2>, <&A9_3>;
|
||||
|
||||
};
|
||||
|
||||
dcc {
|
||||
|
|
|
@ -193,7 +193,7 @@
|
|||
};
|
||||
|
||||
gem0: ethernet@e000b000 {
|
||||
compatible = "cdns,gem";
|
||||
compatible = "cdns,zynq-gem";
|
||||
reg = <0xe000b000 0x1000>;
|
||||
status = "disabled";
|
||||
interrupts = <0 22 4>;
|
||||
|
@ -204,7 +204,7 @@
|
|||
};
|
||||
|
||||
gem1: ethernet@e000c000 {
|
||||
compatible = "cdns,gem";
|
||||
compatible = "cdns,zynq-gem";
|
||||
reg = <0xe000c000 0x1000>;
|
||||
status = "disabled";
|
||||
interrupts = <0 45 4>;
|
||||
|
|
|
@ -429,7 +429,7 @@ CONFIG_USB_EHCI_EXYNOS=y
|
|||
CONFIG_USB_EHCI_TEGRA=y
|
||||
CONFIG_USB_EHCI_HCD_STI=y
|
||||
CONFIG_USB_EHCI_HCD_PLATFORM=y
|
||||
CONFIG_USB_ISP1760_HCD=y
|
||||
CONFIG_USB_ISP1760=y
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD_STI=y
|
||||
CONFIG_USB_OHCI_HCD_PLATFORM=y
|
||||
|
|
|
@ -33,7 +33,9 @@ ret_fast_syscall:
|
|||
UNWIND(.fnstart )
|
||||
UNWIND(.cantunwind )
|
||||
disable_irq @ disable interrupts
|
||||
ldr r1, [tsk, #TI_FLAGS]
|
||||
ldr r1, [tsk, #TI_FLAGS] @ re-check for syscall tracing
|
||||
tst r1, #_TIF_SYSCALL_WORK
|
||||
bne __sys_trace_return
|
||||
tst r1, #_TIF_WORK_MASK
|
||||
bne fast_work_pending
|
||||
asm_trace_hardirqs_on
|
||||
|
|
|
@ -304,16 +304,17 @@ static int probe_current_pmu(struct arm_pmu *pmu)
|
|||
static int of_pmu_irq_cfg(struct platform_device *pdev)
|
||||
{
|
||||
int i, irq;
|
||||
int *irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
|
||||
|
||||
if (!irqs)
|
||||
return -ENOMEM;
|
||||
int *irqs;
|
||||
|
||||
/* Don't bother with PPIs; they're already affine */
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq >= 0 && irq_is_percpu(irq))
|
||||
return 0;
|
||||
|
||||
irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
|
||||
if (!irqs)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < pdev->num_resources; ++i) {
|
||||
struct device_node *dn;
|
||||
int cpu;
|
||||
|
|
|
@ -159,6 +159,8 @@ extern void exynos_enter_aftr(void);
|
|||
|
||||
extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
|
||||
|
||||
extern void exynos_set_delayed_reset_assertion(bool enable);
|
||||
|
||||
extern void s5p_init_cpu(void __iomem *cpuid_addr);
|
||||
extern unsigned int samsung_rev(void);
|
||||
extern void __iomem *cpu_boot_reg_base(void);
|
||||
|
|
|
@ -166,6 +166,33 @@ static void __init exynos_init_io(void)
|
|||
exynos_map_io();
|
||||
}
|
||||
|
||||
/*
|
||||
* Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code
|
||||
* and suspend.
|
||||
*
|
||||
* This is necessary only on Exynos4 SoCs. When system is running
|
||||
* USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down
|
||||
* feature could properly detect global idle state when secondary CPU is
|
||||
* powered down.
|
||||
*
|
||||
* However this should not be set when such system is going into suspend.
|
||||
*/
|
||||
void exynos_set_delayed_reset_assertion(bool enable)
|
||||
{
|
||||
if (of_machine_is_compatible("samsung,exynos4")) {
|
||||
unsigned int tmp, core_id;
|
||||
|
||||
for (core_id = 0; core_id < num_possible_cpus(); core_id++) {
|
||||
tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
|
||||
if (enable)
|
||||
tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
|
||||
else
|
||||
tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
|
||||
pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Apparently, these SoCs are not able to wake-up from suspend using
|
||||
* the PMU. Too bad. Should they suddenly become capable of such a
|
||||
|
|
|
@ -34,30 +34,6 @@
|
|||
|
||||
extern void exynos4_secondary_startup(void);
|
||||
|
||||
/*
|
||||
* Set or clear the USE_DELAYED_RESET_ASSERTION option, set on Exynos4 SoCs
|
||||
* during hot-(un)plugging CPUx.
|
||||
*
|
||||
* The feature can be cleared safely during first boot of secondary CPU.
|
||||
*
|
||||
* Exynos4 SoCs require setting USE_DELAYED_RESET_ASSERTION during powering
|
||||
* down a CPU so the CPU idle clock down feature could properly detect global
|
||||
* idle state when CPUx is off.
|
||||
*/
|
||||
static void exynos_set_delayed_reset_assertion(u32 core_id, bool enable)
|
||||
{
|
||||
if (soc_is_exynos4()) {
|
||||
unsigned int tmp;
|
||||
|
||||
tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
|
||||
if (enable)
|
||||
tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
|
||||
else
|
||||
tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
|
||||
pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
static inline void cpu_leave_lowpower(u32 core_id)
|
||||
{
|
||||
|
@ -73,8 +49,6 @@ static inline void cpu_leave_lowpower(u32 core_id)
|
|||
: "=&r" (v)
|
||||
: "Ir" (CR_C), "Ir" (0x40)
|
||||
: "cc");
|
||||
|
||||
exynos_set_delayed_reset_assertion(core_id, false);
|
||||
}
|
||||
|
||||
static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
|
||||
|
@ -87,14 +61,6 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
|
|||
/* Turn the CPU off on next WFI instruction. */
|
||||
exynos_cpu_power_down(core_id);
|
||||
|
||||
/*
|
||||
* Exynos4 SoCs require setting
|
||||
* USE_DELAYED_RESET_ASSERTION so the CPU idle
|
||||
* clock down feature could properly detect
|
||||
* global idle state when CPUx is off.
|
||||
*/
|
||||
exynos_set_delayed_reset_assertion(core_id, true);
|
||||
|
||||
wfi();
|
||||
|
||||
if (pen_release == core_id) {
|
||||
|
@ -371,9 +337,6 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
|
|||
udelay(10);
|
||||
}
|
||||
|
||||
/* No harm if this is called during first boot of secondary CPU */
|
||||
exynos_set_delayed_reset_assertion(core_id, false);
|
||||
|
||||
/*
|
||||
* now the secondary core is starting up let it run its
|
||||
* calibrations, then wait for it to finish
|
||||
|
@ -420,6 +383,8 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
|
|||
|
||||
exynos_sysram_init();
|
||||
|
||||
exynos_set_delayed_reset_assertion(true);
|
||||
|
||||
if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
|
||||
scu_enable(scu_base_addr());
|
||||
|
||||
|
|
|
@ -188,7 +188,7 @@ no_clk:
|
|||
args.np = np;
|
||||
args.args_count = 0;
|
||||
child_domain = of_genpd_get_from_provider(&args);
|
||||
if (!child_domain)
|
||||
if (IS_ERR(child_domain))
|
||||
continue;
|
||||
|
||||
if (of_parse_phandle_with_args(np, "power-domains",
|
||||
|
@ -196,7 +196,7 @@ no_clk:
|
|||
continue;
|
||||
|
||||
parent_domain = of_genpd_get_from_provider(&args);
|
||||
if (!parent_domain)
|
||||
if (IS_ERR(parent_domain))
|
||||
continue;
|
||||
|
||||
if (pm_genpd_add_subdomain(parent_domain, child_domain))
|
||||
|
|
|
@ -342,6 +342,8 @@ static void exynos_pm_enter_sleep_mode(void)
|
|||
|
||||
static void exynos_pm_prepare(void)
|
||||
{
|
||||
exynos_set_delayed_reset_assertion(false);
|
||||
|
||||
/* Set wake-up mask registers */
|
||||
exynos_pm_set_wakeup_mask();
|
||||
|
||||
|
@ -482,6 +484,7 @@ early_wakeup:
|
|||
|
||||
/* Clear SLEEP mode set in INFORM1 */
|
||||
pmu_raw_writel(0x0, S5P_INFORM1);
|
||||
exynos_set_delayed_reset_assertion(true);
|
||||
}
|
||||
|
||||
static void exynos3250_pm_resume(void)
|
||||
|
@ -723,8 +726,10 @@ void __init exynos_pm_init(void)
|
|||
return;
|
||||
}
|
||||
|
||||
if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL)))
|
||||
if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL))) {
|
||||
pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
|
||||
return;
|
||||
}
|
||||
|
||||
pm_data = (const struct exynos_pm_data *) match->data;
|
||||
|
||||
|
|
|
@ -12,6 +12,8 @@
|
|||
#ifndef __GEMINI_COMMON_H__
|
||||
#define __GEMINI_COMMON_H__
|
||||
|
||||
#include <linux/reboot.h>
|
||||
|
||||
struct mtd_partition;
|
||||
|
||||
extern void gemini_map_io(void);
|
||||
|
@ -26,6 +28,6 @@ extern int platform_register_pflash(unsigned int size,
|
|||
struct mtd_partition *parts,
|
||||
unsigned int nr_parts);
|
||||
|
||||
extern void gemini_restart(char mode, const char *cmd);
|
||||
extern void gemini_restart(enum reboot_mode mode, const char *cmd);
|
||||
|
||||
#endif /* __GEMINI_COMMON_H__ */
|
||||
|
|
|
@ -14,7 +14,9 @@
|
|||
#include <mach/hardware.h>
|
||||
#include <mach/global_reg.h>
|
||||
|
||||
void gemini_restart(char mode, const char *cmd)
|
||||
#include "common.h"
|
||||
|
||||
void gemini_restart(enum reboot_mode mode, const char *cmd)
|
||||
{
|
||||
__raw_writel(RESET_GLOBAL | RESET_CPU1,
|
||||
IO_ADDRESS(GEMINI_GLOBAL_BASE) + GLOBAL_RESET);
|
||||
|
|
|
@ -280,9 +280,15 @@ void __init imx_gpc_check_dt(void)
|
|||
struct device_node *np;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-gpc");
|
||||
if (WARN_ON(!np ||
|
||||
!of_find_property(np, "interrupt-controller", NULL)))
|
||||
pr_warn("Outdated DT detected, system is about to crash!!!\n");
|
||||
if (WARN_ON(!np))
|
||||
return;
|
||||
|
||||
if (WARN_ON(!of_find_property(np, "interrupt-controller", NULL))) {
|
||||
pr_warn("Outdated DT detected, suspend/resume will NOT work\n");
|
||||
|
||||
/* map GPC, so that at least CPUidle and WARs keep working */
|
||||
gpc_base = of_iomap(np, 0);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM_GENERIC_DOMAINS
|
||||
|
@ -443,6 +449,10 @@ static int imx_gpc_probe(struct platform_device *pdev)
|
|||
struct regulator *pu_reg;
|
||||
int ret;
|
||||
|
||||
/* bail out if DT too old and doesn't provide the necessary info */
|
||||
if (!of_property_read_bool(pdev->dev.of_node, "#power-domain-cells"))
|
||||
return 0;
|
||||
|
||||
pu_reg = devm_regulator_get_optional(&pdev->dev, "pu");
|
||||
if (PTR_ERR(pu_reg) == -ENODEV)
|
||||
pu_reg = NULL;
|
||||
|
|
|
@ -171,6 +171,12 @@
|
|||
*/
|
||||
#define LINKS_PER_OCP_IF 2
|
||||
|
||||
/*
|
||||
* Address offset (in bytes) between the reset control and the reset
|
||||
* status registers: 4 bytes on OMAP4
|
||||
*/
|
||||
#define OMAP4_RST_CTRL_ST_OFFSET 4
|
||||
|
||||
/**
|
||||
* struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
|
||||
* @enable_module: function to enable a module (via MODULEMODE)
|
||||
|
@ -3016,10 +3022,12 @@ static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
|
|||
if (ohri->st_shift)
|
||||
pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
|
||||
oh->name, ohri->name);
|
||||
return omap_prm_deassert_hardreset(ohri->rst_shift, 0,
|
||||
return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift,
|
||||
oh->clkdm->pwrdm.ptr->prcm_partition,
|
||||
oh->clkdm->pwrdm.ptr->prcm_offs,
|
||||
oh->prcm.omap4.rstctrl_offs, 0);
|
||||
oh->prcm.omap4.rstctrl_offs,
|
||||
oh->prcm.omap4.rstctrl_offs +
|
||||
OMAP4_RST_CTRL_ST_OFFSET);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -3047,27 +3055,6 @@ static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
|
|||
oh->prcm.omap4.rstctrl_offs);
|
||||
}
|
||||
|
||||
/**
|
||||
* _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
|
||||
* @oh: struct omap_hwmod * to assert hardreset
|
||||
* @ohri: hardreset line data
|
||||
*
|
||||
* Call am33xx_prminst_assert_hardreset() with parameters extracted
|
||||
* from the hwmod @oh and the hardreset line data @ohri. Only
|
||||
* intended for use as an soc_ops function pointer. Passes along the
|
||||
* return value from am33xx_prminst_assert_hardreset(). XXX This
|
||||
* function is scheduled for removal when the PRM code is moved into
|
||||
* drivers/.
|
||||
*/
|
||||
static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
|
||||
struct omap_hwmod_rst_info *ohri)
|
||||
|
||||
{
|
||||
return omap_prm_assert_hardreset(ohri->rst_shift, 0,
|
||||
oh->clkdm->pwrdm.ptr->prcm_offs,
|
||||
oh->prcm.omap4.rstctrl_offs);
|
||||
}
|
||||
|
||||
/**
|
||||
* _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
|
||||
* @oh: struct omap_hwmod * to deassert hardreset
|
||||
|
@ -3083,32 +3070,13 @@ static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
|
|||
static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
|
||||
struct omap_hwmod_rst_info *ohri)
|
||||
{
|
||||
return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0,
|
||||
return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift,
|
||||
oh->clkdm->pwrdm.ptr->prcm_partition,
|
||||
oh->clkdm->pwrdm.ptr->prcm_offs,
|
||||
oh->prcm.omap4.rstctrl_offs,
|
||||
oh->prcm.omap4.rstst_offs);
|
||||
}
|
||||
|
||||
/**
|
||||
* _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
|
||||
* @oh: struct omap_hwmod * to test hardreset
|
||||
* @ohri: hardreset line data
|
||||
*
|
||||
* Call am33xx_prminst_is_hardreset_asserted() with parameters
|
||||
* extracted from the hwmod @oh and the hardreset line data @ohri.
|
||||
* Only intended for use as an soc_ops function pointer. Passes along
|
||||
* the return value from am33xx_prminst_is_hardreset_asserted(). XXX
|
||||
* This function is scheduled for removal when the PRM code is moved
|
||||
* into drivers/.
|
||||
*/
|
||||
static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
|
||||
struct omap_hwmod_rst_info *ohri)
|
||||
{
|
||||
return omap_prm_is_hardreset_asserted(ohri->rst_shift, 0,
|
||||
oh->clkdm->pwrdm.ptr->prcm_offs,
|
||||
oh->prcm.omap4.rstctrl_offs);
|
||||
}
|
||||
|
||||
/* Public functions */
|
||||
|
||||
u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
|
||||
|
@ -3908,21 +3876,13 @@ void __init omap_hwmod_init(void)
|
|||
soc_ops.init_clkdm = _init_clkdm;
|
||||
soc_ops.update_context_lost = _omap4_update_context_lost;
|
||||
soc_ops.get_context_lost = _omap4_get_context_lost;
|
||||
} else if (soc_is_am43xx()) {
|
||||
} else if (cpu_is_ti816x() || soc_is_am33xx() || soc_is_am43xx()) {
|
||||
soc_ops.enable_module = _omap4_enable_module;
|
||||
soc_ops.disable_module = _omap4_disable_module;
|
||||
soc_ops.wait_target_ready = _omap4_wait_target_ready;
|
||||
soc_ops.assert_hardreset = _omap4_assert_hardreset;
|
||||
soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
|
||||
soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
|
||||
soc_ops.init_clkdm = _init_clkdm;
|
||||
} else if (cpu_is_ti816x() || soc_is_am33xx()) {
|
||||
soc_ops.enable_module = _omap4_enable_module;
|
||||
soc_ops.disable_module = _omap4_disable_module;
|
||||
soc_ops.wait_target_ready = _omap4_wait_target_ready;
|
||||
soc_ops.assert_hardreset = _am33xx_assert_hardreset;
|
||||
soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
|
||||
soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
|
||||
soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
|
||||
soc_ops.init_clkdm = _init_clkdm;
|
||||
} else {
|
||||
WARN(1, "omap_hwmod: unknown SoC type\n");
|
||||
|
|
|
@ -544,6 +544,44 @@ static struct omap_hwmod am43xx_hdq1w_hwmod = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class_sysconfig am43xx_vpfe_sysc = {
|
||||
.rev_offs = 0x0,
|
||||
.sysc_offs = 0x104,
|
||||
.sysc_flags = SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE,
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
MSTANDBY_FORCE | MSTANDBY_SMART | MSTANDBY_NO),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class am43xx_vpfe_hwmod_class = {
|
||||
.name = "vpfe",
|
||||
.sysc = &am43xx_vpfe_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod am43xx_vpfe0_hwmod = {
|
||||
.name = "vpfe0",
|
||||
.class = &am43xx_vpfe_hwmod_class,
|
||||
.clkdm_name = "l3s_clkdm",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.modulemode = MODULEMODE_SWCTRL,
|
||||
.clkctrl_offs = AM43XX_CM_PER_VPFE0_CLKCTRL_OFFSET,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap_hwmod am43xx_vpfe1_hwmod = {
|
||||
.name = "vpfe1",
|
||||
.class = &am43xx_vpfe_hwmod_class,
|
||||
.clkdm_name = "l3s_clkdm",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.modulemode = MODULEMODE_SWCTRL,
|
||||
.clkctrl_offs = AM43XX_CM_PER_VPFE1_CLKCTRL_OFFSET,
|
||||
},
|
||||
},
|
||||
};
|
||||
|
||||
/* Interfaces */
|
||||
static struct omap_hwmod_ocp_if am43xx_l3_main__l4_hs = {
|
||||
.master = &am33xx_l3_main_hwmod,
|
||||
|
@ -825,6 +863,34 @@ static struct omap_hwmod_ocp_if am43xx_l4_ls__hdq1w = {
|
|||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if am43xx_l3__vpfe0 = {
|
||||
.master = &am43xx_vpfe0_hwmod,
|
||||
.slave = &am33xx_l3_main_hwmod,
|
||||
.clk = "l3_gclk",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if am43xx_l3__vpfe1 = {
|
||||
.master = &am43xx_vpfe1_hwmod,
|
||||
.slave = &am33xx_l3_main_hwmod,
|
||||
.clk = "l3_gclk",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if am43xx_l4_ls__vpfe0 = {
|
||||
.master = &am33xx_l4_ls_hwmod,
|
||||
.slave = &am43xx_vpfe0_hwmod,
|
||||
.clk = "l4ls_gclk",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if am43xx_l4_ls__vpfe1 = {
|
||||
.master = &am33xx_l4_ls_hwmod,
|
||||
.slave = &am43xx_vpfe1_hwmod,
|
||||
.clk = "l4ls_gclk",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
|
||||
&am33xx_l4_wkup__synctimer,
|
||||
&am43xx_l4_ls__timer8,
|
||||
|
@ -925,6 +991,10 @@ static struct omap_hwmod_ocp_if *am43xx_hwmod_ocp_ifs[] __initdata = {
|
|||
&am43xx_l4_ls__dss_dispc,
|
||||
&am43xx_l4_ls__dss_rfbi,
|
||||
&am43xx_l4_ls__hdq1w,
|
||||
&am43xx_l3__vpfe0,
|
||||
&am43xx_l3__vpfe1,
|
||||
&am43xx_l4_ls__vpfe0,
|
||||
&am43xx_l4_ls__vpfe1,
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
|
|
@ -144,5 +144,6 @@
|
|||
#define AM43XX_CM_PER_USBPHYOCP2SCP1_CLKCTRL_OFFSET 0x05C0
|
||||
#define AM43XX_CM_PER_DSS_CLKCTRL_OFFSET 0x0a20
|
||||
#define AM43XX_CM_PER_HDQ1W_CLKCTRL_OFFSET 0x04a0
|
||||
|
||||
#define AM43XX_CM_PER_VPFE0_CLKCTRL_OFFSET 0x0068
|
||||
#define AM43XX_CM_PER_VPFE1_CLKCTRL_OFFSET 0x0070
|
||||
#endif
|
||||
|
|
|
@ -87,12 +87,6 @@ u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst,
|
|||
return v;
|
||||
}
|
||||
|
||||
/*
|
||||
* Address offset (in bytes) between the reset control and the reset
|
||||
* status registers: 4 bytes on OMAP4
|
||||
*/
|
||||
#define OMAP4_RST_CTRL_ST_OFFSET 4
|
||||
|
||||
/**
|
||||
* omap4_prminst_is_hardreset_asserted - read the HW reset line state of
|
||||
* submodules contained in the hwmod module
|
||||
|
@ -141,11 +135,11 @@ int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
|
|||
* omap4_prminst_deassert_hardreset - deassert a submodule hardreset line and
|
||||
* wait
|
||||
* @shift: register bit shift corresponding to the reset line to deassert
|
||||
* @st_shift: status bit offset, not used for OMAP4+
|
||||
* @st_shift: status bit offset corresponding to the reset line
|
||||
* @part: PRM partition
|
||||
* @inst: PRM instance offset
|
||||
* @rstctrl_offs: reset register offset
|
||||
* @st_offs: reset status register offset, not used for OMAP4+
|
||||
* @rstst_offs: reset status register offset
|
||||
*
|
||||
* Some IPs like dsp, ipu or iva contain processors that require an HW
|
||||
* reset line to be asserted / deasserted in order to fully enable the
|
||||
|
@ -157,11 +151,11 @@ int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
|
|||
* of reset, or -EBUSY if the submodule did not exit reset promptly.
|
||||
*/
|
||||
int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst,
|
||||
u16 rstctrl_offs, u16 st_offs)
|
||||
u16 rstctrl_offs, u16 rstst_offs)
|
||||
{
|
||||
int c;
|
||||
u32 mask = 1 << shift;
|
||||
u16 rstst_offs = rstctrl_offs + OMAP4_RST_CTRL_ST_OFFSET;
|
||||
u32 st_mask = 1 << st_shift;
|
||||
|
||||
/* Check the current status to avoid de-asserting the line twice */
|
||||
if (omap4_prminst_is_hardreset_asserted(shift, part, inst,
|
||||
|
@ -169,13 +163,13 @@ int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst,
|
|||
return -EEXIST;
|
||||
|
||||
/* Clear the reset status by writing 1 to the status bit */
|
||||
omap4_prminst_rmw_inst_reg_bits(0xffffffff, mask, part, inst,
|
||||
omap4_prminst_rmw_inst_reg_bits(0xffffffff, st_mask, part, inst,
|
||||
rstst_offs);
|
||||
/* de-assert the reset control line */
|
||||
omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs);
|
||||
/* wait the status to be set */
|
||||
omap_test_timeout(omap4_prminst_is_hardreset_asserted(shift, part, inst,
|
||||
rstst_offs),
|
||||
omap_test_timeout(omap4_prminst_is_hardreset_asserted(st_shift, part,
|
||||
inst, rstst_offs),
|
||||
MAX_MODULE_HARDRESET_WAIT, c);
|
||||
|
||||
return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0;
|
||||
|
|
|
@ -298,14 +298,11 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer,
|
|||
if (IS_ERR(src))
|
||||
return PTR_ERR(src);
|
||||
|
||||
if (clk_get_parent(timer->fclk) != src) {
|
||||
r = clk_set_parent(timer->fclk, src);
|
||||
if (r < 0) {
|
||||
pr_warn("%s: %s cannot set source\n", __func__,
|
||||
oh->name);
|
||||
clk_put(src);
|
||||
return r;
|
||||
}
|
||||
r = clk_set_parent(timer->fclk, src);
|
||||
if (r < 0) {
|
||||
pr_warn("%s: %s cannot set source\n", __func__, oh->name);
|
||||
clk_put(src);
|
||||
return r;
|
||||
}
|
||||
|
||||
clk_put(src);
|
||||
|
|
|
@ -107,7 +107,7 @@ static int cplds_probe(struct platform_device *pdev)
|
|||
struct resource *res;
|
||||
struct cplds *fpga;
|
||||
int ret;
|
||||
unsigned int base_irq = 0;
|
||||
int base_irq;
|
||||
unsigned long irqflags = 0;
|
||||
|
||||
fpga = devm_kzalloc(&pdev->dev, sizeof(*fpga), GFP_KERNEL);
|
||||
|
|
|
@ -44,11 +44,9 @@ static void __iomem *rk3288_bootram_base;
|
|||
static phys_addr_t rk3288_bootram_phy;
|
||||
|
||||
static struct regmap *pmu_regmap;
|
||||
static struct regmap *grf_regmap;
|
||||
static struct regmap *sgrf_regmap;
|
||||
|
||||
static u32 rk3288_pmu_pwr_mode_con;
|
||||
static u32 rk3288_grf_soc_con0;
|
||||
static u32 rk3288_sgrf_soc_con0;
|
||||
|
||||
static inline u32 rk3288_l2_config(void)
|
||||
|
@ -72,25 +70,11 @@ static void rk3288_slp_mode_set(int level)
|
|||
{
|
||||
u32 mode_set, mode_set1;
|
||||
|
||||
regmap_read(grf_regmap, RK3288_GRF_SOC_CON0, &rk3288_grf_soc_con0);
|
||||
|
||||
regmap_read(sgrf_regmap, RK3288_SGRF_SOC_CON0, &rk3288_sgrf_soc_con0);
|
||||
|
||||
regmap_read(pmu_regmap, RK3288_PMU_PWRMODE_CON,
|
||||
&rk3288_pmu_pwr_mode_con);
|
||||
|
||||
/*
|
||||
* We need set this bit GRF_FORCE_JTAG here, for the debug module,
|
||||
* otherwise, it may become inaccessible after resume.
|
||||
* This creates a potential security issue, as the sdmmc pins may
|
||||
* accept jtag data for a short time during resume if no card is
|
||||
* inserted.
|
||||
* But this is of course also true for the regular boot, before we
|
||||
* turn of the jtag/sdmmc autodetect.
|
||||
*/
|
||||
regmap_write(grf_regmap, RK3288_GRF_SOC_CON0, GRF_FORCE_JTAG |
|
||||
GRF_FORCE_JTAG_WRITE);
|
||||
|
||||
/*
|
||||
* SGRF_FAST_BOOT_EN - system to boot from FAST_BOOT_ADDR
|
||||
* PCLK_WDT_GATE - disable WDT during suspend.
|
||||
|
@ -151,9 +135,6 @@ static void rk3288_slp_mode_set_resume(void)
|
|||
regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0,
|
||||
rk3288_sgrf_soc_con0 | SGRF_PCLK_WDT_GATE_WRITE
|
||||
| SGRF_FAST_BOOT_EN_WRITE);
|
||||
|
||||
regmap_write(grf_regmap, RK3288_GRF_SOC_CON0, rk3288_grf_soc_con0 |
|
||||
GRF_FORCE_JTAG_WRITE);
|
||||
}
|
||||
|
||||
static int rockchip_lpmode_enter(unsigned long arg)
|
||||
|
@ -212,13 +193,6 @@ static int rk3288_suspend_init(struct device_node *np)
|
|||
return PTR_ERR(pmu_regmap);
|
||||
}
|
||||
|
||||
grf_regmap = syscon_regmap_lookup_by_compatible(
|
||||
"rockchip,rk3288-grf");
|
||||
if (IS_ERR(grf_regmap)) {
|
||||
pr_err("%s: could not find grf regmap\n", __func__);
|
||||
return PTR_ERR(pmu_regmap);
|
||||
}
|
||||
|
||||
sram_np = of_find_compatible_node(NULL, NULL,
|
||||
"rockchip,rk3288-pmu-sram");
|
||||
if (!sram_np) {
|
||||
|
|
|
@ -48,10 +48,6 @@ static inline void rockchip_suspend_init(void)
|
|||
#define RK3288_PMU_WAKEUP_RST_CLR_CNT 0x44
|
||||
#define RK3288_PMU_PWRMODE_CON1 0x90
|
||||
|
||||
#define RK3288_GRF_SOC_CON0 0x244
|
||||
#define GRF_FORCE_JTAG BIT(12)
|
||||
#define GRF_FORCE_JTAG_WRITE BIT(28)
|
||||
|
||||
#define RK3288_SGRF_SOC_CON0 (0x0000)
|
||||
#define RK3288_SGRF_FAST_BOOT_ADDR (0x0120)
|
||||
#define SGRF_PCLK_WDT_GATE BIT(6)
|
||||
|
|
|
@ -1112,22 +1112,22 @@ void __init sanity_check_meminfo(void)
|
|||
}
|
||||
|
||||
/*
|
||||
* Find the first non-section-aligned page, and point
|
||||
* Find the first non-pmd-aligned page, and point
|
||||
* memblock_limit at it. This relies on rounding the
|
||||
* limit down to be section-aligned, which happens at
|
||||
* the end of this function.
|
||||
* limit down to be pmd-aligned, which happens at the
|
||||
* end of this function.
|
||||
*
|
||||
* With this algorithm, the start or end of almost any
|
||||
* bank can be non-section-aligned. The only exception
|
||||
* is that the start of the bank 0 must be section-
|
||||
* bank can be non-pmd-aligned. The only exception is
|
||||
* that the start of the bank 0 must be section-
|
||||
* aligned, since otherwise memory would need to be
|
||||
* allocated when mapping the start of bank 0, which
|
||||
* occurs before any free memory is mapped.
|
||||
*/
|
||||
if (!memblock_limit) {
|
||||
if (!IS_ALIGNED(block_start, SECTION_SIZE))
|
||||
if (!IS_ALIGNED(block_start, PMD_SIZE))
|
||||
memblock_limit = block_start;
|
||||
else if (!IS_ALIGNED(block_end, SECTION_SIZE))
|
||||
else if (!IS_ALIGNED(block_end, PMD_SIZE))
|
||||
memblock_limit = arm_lowmem_limit;
|
||||
}
|
||||
|
||||
|
@ -1137,12 +1137,12 @@ void __init sanity_check_meminfo(void)
|
|||
high_memory = __va(arm_lowmem_limit - 1) + 1;
|
||||
|
||||
/*
|
||||
* Round the memblock limit down to a section size. This
|
||||
* Round the memblock limit down to a pmd size. This
|
||||
* helps to ensure that we will allocate memory from the
|
||||
* last full section, which should be mapped.
|
||||
* last full pmd, which should be mapped.
|
||||
*/
|
||||
if (memblock_limit)
|
||||
memblock_limit = round_down(memblock_limit, SECTION_SIZE);
|
||||
memblock_limit = round_down(memblock_limit, PMD_SIZE);
|
||||
if (!memblock_limit)
|
||||
memblock_limit = arm_lowmem_limit;
|
||||
|
||||
|
|
|
@ -54,6 +54,7 @@
|
|||
#define SEEN_DATA (1 << (BPF_MEMWORDS + 3))
|
||||
|
||||
#define FLAG_NEED_X_RESET (1 << 0)
|
||||
#define FLAG_IMM_OVERFLOW (1 << 1)
|
||||
|
||||
struct jit_ctx {
|
||||
const struct bpf_prog *skf;
|
||||
|
@ -293,6 +294,15 @@ static u16 imm_offset(u32 k, struct jit_ctx *ctx)
|
|||
/* PC in ARM mode == address of the instruction + 8 */
|
||||
imm = offset - (8 + ctx->idx * 4);
|
||||
|
||||
if (imm & ~0xfff) {
|
||||
/*
|
||||
* literal pool is too far, signal it into flags. we
|
||||
* can only detect it on the second pass unfortunately.
|
||||
*/
|
||||
ctx->flags |= FLAG_IMM_OVERFLOW;
|
||||
return 0;
|
||||
}
|
||||
|
||||
return imm;
|
||||
}
|
||||
|
||||
|
@ -449,10 +459,21 @@ static inline void emit_udiv(u8 rd, u8 rm, u8 rn, struct jit_ctx *ctx)
|
|||
return;
|
||||
}
|
||||
#endif
|
||||
if (rm != ARM_R0)
|
||||
emit(ARM_MOV_R(ARM_R0, rm), ctx);
|
||||
|
||||
/*
|
||||
* For BPF_ALU | BPF_DIV | BPF_K instructions, rm is ARM_R4
|
||||
* (r_A) and rn is ARM_R0 (r_scratch) so load rn first into
|
||||
* ARM_R1 to avoid accidentally overwriting ARM_R0 with rm
|
||||
* before using it as a source for ARM_R1.
|
||||
*
|
||||
* For BPF_ALU | BPF_DIV | BPF_X rm is ARM_R4 (r_A) and rn is
|
||||
* ARM_R5 (r_X) so there is no particular register overlap
|
||||
* issues.
|
||||
*/
|
||||
if (rn != ARM_R1)
|
||||
emit(ARM_MOV_R(ARM_R1, rn), ctx);
|
||||
if (rm != ARM_R0)
|
||||
emit(ARM_MOV_R(ARM_R0, rm), ctx);
|
||||
|
||||
ctx->seen |= SEEN_CALL;
|
||||
emit_mov_i(ARM_R3, (u32)jit_udiv, ctx);
|
||||
|
@ -855,6 +876,14 @@ b_epilogue:
|
|||
default:
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (ctx->flags & FLAG_IMM_OVERFLOW)
|
||||
/*
|
||||
* this instruction generated an overflow when
|
||||
* trying to access the literal pool, so
|
||||
* delegate this filter to the kernel interpreter.
|
||||
*/
|
||||
return -1;
|
||||
}
|
||||
|
||||
/* compute offsets only during the first pass */
|
||||
|
@ -917,7 +946,14 @@ void bpf_jit_compile(struct bpf_prog *fp)
|
|||
ctx.idx = 0;
|
||||
|
||||
build_prologue(&ctx);
|
||||
build_body(&ctx);
|
||||
if (build_body(&ctx) < 0) {
|
||||
#if __LINUX_ARM_ARCH__ < 7
|
||||
if (ctx.imm_count)
|
||||
kfree(ctx.imms);
|
||||
#endif
|
||||
bpf_jit_binary_free(header);
|
||||
goto out;
|
||||
}
|
||||
build_epilogue(&ctx);
|
||||
|
||||
flush_icache_range((u32)ctx.target, (u32)(ctx.target + ctx.idx));
|
||||
|
|
|
@ -272,6 +272,7 @@ void xen_arch_pre_suspend(void) { }
|
|||
void xen_arch_post_suspend(int suspend_cancelled) { }
|
||||
void xen_timer_resume(void) { }
|
||||
void xen_arch_resume(void) { }
|
||||
void xen_arch_suspend(void) { }
|
||||
|
||||
|
||||
/* In the hypervisor.S file. */
|
||||
|
|
|
@ -21,6 +21,20 @@
|
|||
clock-output-names = "juno_mb:clk25mhz";
|
||||
};
|
||||
|
||||
v2m_refclk1mhz: refclk1mhz {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <1000000>;
|
||||
clock-output-names = "juno_mb:refclk1mhz";
|
||||
};
|
||||
|
||||
v2m_refclk32khz: refclk32khz {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <32768>;
|
||||
clock-output-names = "juno_mb:refclk32khz";
|
||||
};
|
||||
|
||||
motherboard {
|
||||
compatible = "arm,vexpress,v2p-p1", "simple-bus";
|
||||
#address-cells = <2>; /* SMB chipselect number and offset */
|
||||
|
@ -66,6 +80,15 @@
|
|||
#size-cells = <1>;
|
||||
ranges = <0 3 0 0x200000>;
|
||||
|
||||
v2m_sysctl: sysctl@020000 {
|
||||
compatible = "arm,sp810", "arm,primecell";
|
||||
reg = <0x020000 0x1000>;
|
||||
clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
|
||||
clock-names = "refclk", "timclk", "apb_pclk";
|
||||
#clock-cells = <1>;
|
||||
clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
|
||||
};
|
||||
|
||||
mmci@050000 {
|
||||
compatible = "arm,pl180", "arm,primecell";
|
||||
reg = <0x050000 0x1000>;
|
||||
|
@ -106,16 +129,16 @@
|
|||
compatible = "arm,sp804", "arm,primecell";
|
||||
reg = <0x110000 0x10000>;
|
||||
interrupts = <9>;
|
||||
clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
|
||||
clock-names = "timclken1", "apb_pclk";
|
||||
clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&mb_clk24mhz>;
|
||||
clock-names = "timclken1", "timclken2", "apb_pclk";
|
||||
};
|
||||
|
||||
v2m_timer23: timer@120000 {
|
||||
compatible = "arm,sp804", "arm,primecell";
|
||||
reg = <0x120000 0x10000>;
|
||||
interrupts = <9>;
|
||||
clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
|
||||
clock-names = "timclken1", "apb_pclk";
|
||||
clocks = <&v2m_sysctl 2>, <&v2m_sysctl 3>, <&mb_clk24mhz>;
|
||||
clock-names = "timclken1", "timclken2", "apb_pclk";
|
||||
};
|
||||
|
||||
rtc@170000 {
|
||||
|
|
|
@ -147,13 +147,21 @@ static int chksum_final(struct shash_desc *desc, u8 *out)
|
|||
{
|
||||
struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
|
||||
|
||||
put_unaligned_le32(ctx->crc, out);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int chksumc_final(struct shash_desc *desc, u8 *out)
|
||||
{
|
||||
struct chksum_desc_ctx *ctx = shash_desc_ctx(desc);
|
||||
|
||||
put_unaligned_le32(~ctx->crc, out);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __chksum_finup(u32 crc, const u8 *data, unsigned int len, u8 *out)
|
||||
{
|
||||
put_unaligned_le32(~crc32_arm64_le_hw(crc, data, len), out);
|
||||
put_unaligned_le32(crc32_arm64_le_hw(crc, data, len), out);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -199,6 +207,14 @@ static int crc32_cra_init(struct crypto_tfm *tfm)
|
|||
{
|
||||
struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);
|
||||
|
||||
mctx->key = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int crc32c_cra_init(struct crypto_tfm *tfm)
|
||||
{
|
||||
struct chksum_ctx *mctx = crypto_tfm_ctx(tfm);
|
||||
|
||||
mctx->key = ~0;
|
||||
return 0;
|
||||
}
|
||||
|
@ -229,7 +245,7 @@ static struct shash_alg crc32c_alg = {
|
|||
.setkey = chksum_setkey,
|
||||
.init = chksum_init,
|
||||
.update = chksumc_update,
|
||||
.final = chksum_final,
|
||||
.final = chksumc_final,
|
||||
.finup = chksumc_finup,
|
||||
.digest = chksumc_digest,
|
||||
.descsize = sizeof(struct chksum_desc_ctx),
|
||||
|
@ -241,7 +257,7 @@ static struct shash_alg crc32c_alg = {
|
|||
.cra_alignmask = 0,
|
||||
.cra_ctxsize = sizeof(struct chksum_ctx),
|
||||
.cra_module = THIS_MODULE,
|
||||
.cra_init = crc32_cra_init,
|
||||
.cra_init = crc32c_cra_init,
|
||||
}
|
||||
};
|
||||
|
||||
|
|
|
@ -74,6 +74,9 @@ static int sha1_ce_finup(struct shash_desc *desc, const u8 *data,
|
|||
|
||||
static int sha1_ce_final(struct shash_desc *desc, u8 *out)
|
||||
{
|
||||
struct sha1_ce_state *sctx = shash_desc_ctx(desc);
|
||||
|
||||
sctx->finalize = 0;
|
||||
kernel_neon_begin_partial(16);
|
||||
sha1_base_do_finalize(desc, (sha1_block_fn *)sha1_ce_transform);
|
||||
kernel_neon_end();
|
||||
|
|
|
@ -75,6 +75,9 @@ static int sha256_ce_finup(struct shash_desc *desc, const u8 *data,
|
|||
|
||||
static int sha256_ce_final(struct shash_desc *desc, u8 *out)
|
||||
{
|
||||
struct sha256_ce_state *sctx = shash_desc_ctx(desc);
|
||||
|
||||
sctx->finalize = 0;
|
||||
kernel_neon_begin_partial(28);
|
||||
sha256_base_do_finalize(desc, (sha256_block_fn *)sha2_ce_transform);
|
||||
kernel_neon_end();
|
||||
|
|
|
@ -24,7 +24,6 @@
|
|||
#include <asm/cacheflush.h>
|
||||
#include <asm/alternative.h>
|
||||
#include <asm/cpufeature.h>
|
||||
#include <asm/insn.h>
|
||||
#include <linux/stop_machine.h>
|
||||
|
||||
extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
|
||||
|
@ -34,48 +33,6 @@ struct alt_region {
|
|||
struct alt_instr *end;
|
||||
};
|
||||
|
||||
/*
|
||||
* Decode the imm field of a b/bl instruction, and return the byte
|
||||
* offset as a signed value (so it can be used when computing a new
|
||||
* branch target).
|
||||
*/
|
||||
static s32 get_branch_offset(u32 insn)
|
||||
{
|
||||
s32 imm = aarch64_insn_decode_immediate(AARCH64_INSN_IMM_26, insn);
|
||||
|
||||
/* sign-extend the immediate before turning it into a byte offset */
|
||||
return (imm << 6) >> 4;
|
||||
}
|
||||
|
||||
static u32 get_alt_insn(u8 *insnptr, u8 *altinsnptr)
|
||||
{
|
||||
u32 insn;
|
||||
|
||||
aarch64_insn_read(altinsnptr, &insn);
|
||||
|
||||
/* Stop the world on instructions we don't support... */
|
||||
BUG_ON(aarch64_insn_is_cbz(insn));
|
||||
BUG_ON(aarch64_insn_is_cbnz(insn));
|
||||
BUG_ON(aarch64_insn_is_bcond(insn));
|
||||
/* ... and there is probably more. */
|
||||
|
||||
if (aarch64_insn_is_b(insn) || aarch64_insn_is_bl(insn)) {
|
||||
enum aarch64_insn_branch_type type;
|
||||
unsigned long target;
|
||||
|
||||
if (aarch64_insn_is_b(insn))
|
||||
type = AARCH64_INSN_BRANCH_NOLINK;
|
||||
else
|
||||
type = AARCH64_INSN_BRANCH_LINK;
|
||||
|
||||
target = (unsigned long)altinsnptr + get_branch_offset(insn);
|
||||
insn = aarch64_insn_gen_branch_imm((unsigned long)insnptr,
|
||||
target, type);
|
||||
}
|
||||
|
||||
return insn;
|
||||
}
|
||||
|
||||
static int __apply_alternatives(void *alt_region)
|
||||
{
|
||||
struct alt_instr *alt;
|
||||
|
@ -83,9 +40,6 @@ static int __apply_alternatives(void *alt_region)
|
|||
u8 *origptr, *replptr;
|
||||
|
||||
for (alt = region->begin; alt < region->end; alt++) {
|
||||
u32 insn;
|
||||
int i;
|
||||
|
||||
if (!cpus_have_cap(alt->cpufeature))
|
||||
continue;
|
||||
|
||||
|
@ -95,12 +49,7 @@ static int __apply_alternatives(void *alt_region)
|
|||
|
||||
origptr = (u8 *)&alt->orig_offset + alt->orig_offset;
|
||||
replptr = (u8 *)&alt->alt_offset + alt->alt_offset;
|
||||
|
||||
for (i = 0; i < alt->alt_len; i += sizeof(insn)) {
|
||||
insn = get_alt_insn(origptr + i, replptr + i);
|
||||
aarch64_insn_write(origptr + i, insn);
|
||||
}
|
||||
|
||||
memcpy(origptr, replptr, alt->alt_len);
|
||||
flush_icache_range((uintptr_t)origptr,
|
||||
(uintptr_t)(origptr + alt->alt_len));
|
||||
}
|
||||
|
|
|
@ -1315,15 +1315,15 @@ static int armpmu_device_probe(struct platform_device *pdev)
|
|||
if (!cpu_pmu)
|
||||
return -ENODEV;
|
||||
|
||||
irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
|
||||
if (!irqs)
|
||||
return -ENOMEM;
|
||||
|
||||
/* Don't bother with PPIs; they're already affine */
|
||||
irq = platform_get_irq(pdev, 0);
|
||||
if (irq >= 0 && irq_is_percpu(irq))
|
||||
return 0;
|
||||
|
||||
irqs = kcalloc(pdev->num_resources, sizeof(*irqs), GFP_KERNEL);
|
||||
if (!irqs)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < pdev->num_resources; ++i) {
|
||||
struct device_node *dn;
|
||||
int cpu;
|
||||
|
|
|
@ -328,10 +328,12 @@ static int ptdump_init(void)
|
|||
for (j = 0; j < pg_level[i].num; j++)
|
||||
pg_level[i].mask |= pg_level[i].bits[j].mask;
|
||||
|
||||
#ifdef CONFIG_SPARSEMEM_VMEMMAP
|
||||
address_markers[VMEMMAP_START_NR].start_address =
|
||||
(unsigned long)virt_to_page(PAGE_OFFSET);
|
||||
address_markers[VMEMMAP_END_NR].start_address =
|
||||
(unsigned long)virt_to_page(high_memory);
|
||||
#endif
|
||||
|
||||
pe = debugfs_create_file("kernel_page_tables", 0400, NULL, NULL,
|
||||
&ptdump_fops);
|
||||
|
|
|
@ -487,7 +487,7 @@ emit_cond_jmp:
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
imm64 = (u64)insn1.imm << 32 | imm;
|
||||
imm64 = (u64)insn1.imm << 32 | (u32)imm;
|
||||
emit_a64_mov_i64(dst, imm64, ctx);
|
||||
|
||||
return 1;
|
||||
|
|
|
@ -478,9 +478,16 @@ struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
|
|||
|
||||
int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
|
||||
{
|
||||
struct pci_controller *controller = bridge->bus->sysdata;
|
||||
|
||||
ACPI_COMPANION_SET(&bridge->dev, controller->companion);
|
||||
/*
|
||||
* We pass NULL as parent to pci_create_root_bus(), so if it is not NULL
|
||||
* here, pci_create_root_bus() has been called by someone else and
|
||||
* sysdata is likely to be different from what we expect. Let it go in
|
||||
* that case.
|
||||
*/
|
||||
if (!bridge->dev.parent) {
|
||||
struct pci_controller *controller = bridge->bus->sysdata;
|
||||
ACPI_COMPANION_SET(&bridge->dev, controller->companion);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -277,7 +277,7 @@ LDFLAGS += -m $(ld-emul)
|
|||
ifdef CONFIG_MIPS
|
||||
CHECKFLAGS += $(shell $(CC) $(KBUILD_CFLAGS) -dM -E -x c /dev/null | \
|
||||
egrep -vw '__GNUC_(|MINOR_|PATCHLEVEL_)_' | \
|
||||
sed -e "s/^\#define /-D'/" -e "s/ /'='/" -e "s/$$/'/")
|
||||
sed -e "s/^\#define /-D'/" -e "s/ /'='/" -e "s/$$/'/" -e 's/\$$/&&/g')
|
||||
ifdef CONFIG_64BIT
|
||||
CHECKFLAGS += -m64
|
||||
endif
|
||||
|
|
|
@ -1,6 +1,7 @@
|
|||
/*
|
||||
* Atheros AR71XX/AR724X/AR913X specific prom routines
|
||||
*
|
||||
* Copyright (C) 2015 Laurent Fasnacht <l@libres.ch>
|
||||
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
|
||||
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
|
||||
*
|
||||
|
@ -25,12 +26,14 @@ void __init prom_init(void)
|
|||
{
|
||||
fw_init_cmdline();
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
/* Read the initrd address from the firmware environment */
|
||||
initrd_start = fw_getenvl("initrd_start");
|
||||
if (initrd_start) {
|
||||
initrd_start = KSEG0ADDR(initrd_start);
|
||||
initrd_end = initrd_start + fw_getenvl("initrd_size");
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
void __init prom_free_prom_memory(void)
|
||||
|
|
|
@ -194,7 +194,7 @@ CONFIG_USB_WUSB_CBAF=m
|
|||
CONFIG_USB_C67X00_HCD=m
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_ROOT_HUB_TT=y
|
||||
CONFIG_USB_ISP1760_HCD=m
|
||||
CONFIG_USB_ISP1760=m
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_UHCI_HCD=m
|
||||
CONFIG_USB_R8A66597_HCD=m
|
||||
|
|
|
@ -304,7 +304,7 @@ do { \
|
|||
\
|
||||
current->thread.abi = &mips_abi; \
|
||||
\
|
||||
current->thread.fpu.fcr31 = current_cpu_data.fpu_csr31; \
|
||||
current->thread.fpu.fcr31 = boot_cpu_data.fpu_csr31; \
|
||||
} while (0)
|
||||
|
||||
#endif /* CONFIG_32BIT */
|
||||
|
@ -366,7 +366,7 @@ do { \
|
|||
else \
|
||||
current->thread.abi = &mips_abi; \
|
||||
\
|
||||
current->thread.fpu.fcr31 = current_cpu_data.fpu_csr31; \
|
||||
current->thread.fpu.fcr31 = boot_cpu_data.fpu_csr31; \
|
||||
\
|
||||
p = personality(current->personality); \
|
||||
if (p != PER_LINUX32 && p != PER_LINUX) \
|
||||
|
|
|
@ -45,7 +45,7 @@ extern int __cpu_logical_map[NR_CPUS];
|
|||
#define SMP_DUMP 0x8
|
||||
#define SMP_ASK_C0COUNT 0x10
|
||||
|
||||
extern volatile cpumask_t cpu_callin_map;
|
||||
extern cpumask_t cpu_callin_map;
|
||||
|
||||
/* Mask of CPUs which are currently definitely operating coherently */
|
||||
extern cpumask_t cpu_coherent_mask;
|
||||
|
|
|
@ -76,14 +76,6 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
|
|||
|
||||
/* Lets see if this is an O32 ELF */
|
||||
if (ehdr32->e_ident[EI_CLASS] == ELFCLASS32) {
|
||||
/* FR = 1 for N32 */
|
||||
if (ehdr32->e_flags & EF_MIPS_ABI2)
|
||||
state->overall_fp_mode = FP_FR1;
|
||||
else
|
||||
/* Set a good default FPU mode for O32 */
|
||||
state->overall_fp_mode = cpu_has_mips_r6 ?
|
||||
FP_FRE : FP_FR0;
|
||||
|
||||
if (ehdr32->e_flags & EF_MIPS_FP64) {
|
||||
/*
|
||||
* Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it
|
||||
|
@ -104,9 +96,6 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
|
|||
(char *)&abiflags,
|
||||
sizeof(abiflags));
|
||||
} else {
|
||||
/* FR=1 is really the only option for 64-bit */
|
||||
state->overall_fp_mode = FP_FR1;
|
||||
|
||||
if (phdr64->p_type != PT_MIPS_ABIFLAGS)
|
||||
return 0;
|
||||
if (phdr64->p_filesz < sizeof(abiflags))
|
||||
|
@ -137,6 +126,7 @@ int arch_check_elf(void *_ehdr, bool has_interpreter,
|
|||
struct elf32_hdr *ehdr = _ehdr;
|
||||
struct mode_req prog_req, interp_req;
|
||||
int fp_abi, interp_fp_abi, abi0, abi1, max_abi;
|
||||
bool is_mips64;
|
||||
|
||||
if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
|
||||
return 0;
|
||||
|
@ -152,10 +142,22 @@ int arch_check_elf(void *_ehdr, bool has_interpreter,
|
|||
abi0 = abi1 = fp_abi;
|
||||
}
|
||||
|
||||
/* ABI limits. O32 = FP_64A, N32/N64 = FP_SOFT */
|
||||
max_abi = ((ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
|
||||
(!(ehdr->e_flags & EF_MIPS_ABI2))) ?
|
||||
MIPS_ABI_FP_64A : MIPS_ABI_FP_SOFT;
|
||||
is_mips64 = (ehdr->e_ident[EI_CLASS] == ELFCLASS64) ||
|
||||
(ehdr->e_flags & EF_MIPS_ABI2);
|
||||
|
||||
if (is_mips64) {
|
||||
/* MIPS64 code always uses FR=1, thus the default is easy */
|
||||
state->overall_fp_mode = FP_FR1;
|
||||
|
||||
/* Disallow access to the various FPXX & FP64 ABIs */
|
||||
max_abi = MIPS_ABI_FP_SOFT;
|
||||
} else {
|
||||
/* Default to a mode capable of running code expecting FR=0 */
|
||||
state->overall_fp_mode = cpu_has_mips_r6 ? FP_FRE : FP_FR0;
|
||||
|
||||
/* Allow all ABIs we know about */
|
||||
max_abi = MIPS_ABI_FP_64A;
|
||||
}
|
||||
|
||||
if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
|
||||
(abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
|
||||
|
|
|
@ -29,7 +29,7 @@
|
|||
int kgdb_early_setup;
|
||||
#endif
|
||||
|
||||
static unsigned long irq_map[NR_IRQS / BITS_PER_LONG];
|
||||
static DECLARE_BITMAP(irq_map, NR_IRQS);
|
||||
|
||||
int allocate_irqno(void)
|
||||
{
|
||||
|
|
|
@ -176,7 +176,7 @@ int ptrace_setfpregs(struct task_struct *child, __u32 __user *data)
|
|||
|
||||
__get_user(value, data + 64);
|
||||
fcr31 = child->thread.fpu.fcr31;
|
||||
mask = current_cpu_data.fpu_msk31;
|
||||
mask = boot_cpu_data.fpu_msk31;
|
||||
child->thread.fpu.fcr31 = (value & ~mask) | (fcr31 & mask);
|
||||
|
||||
/* FIR may not be written. */
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show more
Loading…
Reference in a new issue