iio: adc: New driver for TI ADS7950 chips
This adds a new driver for the TI ADS7950 family of ADC chips. These communicate using SPI and come in 8/10/12-bit and 4/8/12/16 channel varieties. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
parent
071cf24943
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902c4b2446
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@ -549,6 +549,19 @@ config TI_ADS1015
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This driver can also be built as a module. If so, the module will be
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called ti-ads1015.
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config TI_ADS7950
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tristate "Texas Instruments ADS7950 ADC driver"
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depends on SPI
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select IIO_BUFFER
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select IIO_TRIGGERED_BUFFER
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help
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Say yes here to build support for Texas Instruments ADS7950, ADS7951,
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ADS7952, ADS7953, ADS7954, ADS7955, ADS7956, ADS7957, ADS7958, ADS7959.
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ADS7960, ADS7961.
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To compile this driver as a module, choose M here: the
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module will be called ti-ads7950.
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config TI_ADS8688
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tristate "Texas Instruments ADS8688"
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depends on SPI && OF
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@ -51,6 +51,7 @@ obj-$(CONFIG_TI_ADC12138) += ti-adc12138.o
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obj-$(CONFIG_TI_ADC128S052) += ti-adc128s052.o
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obj-$(CONFIG_TI_ADC161S626) += ti-adc161s626.o
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obj-$(CONFIG_TI_ADS1015) += ti-ads1015.o
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obj-$(CONFIG_TI_ADS7950) += ti-ads7950.o
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obj-$(CONFIG_TI_ADS8688) += ti-ads8688.o
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obj-$(CONFIG_TI_AM335X_ADC) += ti_am335x_adc.o
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obj-$(CONFIG_TWL4030_MADC) += twl4030-madc.o
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490
drivers/iio/adc/ti-ads7950.c
Normal file
490
drivers/iio/adc/ti-ads7950.c
Normal file
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@ -0,0 +1,490 @@
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/*
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* Texas Instruments ADS7950 SPI ADC driver
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*
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* Copyright 2016 David Lechner <david@lechnology.com>
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*
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* Based on iio/ad7923.c:
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* Copyright 2011 Analog Devices Inc
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* Copyright 2012 CS Systemes d'Information
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*
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* And also on hwmon/ads79xx.c
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
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* Nishanth Menon
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/bitops.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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#define TI_ADS7950_CR_MANUAL BIT(12)
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#define TI_ADS7950_CR_WRITE BIT(11)
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#define TI_ADS7950_CR_CHAN(ch) ((ch) << 7)
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#define TI_ADS7950_CR_RANGE_5V BIT(6)
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#define TI_ADS7950_MAX_CHAN 16
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#define TI_ADS7950_TIMESTAMP_SIZE (sizeof(int64_t) / sizeof(__be16))
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/* val = value, dec = left shift, bits = number of bits of the mask */
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#define TI_ADS7950_EXTRACT(val, dec, bits) \
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(((val) >> (dec)) & ((1 << (bits)) - 1))
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struct ti_ads7950_state {
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struct spi_device *spi;
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struct spi_transfer ring_xfer[TI_ADS7950_MAX_CHAN + 2];
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struct spi_transfer scan_single_xfer[3];
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struct spi_message ring_msg;
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struct spi_message scan_single_msg;
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struct regulator *reg;
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unsigned int settings;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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__be16 rx_buf[TI_ADS7950_MAX_CHAN + TI_ADS7950_TIMESTAMP_SIZE]
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____cacheline_aligned;
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__be16 tx_buf[TI_ADS7950_MAX_CHAN];
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};
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struct ti_ads7950_chip_info {
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const struct iio_chan_spec *channels;
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unsigned int num_channels;
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};
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enum ti_ads7950_id {
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TI_ADS7950,
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TI_ADS7951,
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TI_ADS7952,
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TI_ADS7953,
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TI_ADS7954,
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TI_ADS7955,
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TI_ADS7956,
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TI_ADS7957,
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TI_ADS7958,
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TI_ADS7959,
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TI_ADS7960,
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TI_ADS7961,
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};
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#define TI_ADS7950_V_CHAN(index, bits) \
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{ \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.channel = index, \
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
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.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
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.address = index, \
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.datasheet_name = "CH##index", \
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.scan_index = index, \
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.scan_type = { \
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.sign = 'u', \
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.realbits = bits, \
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.storagebits = 16, \
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.shift = 12 - (bits), \
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.endianness = IIO_BE, \
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}, \
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}
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#define DECLARE_TI_ADS7950_4_CHANNELS(name, bits) \
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const struct iio_chan_spec name ## _channels[] = { \
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TI_ADS7950_V_CHAN(0, bits), \
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TI_ADS7950_V_CHAN(1, bits), \
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TI_ADS7950_V_CHAN(2, bits), \
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TI_ADS7950_V_CHAN(3, bits), \
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IIO_CHAN_SOFT_TIMESTAMP(4), \
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}
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#define DECLARE_TI_ADS7950_8_CHANNELS(name, bits) \
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const struct iio_chan_spec name ## _channels[] = { \
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TI_ADS7950_V_CHAN(0, bits), \
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TI_ADS7950_V_CHAN(1, bits), \
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TI_ADS7950_V_CHAN(2, bits), \
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TI_ADS7950_V_CHAN(3, bits), \
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TI_ADS7950_V_CHAN(4, bits), \
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TI_ADS7950_V_CHAN(5, bits), \
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TI_ADS7950_V_CHAN(6, bits), \
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TI_ADS7950_V_CHAN(7, bits), \
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IIO_CHAN_SOFT_TIMESTAMP(8), \
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}
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#define DECLARE_TI_ADS7950_12_CHANNELS(name, bits) \
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const struct iio_chan_spec name ## _channels[] = { \
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TI_ADS7950_V_CHAN(0, bits), \
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TI_ADS7950_V_CHAN(1, bits), \
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TI_ADS7950_V_CHAN(2, bits), \
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TI_ADS7950_V_CHAN(3, bits), \
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TI_ADS7950_V_CHAN(4, bits), \
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TI_ADS7950_V_CHAN(5, bits), \
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TI_ADS7950_V_CHAN(6, bits), \
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TI_ADS7950_V_CHAN(7, bits), \
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TI_ADS7950_V_CHAN(8, bits), \
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TI_ADS7950_V_CHAN(9, bits), \
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TI_ADS7950_V_CHAN(10, bits), \
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TI_ADS7950_V_CHAN(11, bits), \
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IIO_CHAN_SOFT_TIMESTAMP(12), \
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}
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#define DECLARE_TI_ADS7950_16_CHANNELS(name, bits) \
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const struct iio_chan_spec name ## _channels[] = { \
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TI_ADS7950_V_CHAN(0, bits), \
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TI_ADS7950_V_CHAN(1, bits), \
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TI_ADS7950_V_CHAN(2, bits), \
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TI_ADS7950_V_CHAN(3, bits), \
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TI_ADS7950_V_CHAN(4, bits), \
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TI_ADS7950_V_CHAN(5, bits), \
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TI_ADS7950_V_CHAN(6, bits), \
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TI_ADS7950_V_CHAN(7, bits), \
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TI_ADS7950_V_CHAN(8, bits), \
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TI_ADS7950_V_CHAN(9, bits), \
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TI_ADS7950_V_CHAN(10, bits), \
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TI_ADS7950_V_CHAN(11, bits), \
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TI_ADS7950_V_CHAN(12, bits), \
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TI_ADS7950_V_CHAN(13, bits), \
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TI_ADS7950_V_CHAN(14, bits), \
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TI_ADS7950_V_CHAN(15, bits), \
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IIO_CHAN_SOFT_TIMESTAMP(16), \
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}
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static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7950, 12);
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static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7951, 12);
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static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7952, 12);
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static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7953, 12);
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static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7954, 10);
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static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7955, 10);
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static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7956, 10);
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static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7957, 10);
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static DECLARE_TI_ADS7950_4_CHANNELS(ti_ads7958, 8);
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static DECLARE_TI_ADS7950_8_CHANNELS(ti_ads7959, 8);
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static DECLARE_TI_ADS7950_12_CHANNELS(ti_ads7960, 8);
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static DECLARE_TI_ADS7950_16_CHANNELS(ti_ads7961, 8);
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static const struct ti_ads7950_chip_info ti_ads7950_chip_info[] = {
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[TI_ADS7950] = {
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.channels = ti_ads7950_channels,
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.num_channels = ARRAY_SIZE(ti_ads7950_channels),
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},
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[TI_ADS7951] = {
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.channels = ti_ads7951_channels,
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.num_channels = ARRAY_SIZE(ti_ads7951_channels),
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},
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[TI_ADS7952] = {
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.channels = ti_ads7952_channels,
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.num_channels = ARRAY_SIZE(ti_ads7952_channels),
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},
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[TI_ADS7953] = {
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.channels = ti_ads7953_channels,
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.num_channels = ARRAY_SIZE(ti_ads7953_channels),
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},
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[TI_ADS7954] = {
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.channels = ti_ads7954_channels,
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.num_channels = ARRAY_SIZE(ti_ads7954_channels),
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},
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[TI_ADS7955] = {
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.channels = ti_ads7955_channels,
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.num_channels = ARRAY_SIZE(ti_ads7955_channels),
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},
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[TI_ADS7956] = {
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.channels = ti_ads7956_channels,
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.num_channels = ARRAY_SIZE(ti_ads7956_channels),
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},
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[TI_ADS7957] = {
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.channels = ti_ads7957_channels,
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.num_channels = ARRAY_SIZE(ti_ads7957_channels),
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},
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[TI_ADS7958] = {
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.channels = ti_ads7958_channels,
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.num_channels = ARRAY_SIZE(ti_ads7958_channels),
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},
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[TI_ADS7959] = {
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.channels = ti_ads7959_channels,
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.num_channels = ARRAY_SIZE(ti_ads7959_channels),
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},
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[TI_ADS7960] = {
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.channels = ti_ads7960_channels,
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.num_channels = ARRAY_SIZE(ti_ads7960_channels),
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},
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[TI_ADS7961] = {
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.channels = ti_ads7961_channels,
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.num_channels = ARRAY_SIZE(ti_ads7961_channels),
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},
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};
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/*
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* ti_ads7950_update_scan_mode() setup the spi transfer buffer for the new
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* scan mask
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*/
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static int ti_ads7950_update_scan_mode(struct iio_dev *indio_dev,
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const unsigned long *active_scan_mask)
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{
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struct ti_ads7950_state *st = iio_priv(indio_dev);
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int i, cmd, len;
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len = 0;
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for_each_set_bit(i, active_scan_mask, indio_dev->num_channels) {
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cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(i) | st->settings;
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st->tx_buf[len++] = cpu_to_be16(cmd);
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}
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/* Data for the 1st channel is not returned until the 3rd transfer */
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len += 2;
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for (i = 0; i < len; i++) {
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if ((i + 2) < len)
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st->ring_xfer[i].tx_buf = &st->tx_buf[i];
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if (i >= 2)
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st->ring_xfer[i].rx_buf = &st->rx_buf[i - 2];
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st->ring_xfer[i].len = 2;
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st->ring_xfer[i].cs_change = 1;
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}
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/* make sure last transfer's cs_change is not set */
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st->ring_xfer[len - 1].cs_change = 0;
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spi_message_init_with_transfers(&st->ring_msg, st->ring_xfer, len);
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return 0;
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}
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static irqreturn_t ti_ads7950_trigger_handler(int irq, void *p)
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{
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struct iio_poll_func *pf = p;
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struct iio_dev *indio_dev = pf->indio_dev;
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struct ti_ads7950_state *st = iio_priv(indio_dev);
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int ret;
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ret = spi_sync(st->spi, &st->ring_msg);
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if (ret < 0)
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goto out;
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iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
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iio_get_time_ns(indio_dev));
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out:
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iio_trigger_notify_done(indio_dev->trig);
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return IRQ_HANDLED;
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}
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static int ti_ads7950_scan_direct(struct ti_ads7950_state *st, unsigned int ch)
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{
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int ret, cmd;
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cmd = TI_ADS7950_CR_WRITE | TI_ADS7950_CR_CHAN(ch) | st->settings;
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st->tx_buf[0] = cpu_to_be16(cmd);
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ret = spi_sync(st->spi, &st->scan_single_msg);
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if (ret)
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return ret;
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return be16_to_cpu(st->rx_buf[0]);
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}
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static int ti_ads7950_get_range(struct ti_ads7950_state *st)
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{
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int vref;
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vref = regulator_get_voltage(st->reg);
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if (vref < 0)
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return vref;
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vref /= 1000;
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if (st->settings & TI_ADS7950_CR_RANGE_5V)
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vref *= 2;
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return vref;
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}
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static int ti_ads7950_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long m)
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{
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struct ti_ads7950_state *st = iio_priv(indio_dev);
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int ret;
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switch (m) {
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case IIO_CHAN_INFO_RAW:
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ret = iio_device_claim_direct_mode(indio_dev);
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if (ret < 0)
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return ret;
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ret = ti_ads7950_scan_direct(st, chan->address);
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iio_device_release_direct_mode(indio_dev);
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if (ret < 0)
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return ret;
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if (chan->address != TI_ADS7950_EXTRACT(ret, 12, 4))
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return -EIO;
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*val = TI_ADS7950_EXTRACT(ret, chan->scan_type.shift,
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chan->scan_type.realbits);
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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ret = ti_ads7950_get_range(st);
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if (ret < 0)
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return ret;
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*val = ret;
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*val2 = (1 << chan->scan_type.realbits) - 1;
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return IIO_VAL_FRACTIONAL;
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}
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return -EINVAL;
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}
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static const struct iio_info ti_ads7950_info = {
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.read_raw = &ti_ads7950_read_raw,
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.update_scan_mode = ti_ads7950_update_scan_mode,
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.driver_module = THIS_MODULE,
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};
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static int ti_ads7950_probe(struct spi_device *spi)
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{
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struct ti_ads7950_state *st;
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struct iio_dev *indio_dev;
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const struct ti_ads7950_chip_info *info;
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int ret;
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indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
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if (!indio_dev)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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spi_set_drvdata(spi, indio_dev);
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st->spi = spi;
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st->settings = TI_ADS7950_CR_MANUAL | TI_ADS7950_CR_RANGE_5V;
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info = &ti_ads7950_chip_info[spi_get_device_id(spi)->driver_data];
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->dev.parent = &spi->dev;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = info->channels;
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indio_dev->num_channels = info->num_channels;
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||||
indio_dev->info = &ti_ads7950_info;
|
||||
|
||||
/*
|
||||
* Setup default message. The sample is read at the end of the first
|
||||
* transfer, then it takes one full cycle to convert the sample and one
|
||||
* more cycle to send the value. The conversion process is driven by
|
||||
* the SPI clock, which is why we have 3 transfers. The middle one is
|
||||
* just dummy data sent while the chip is converting the sample that
|
||||
* was read at the end of the first transfer.
|
||||
*/
|
||||
|
||||
st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
|
||||
st->scan_single_xfer[0].len = 2;
|
||||
st->scan_single_xfer[0].cs_change = 1;
|
||||
st->scan_single_xfer[1].tx_buf = &st->tx_buf[0];
|
||||
st->scan_single_xfer[1].len = 2;
|
||||
st->scan_single_xfer[1].cs_change = 1;
|
||||
st->scan_single_xfer[2].rx_buf = &st->rx_buf[0];
|
||||
st->scan_single_xfer[2].len = 2;
|
||||
|
||||
spi_message_init_with_transfers(&st->scan_single_msg,
|
||||
st->scan_single_xfer, 3);
|
||||
|
||||
st->reg = devm_regulator_get(&spi->dev, "refin");
|
||||
if (IS_ERR(st->reg)) {
|
||||
dev_err(&spi->dev, "Failed get get regulator \"refin\"\n");
|
||||
return PTR_ERR(st->reg);
|
||||
}
|
||||
|
||||
ret = regulator_enable(st->reg);
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "Failed to enable regulator \"refin\"\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = iio_triggered_buffer_setup(indio_dev, NULL,
|
||||
&ti_ads7950_trigger_handler, NULL);
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "Failed to setup triggered buffer\n");
|
||||
goto error_disable_reg;
|
||||
}
|
||||
|
||||
ret = iio_device_register(indio_dev);
|
||||
if (ret) {
|
||||
dev_err(&spi->dev, "Failed to register iio device\n");
|
||||
goto error_cleanup_ring;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
error_cleanup_ring:
|
||||
iio_triggered_buffer_cleanup(indio_dev);
|
||||
error_disable_reg:
|
||||
regulator_disable(st->reg);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int ti_ads7950_remove(struct spi_device *spi)
|
||||
{
|
||||
struct iio_dev *indio_dev = spi_get_drvdata(spi);
|
||||
struct ti_ads7950_state *st = iio_priv(indio_dev);
|
||||
|
||||
iio_device_unregister(indio_dev);
|
||||
iio_triggered_buffer_cleanup(indio_dev);
|
||||
regulator_disable(st->reg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct spi_device_id ti_ads7950_id[] = {
|
||||
{"ti-ads7950", TI_ADS7950},
|
||||
{"ti-ads7951", TI_ADS7951},
|
||||
{"ti-ads7952", TI_ADS7952},
|
||||
{"ti-ads7953", TI_ADS7953},
|
||||
{"ti-ads7954", TI_ADS7954},
|
||||
{"ti-ads7955", TI_ADS7955},
|
||||
{"ti-ads7956", TI_ADS7956},
|
||||
{"ti-ads7957", TI_ADS7957},
|
||||
{"ti-ads7958", TI_ADS7958},
|
||||
{"ti-ads7959", TI_ADS7959},
|
||||
{"ti-ads7960", TI_ADS7960},
|
||||
{"ti-ads7961", TI_ADS7961},
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, ti_ads7950_id);
|
||||
|
||||
static struct spi_driver ti_ads7950_driver = {
|
||||
.driver = {
|
||||
.name = "ti-ads7950",
|
||||
},
|
||||
.probe = ti_ads7950_probe,
|
||||
.remove = ti_ads7950_remove,
|
||||
.id_table = ti_ads7950_id,
|
||||
};
|
||||
module_spi_driver(ti_ads7950_driver);
|
||||
|
||||
MODULE_AUTHOR("David Lechner <david@lechnology.com>");
|
||||
MODULE_DESCRIPTION("TI TI_ADS7950 ADC");
|
||||
MODULE_LICENSE("GPL v2");
|
Loading…
Reference in a new issue