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Merge branch 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel 

* 'drm-intel-next' of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:
  drm/i915: Initialize HDMI outputs as HDMI connectors, not DVI.
  drm/i915: Multiply the refresh by 1000 in TV mode validatiion
  drm/i915: Enable irq to trace batch buffer completion.
  drm/i915: batch submit seqno off-by-one.
  drm/i915: Record device minor rather than pointer in TRACE_EVENT
  drm/i915: Don't call intel_update_fbc from intel_crtc_cursor_set
wifi-calibration
Linus Torvalds 2009-10-09 09:19:23 -07:00
parent 32b7a567c8 8d91104aac
commit 902ff18611
8 changed files with 49 additions and 32 deletions
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1
drivers/gpu/drm/i915/i915_dma.c
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@ -1468,6 +1468,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
spin_lock_init(&dev_priv->user_irq_lock);
spin_lock_init(&dev_priv->error_lock);
dev_priv->user_irq_refcount = 0;
dev_priv->trace_irq_seqno = 0;
ret = drm_vblank_init(dev, I915_NUM_PIPE);

2
drivers/gpu/drm/i915/i915_drv.h
View File

@ -202,6 +202,7 @@ typedef struct drm_i915_private {
spinlock_t user_irq_lock;
/** Refcount for i915_user_irq_get() versus i915_user_irq_put(). */
int user_irq_refcount;
u32 trace_irq_seqno;
/** Cached value of IMR to avoid reads in updating the bitfield */
u32 irq_mask_reg;
u32 pipestat[2];
@ -665,6 +666,7 @@ extern int i915_irq_emit(struct drm_device *dev, void *data,
extern int i915_irq_wait(struct drm_device *dev, void *data,
struct drm_file *file_priv);
void i915_user_irq_get(struct drm_device *dev);
void i915_trace_irq_get(struct drm_device *dev, u32 seqno);
void i915_user_irq_put(struct drm_device *dev);
extern void i915_enable_interrupt (struct drm_device *dev);

10
drivers/gpu/drm/i915/i915_gem.c
View File

@ -1770,7 +1770,7 @@ i915_gem_retire_requests(struct drm_device *dev)
drm_i915_private_t *dev_priv = dev->dev_private;
uint32_t seqno;
if (!dev_priv->hw_status_page)
if (!dev_priv->hw_status_page || list_empty(&dev_priv->mm.request_list))
return;
seqno = i915_get_gem_seqno(dev);
@ -1794,6 +1794,12 @@ i915_gem_retire_requests(struct drm_device *dev)
} else
break;
}
if (unlikely (dev_priv->trace_irq_seqno &&
i915_seqno_passed(dev_priv->trace_irq_seqno, seqno))) {
i915_user_irq_put(dev);
dev_priv->trace_irq_seqno = 0;
}
}
void
@ -3352,7 +3358,7 @@ i915_dispatch_gem_execbuffer(struct drm_device *dev,
exec_start = (uint32_t) exec_offset + exec->batch_start_offset;
exec_len = (uint32_t) exec->batch_len;
trace_i915_gem_request_submit(dev, dev_priv->mm.next_gem_seqno);
trace_i915_gem_request_submit(dev, dev_priv->mm.next_gem_seqno + 1);
count = nbox ? nbox : 1;

10
drivers/gpu/drm/i915/i915_irq.c
View File

@ -725,6 +725,16 @@ void i915_user_irq_put(struct drm_device *dev)
spin_unlock_irqrestore(&dev_priv->user_irq_lock, irqflags);
}
void i915_trace_irq_get(struct drm_device *dev, u32 seqno)
{
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
if (dev_priv->trace_irq_seqno == 0)
i915_user_irq_get(dev);
dev_priv->trace_irq_seqno = seqno;
}
static int i915_wait_irq(struct drm_device * dev, int irq_nr)
{
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;

49
drivers/gpu/drm/i915/i915_trace.h
View File

@ -158,16 +158,17 @@ TRACE_EVENT(i915_gem_request_submit,
TP_ARGS(dev, seqno),
TP_STRUCT__entry(
__field(struct drm_device *, dev)
__field(u32, dev)
__field(u32, seqno)
),
TP_fast_assign(
__entry->dev = dev;
__entry->dev = dev->primary->index;
__entry->seqno = seqno;
i915_trace_irq_get(dev, seqno);
),
TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno)
TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno)
);
TRACE_EVENT(i915_gem_request_flush,
@ -178,20 +179,20 @@ TRACE_EVENT(i915_gem_request_flush,
TP_ARGS(dev, seqno, flush_domains, invalidate_domains),
TP_STRUCT__entry(
__field(struct drm_device *, dev)
__field(u32, dev)
__field(u32, seqno)
__field(u32, flush_domains)
__field(u32, invalidate_domains)
),
TP_fast_assign(
__entry->dev = dev;
__entry->dev = dev->primary->index;
__entry->seqno = seqno;
__entry->flush_domains = flush_domains;
__entry->invalidate_domains = invalidate_domains;
),
TP_printk("dev=%p, seqno=%u, flush=%04x, invalidate=%04x",
TP_printk("dev=%u, seqno=%u, flush=%04x, invalidate=%04x",
__entry->dev, __entry->seqno,
__entry->flush_domains, __entry->invalidate_domains)
);
@ -204,16 +205,16 @@ TRACE_EVENT(i915_gem_request_complete,
TP_ARGS(dev, seqno),
TP_STRUCT__entry(
__field(struct drm_device *, dev)
__field(u32, dev)
__field(u32, seqno)
),
TP_fast_assign(
__entry->dev = dev;
__entry->dev = dev->primary->index;
__entry->seqno = seqno;
),
TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno)
TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno)
);
TRACE_EVENT(i915_gem_request_retire,
@ -223,16 +224,16 @@ TRACE_EVENT(i915_gem_request_retire,
TP_ARGS(dev, seqno),
TP_STRUCT__entry(
__field(struct drm_device *, dev)
__field(u32, dev)
__field(u32, seqno)
),
TP_fast_assign(
__entry->dev = dev;
__entry->dev = dev->primary->index;
__entry->seqno = seqno;
),
TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno)
TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno)
);
TRACE_EVENT(i915_gem_request_wait_begin,
@ -242,16 +243,16 @@ TRACE_EVENT(i915_gem_request_wait_begin,
TP_ARGS(dev, seqno),
TP_STRUCT__entry(
__field(struct drm_device *, dev)
__field(u32, dev)
__field(u32, seqno)
),
TP_fast_assign(
__entry->dev = dev;
__entry->dev = dev->primary->index;
__entry->seqno = seqno;
),
TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno)
TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno)
);
TRACE_EVENT(i915_gem_request_wait_end,
@ -261,16 +262,16 @@ TRACE_EVENT(i915_gem_request_wait_end,
TP_ARGS(dev, seqno),
TP_STRUCT__entry(
__field(struct drm_device *, dev)
__field(u32, dev)
__field(u32, seqno)
),
TP_fast_assign(
__entry->dev = dev;
__entry->dev = dev->primary->index;
__entry->seqno = seqno;
),
TP_printk("dev=%p, seqno=%u", __entry->dev, __entry->seqno)
TP_printk("dev=%u, seqno=%u", __entry->dev, __entry->seqno)
);
TRACE_EVENT(i915_ring_wait_begin,
@ -280,14 +281,14 @@ TRACE_EVENT(i915_ring_wait_begin,
TP_ARGS(dev),
TP_STRUCT__entry(
__field(struct drm_device *, dev)
__field(u32, dev)
),
TP_fast_assign(
__entry->dev = dev;
__entry->dev = dev->primary->index;
),
TP_printk("dev=%p", __entry->dev)
TP_printk("dev=%u", __entry->dev)
);
TRACE_EVENT(i915_ring_wait_end,
@ -297,14 +298,14 @@ TRACE_EVENT(i915_ring_wait_end,
TP_ARGS(dev),
TP_STRUCT__entry(
__field(struct drm_device *, dev)
__field(u32, dev)
),
TP_fast_assign(
__entry->dev = dev;
__entry->dev = dev->primary->index;
),
TP_printk("dev=%p", __entry->dev)
TP_printk("dev=%u", __entry->dev)
);
#endif /* _I915_TRACE_H_ */

4
drivers/gpu/drm/i915/intel_display.c
View File

@ -3095,7 +3095,6 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
struct drm_gem_object *bo;
struct drm_i915_gem_object *obj_priv;
int pipe = intel_crtc->pipe;
int plane = intel_crtc->plane;
uint32_t control = (pipe == 0) ? CURACNTR : CURBCNTR;
uint32_t base = (pipe == 0) ? CURABASE : CURBBASE;
uint32_t temp = I915_READ(control);
@ -3182,9 +3181,6 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
drm_gem_object_unreference(intel_crtc->cursor_bo);
}
if ((IS_I965G(dev) || plane == 0))
intel_update_fbc(crtc, &crtc->mode);
mutex_unlock(&dev->struct_mutex);
intel_crtc->cursor_addr = addr;

2
drivers/gpu/drm/i915/intel_hdmi.c
View File

@ -223,7 +223,7 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
connector = &intel_output->base;
drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
DRM_MODE_CONNECTOR_DVID);
DRM_MODE_CONNECTOR_HDMIA);
drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
intel_output->type = INTEL_OUTPUT_HDMI;

3
drivers/gpu/drm/i915/intel_tv.c
View File

@ -1082,7 +1082,8 @@ intel_tv_mode_valid(struct drm_connector *connector, struct drm_display_mode *mo
const struct tv_mode *tv_mode = intel_tv_mode_find(intel_output);
/* Ensure TV refresh is close to desired refresh */
if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode)) < 10)
if (tv_mode && abs(tv_mode->refresh - drm_mode_vrefresh(mode) * 1000)
< 1000)
return MODE_OK;
return MODE_CLOCK_RANGE;
}